[PULL 28/46] target/i386: Introduce SapphireRapids-v3 to add missing features

[Paolo Bonzini]

From: Lei Wang <lei4.w...@intel.com>

Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in
the SapphireRapids-v3 CPU model.

Signed-off-by: Lei Wang <lei4.w...@intel.com>
Message-ID: <20240424072912.43188-1-lei4.w...@intel.com>
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
---
 target/i386/cpu.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index aa3b2d83912..e5723f232c0 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3970,6 +3970,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ }
                 }
             },
+            {
+                .version = 3,
+                .props = (PropValue[]) {
+                    { "ss", "on" },
+                    { "tsc-adjust", "on" },
+                    { "cldemote", "on" },
+                    { "movdiri", "on" },
+                    { "movdir64b", "on" },
+                    { /* end of list */ }
+                }
+            },
             { /* end of list */ }
         }
     },
-- 
2.44.0