On 2024/05/18 5:30, Daniel Henrique Barboza wrote:
Commit 33a24910ae changed 'reg_width' to use 'vlenb', i.e. vector length in bytes, when in this context we want 'reg_width' as the length in bits.Fix 'reg_width' back to the value in bits like 7cb59921c05a ("target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen'") set beforehand. While we're at it, rename 'reg_width' to 'bitsize' to provide a bit more clarity about what the variable represents. 'bitsize' is also used in riscv_gen_dynamic_csr_feature() with the same purpose, i.e. as an input to gdb_feature_builder_append_reg(). Cc: Akihiko Odaki <akihiko.od...@daynix.com> Cc: Alex Bennée <alex.ben...@linaro.org> Reported-by: Robin Dapp <rdapp....@gmail.com> Fixes: 33a24910ae ("target/riscv: Use GDBFeature for dynamic XML") Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_...@linux.alibaba.com> Acked-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.od...@daynix.com>
