Author: Jonas Paulsson Date: 2021-03-15T15:02:39-06:00 New Revision: 9cfd301ec8b5ed6eb49bcc4b85e6f2af1a90b305
URL: https://github.com/llvm/llvm-project/commit/9cfd301ec8b5ed6eb49bcc4b85e6f2af1a90b305 DIFF: https://github.com/llvm/llvm-project/commit/9cfd301ec8b5ed6eb49bcc4b85e6f2af1a90b305.diff LOG: [SystemZ] Test for isinf and isfinite in testFPKind(). Recognize BI__builtin_isinf and BI__builtin_isfinite (and a few other opcodes for finite) in testFPKind() and handle with TDC. Review: Ulrich Weigand. Differential Revision: https://reviews.llvm.org/D97901 Added: Modified: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/SystemZ/strictfp_builtins.c Removed: ################################################################################ diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index 4f5b928f1fe6..c3df36fc1ea2 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -7218,6 +7218,18 @@ class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { case Builtin::BI__builtin_isnan: TDCBits = 0xf; break; + case Builtin::BIfinite: + case Builtin::BI__finite: + case Builtin::BIfinitef: + case Builtin::BI__finitef: + case Builtin::BIfinitel: + case Builtin::BI__finitel: + case Builtin::BI__builtin_isfinite: + TDCBits = 0xfc0; + break; + case Builtin::BI__builtin_isinf: + TDCBits = 0x30; + break; default: break; } diff --git a/clang/test/CodeGen/SystemZ/strictfp_builtins.c b/clang/test/CodeGen/SystemZ/strictfp_builtins.c index 2181da9b8637..58909f16a6dd 100644 --- a/clang/test/CodeGen/SystemZ/strictfp_builtins.c +++ b/clang/test/CodeGen/SystemZ/strictfp_builtins.c @@ -9,7 +9,7 @@ // CHECK-NEXT: [[F_ADDR:%.*]] = alloca float, align 4 // CHECK-NEXT: store float [[F:%.*]], float* [[F_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4 -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f32(float [[TMP0]], i64 15) [[ATTR2:#.*]] +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f32(float [[TMP0]], i64 15) #[[ATTR2:[0-9]+]] // CHECK-NEXT: ret i32 [[TMP1]] // int test_isnan_float(float f) { @@ -21,7 +21,7 @@ int test_isnan_float(float f) { // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 // CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 // CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f64(double [[TMP0]], i64 15) [[ATTR2]] +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f64(double [[TMP0]], i64 15) #[[ATTR2]] // CHECK-NEXT: ret i32 [[TMP1]] // int test_isnan_double(double d) { @@ -34,10 +34,84 @@ int test_isnan_double(double d) { // CHECK-NEXT: [[LD:%.*]] = load fp128, fp128* [[TMP0:%.*]], align 8 // CHECK-NEXT: store fp128 [[LD]], fp128* [[LD_ADDR]], align 8 // CHECK-NEXT: [[TMP1:%.*]] = load fp128, fp128* [[LD_ADDR]], align 8 -// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.s390.tdc.f128(fp128 [[TMP1]], i64 15) [[ATTR2]] +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.s390.tdc.f128(fp128 [[TMP1]], i64 15) #[[ATTR2]] // CHECK-NEXT: ret i32 [[TMP2]] // int test_isnan_long_double(long double ld) { return __builtin_isnan(ld); } +// CHECK-LABEL: @test_isinf_float( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[F_ADDR:%.*]] = alloca float, align 4 +// CHECK-NEXT: store float [[F:%.*]], float* [[F_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4 +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f32(float [[TMP0]], i64 48) #[[ATTR2]] +// CHECK-NEXT: ret i32 [[TMP1]] +// +int test_isinf_float(float f) { + return __builtin_isinf(f); +} + +// CHECK-LABEL: @test_isinf_double( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 +// CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f64(double [[TMP0]], i64 48) #[[ATTR2]] +// CHECK-NEXT: ret i32 [[TMP1]] +// +int test_isinf_double(double d) { + return __builtin_isinf(d); +} + +// CHECK-LABEL: @test_isinf_long_double( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca fp128, align 8 +// CHECK-NEXT: [[LD:%.*]] = load fp128, fp128* [[TMP0:%.*]], align 8 +// CHECK-NEXT: store fp128 [[LD]], fp128* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load fp128, fp128* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.s390.tdc.f128(fp128 [[TMP1]], i64 48) #[[ATTR2]] +// CHECK-NEXT: ret i32 [[TMP2]] +// +int test_isinf_long_double(long double ld) { + return __builtin_isinf(ld); +} + +// CHECK-LABEL: @test_isfinite_float( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[F_ADDR:%.*]] = alloca float, align 4 +// CHECK-NEXT: store float [[F:%.*]], float* [[F_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[F_ADDR]], align 4 +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f32(float [[TMP0]], i64 4032) #[[ATTR2]] +// CHECK-NEXT: ret i32 [[TMP1]] +// +int test_isfinite_float(float f) { + return __builtin_isfinite(f); +} + +// CHECK-LABEL: @test_isfinite_double( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 +// CHECK-NEXT: store double [[D:%.*]], double* [[D_ADDR]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[D_ADDR]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.s390.tdc.f64(double [[TMP0]], i64 4032) #[[ATTR2]] +// CHECK-NEXT: ret i32 [[TMP1]] +// +int test_isfinite_double(double d) { + return __builtin_isfinite(d); +} + +// CHECK-LABEL: @test_isfinite_long_double( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[LD_ADDR:%.*]] = alloca fp128, align 8 +// CHECK-NEXT: [[LD:%.*]] = load fp128, fp128* [[TMP0:%.*]], align 8 +// CHECK-NEXT: store fp128 [[LD]], fp128* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load fp128, fp128* [[LD_ADDR]], align 8 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.s390.tdc.f128(fp128 [[TMP1]], i64 4032) #[[ATTR2]] +// CHECK-NEXT: ret i32 [[TMP2]] +// +int test_isfinite_long_double(long double ld) { + return __builtin_isfinite(ld); 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