leonardchan created this revision.
leonardchan added reviewers: phosek, mcgrathr, eugenis, vitalybuka.
leonardchan added a project: Sanitizers.
Herald added subscribers: hiraditya, dberris.
leonardchan requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
This allows for using the frame record feature (which uses `__hwasan_tls`)
independently from however the user wants to access the shadow base, which
prior was only usable if shadow wasn't accessed through the TLS variable or
ifuncs.
For code that already used both the frame record feature and access shadow
through `__hwasan_tls`, this change should be a no-op. The extra instructions
necessary for storing to the ring buffer are only added to cases that weren't
using TLS prior, and are added after getting the shadow base.
Updated tests and added an extra case to `prologue.ll` that covers this new
case.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D103841
Files:
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
Index: llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
===================================================================
--- llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
+++ llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
@@ -1,15 +1,17 @@
; Test -hwasan-with-ifunc flag.
;
; RUN: opt -hwasan -S < %s | \
-; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY
+; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY,CHECK-THREAD-PTR
; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=1 -hwasan-record-stack-history=1 < %s | \
-; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY
+; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY,CHECK-THREAD-PTR
; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=1 -hwasan-record-stack-history=0 < %s | \
; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-IFUNC,CHECK-NOHISTORY
-; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=0 < %s | \
+; RUN: opt -hwasan -S -hwasan-record-stack-history=0 -hwasan-with-ifunc=0 -hwasan-with-tls=0 < %s | \
; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL,CHECK-NOHISTORY
-; RUN: opt -hwasan -S -hwasan-with-ifunc=1 -hwasan-with-tls=0 < %s | \
+; RUN: opt -hwasan -S -hwasan-record-stack-history=0 -hwasan-with-ifunc=1 -hwasan-with-tls=0 < %s | \
; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-IFUNC,CHECK-NOHISTORY
+; RUN: opt -hwasan -S -hwasan-record-stack-history=1 -hwasan-with-ifunc=0 -hwasan-with-tls=0 < %s | \
+; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL,CHECK-HISTORY,CHECK-THREAD-PTR
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android22"
@@ -52,11 +54,11 @@
; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
-; CHECK-TLS: %[[A:[^ ]*]] = call i8* @llvm.thread.pointer()
-; CHECK-TLS: %[[B:[^ ]*]] = getelementptr i8, i8* %[[A]], i32 48
-; CHECK-TLS: %[[C:[^ ]*]] = bitcast i8* %[[B]] to i64*
-; CHECK-TLS: %[[D:[^ ]*]] = load i64, i64* %[[C]]
-; CHECK-TLS: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
+; CHECK-THREAD-PTR: %[[A:[^ ]*]] = call i8* @llvm.thread.pointer()
+; CHECK-THREAD-PTR: %[[B:[^ ]*]] = getelementptr i8, i8* %[[A]], i32 48
+; CHECK-THREAD-PTR: %[[C:[^ ]*]] = bitcast i8* %[[B]] to i64*
+; CHECK-THREAD-PTR: %[[D:[^ ]*]] = load i64, i64* %[[C]]
+; CHECK-THREAD-PTR: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
; CHECK-NOHISTORY-NOT: store i64
Index: llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
===================================================================
--- llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
+++ llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
@@ -1,6 +1,6 @@
; Test kernel hwasan instrumentation for alloca.
;
-; RUN: opt < %s -hwasan -hwasan-kernel=1 -S | FileCheck %s
+; RUN: opt < %s -hwasan -hwasan-record-stack-history=0 -hwasan-kernel=1 -S | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
Index: llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
===================================================================
--- llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
+++ llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
@@ -1,8 +1,8 @@
; Test alloca instrumentation.
;
-; RUN: opt < %s -hwasan -hwasan-with-ifunc=1 -S | FileCheck %s --check-prefixes=CHECK,DYNAMIC-SHADOW,NO-UAR-TAGS
-; RUN: opt < %s -hwasan -hwasan-mapping-offset=0 -S | FileCheck %s --check-prefixes=CHECK,ZERO-BASED-SHADOW,NO-UAR-TAGS
-; RUN: opt < %s -hwasan -hwasan-with-ifunc=1 -hwasan-uar-retag-to-zero=0 -S | FileCheck %s --check-prefixes=CHECK,DYNAMIC-SHADOW,UAR-TAGS
+; RUN: opt < %s -hwasan -hwasan-record-stack-history=0 -hwasan-with-ifunc=1 -S | FileCheck %s --check-prefixes=CHECK,DYNAMIC-SHADOW,NO-UAR-TAGS
+; RUN: opt < %s -hwasan -hwasan-record-stack-history=0 -hwasan-mapping-offset=0 -S | FileCheck %s --check-prefixes=CHECK,ZERO-BASED-SHADOW,NO-UAR-TAGS
+; RUN: opt < %s -hwasan -hwasan-record-stack-history=0 -hwasan-with-ifunc=1 -hwasan-uar-retag-to-zero=0 -S | FileCheck %s --check-prefixes=CHECK,DYNAMIC-SHADOW,UAR-TAGS
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android10000"
Index: llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
===================================================================
--- llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -1042,15 +1042,13 @@
}
void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
- if (!Mapping.InTls) {
+ if (!Mapping.InTls)
ShadowBase = getShadowNonTls(IRB);
- return;
- }
-
- if (!WithFrameRecord && TargetTriple.isAndroid()) {
+ else if (!WithFrameRecord && TargetTriple.isAndroid())
ShadowBase = getDynamicShadowIfunc(IRB);
+
+ if (!WithFrameRecord && ShadowBase)
return;
- }
Value *SlotPtr = getHwasanThreadSlotPtr(IRB, IntptrTy);
assert(SlotPtr);
@@ -1106,15 +1104,17 @@
IRB.CreateStore(ThreadLongNew, SlotPtr);
}
- // Get shadow base address by aligning RecordPtr up.
- // Note: this is not correct if the pointer is already aligned.
- // Runtime library will make sure this never happens.
- ShadowBase = IRB.CreateAdd(
- IRB.CreateOr(
- ThreadLongMaybeUntagged,
- ConstantInt::get(IntptrTy, (1ULL << kShadowBaseAlignment) - 1)),
- ConstantInt::get(IntptrTy, 1), "hwasan.shadow");
- ShadowBase = IRB.CreateIntToPtr(ShadowBase, Int8PtrTy);
+ if (!ShadowBase) {
+ // Get shadow base address by aligning RecordPtr up.
+ // Note: this is not correct if the pointer is already aligned.
+ // Runtime library will make sure this never happens.
+ ShadowBase = IRB.CreateAdd(
+ IRB.CreateOr(
+ ThreadLongMaybeUntagged,
+ ConstantInt::get(IntptrTy, (1ULL << kShadowBaseAlignment) - 1)),
+ ConstantInt::get(IntptrTy, 1), "hwasan.shadow");
+ ShadowBase = IRB.CreateIntToPtr(ShadowBase, Int8PtrTy);
+ }
}
Value *HWAddressSanitizer::readRegister(IRBuilder<> &IRB, StringRef Name) {
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