https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/76338
>From a646e872e72bab7b143db7496adfeb633b882dc4 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng <dtcxzyw2...@gmail.com> Date: Mon, 25 Dec 2023 01:39:27 +0800 Subject: [PATCH] Revert "InstCombine: Fold is.fpclass(x, fcInf) to fabs+fcmp" This reverts commit 2b582440c16c72b6b021ea5c212ceda3bdfb2b9b. --- clang/test/CodeGen/isfpclass.c | 23 ++++----- clang/test/Headers/__clang_hip_math.hip | 40 ++++++--------- .../InstCombine/InstCombineCalls.cpp | 18 ------- llvm/test/Transforms/InstCombine/and-fcmp.ll | 9 ++-- .../combine-is.fpclass-and-fcmp.ll | 26 ++++------ .../create-class-from-logic-fcmp.ll | 30 ++++------- .../test/Transforms/InstCombine/is_fpclass.ll | 51 ++++++++----------- 7 files changed, 72 insertions(+), 125 deletions(-) diff --git a/clang/test/CodeGen/isfpclass.c b/clang/test/CodeGen/isfpclass.c index 34873c08e04f87..08c2633266dbd5 100644 --- a/clang/test/CodeGen/isfpclass.c +++ b/clang/test/CodeGen/isfpclass.c @@ -4,9 +4,8 @@ // CHECK-LABEL: define dso_local i1 @check_isfpclass_finite // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X]]) -// CHECK-NEXT: [[TMP1:%.*]] = fcmp one float [[TMP0]], 0x7FF0000000000000 -// CHECK-NEXT: ret i1 [[TMP1]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) +// CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isfpclass_finite(float x) { return __builtin_isfpclass(x, 504 /*Finite*/); @@ -15,7 +14,7 @@ _Bool check_isfpclass_finite(float x) { // CHECK-LABEL: define dso_local i1 @check_isfpclass_finite_strict // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) #[[ATTR6:[0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) #[[ATTR5:[0-9]+]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isfpclass_finite_strict(float x) { @@ -36,7 +35,7 @@ _Bool check_isfpclass_nan_f32(float x) { // CHECK-LABEL: define dso_local i1 @check_isfpclass_nan_f32_strict // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 3) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 3) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isfpclass_nan_f32_strict(float x) { @@ -57,7 +56,7 @@ _Bool check_isfpclass_snan_f64(double x) { // CHECK-LABEL: define dso_local i1 @check_isfpclass_snan_f64_strict // CHECK-SAME: (double noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f64(double [[X]], i32 1) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f64(double [[X]], i32 1) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isfpclass_snan_f64_strict(double x) { @@ -78,7 +77,7 @@ _Bool check_isfpclass_zero_f16(_Float16 x) { // CHECK-LABEL: define dso_local i1 @check_isfpclass_zero_f16_strict // CHECK-SAME: (half noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f16(half [[X]], i32 96) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f16(half [[X]], i32 96) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isfpclass_zero_f16_strict(_Float16 x) { @@ -89,7 +88,7 @@ _Bool check_isfpclass_zero_f16_strict(_Float16 x) { // CHECK-LABEL: define dso_local i1 @check_isnan // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 3) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 3) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isnan(float x) { @@ -100,7 +99,7 @@ _Bool check_isnan(float x) { // CHECK-LABEL: define dso_local i1 @check_isinf // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 516) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 516) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isinf(float x) { @@ -111,7 +110,7 @@ _Bool check_isinf(float x) { // CHECK-LABEL: define dso_local i1 @check_isfinite // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isfinite(float x) { @@ -122,7 +121,7 @@ _Bool check_isfinite(float x) { // CHECK-LABEL: define dso_local i1 @check_isnormal // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 264) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 264) #[[ATTR5]] // CHECK-NEXT: ret i1 [[TMP0]] // _Bool check_isnormal(float x) { @@ -150,7 +149,7 @@ int4 check_isfpclass_nan_v4f32(float4 x) { // CHECK-LABEL: define dso_local <4 x i32> @check_isfpclass_nan_strict_v4f32 // CHECK-SAME: (<4 x float> noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] { // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> [[X]], i32 3) #[[ATTR6]] +// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> [[X]], i32 3) #[[ATTR5]] // CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[TMP0]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] // diff --git a/clang/test/Headers/__clang_hip_math.hip b/clang/test/Headers/__clang_hip_math.hip index fa13ddba425bde..94a535ddd2246f 100644 --- a/clang/test/Headers/__clang_hip_math.hip +++ b/clang/test/Headers/__clang_hip_math.hip @@ -1461,9 +1461,8 @@ extern "C" __device__ int test_ilogb(double x) { // DEFAULT-LABEL: @test___finitef( // DEFAULT-NEXT: entry: -// DEFAULT-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X:%.*]]) -// DEFAULT-NEXT: [[TMP1:%.*]] = fcmp one float [[TMP0]], 0x7FF0000000000000 -// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// DEFAULT-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 504) +// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // DEFAULT-NEXT: ret i32 [[CONV]] // // FINITEONLY-LABEL: @test___finitef( @@ -1472,9 +1471,8 @@ extern "C" __device__ int test_ilogb(double x) { // // APPROX-LABEL: @test___finitef( // APPROX-NEXT: entry: -// APPROX-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X:%.*]]) -// APPROX-NEXT: [[TMP1:%.*]] = fcmp one float [[TMP0]], 0x7FF0000000000000 -// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// APPROX-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 504) +// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // APPROX-NEXT: ret i32 [[CONV]] // extern "C" __device__ BOOL_TYPE test___finitef(float x) { @@ -1483,9 +1481,8 @@ extern "C" __device__ BOOL_TYPE test___finitef(float x) { // DEFAULT-LABEL: @test___finite( // DEFAULT-NEXT: entry: -// DEFAULT-NEXT: [[TMP0:%.*]] = tail call double @llvm.fabs.f64(double [[X:%.*]]) -// DEFAULT-NEXT: [[TMP1:%.*]] = fcmp one double [[TMP0]], 0x7FF0000000000000 -// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// DEFAULT-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f64(double [[X:%.*]], i32 504) +// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // DEFAULT-NEXT: ret i32 [[CONV]] // // FINITEONLY-LABEL: @test___finite( @@ -1494,9 +1491,8 @@ extern "C" __device__ BOOL_TYPE test___finitef(float x) { // // APPROX-LABEL: @test___finite( // APPROX-NEXT: entry: -// APPROX-NEXT: [[TMP0:%.*]] = tail call double @llvm.fabs.f64(double [[X:%.*]]) -// APPROX-NEXT: [[TMP1:%.*]] = fcmp one double [[TMP0]], 0x7FF0000000000000 -// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// APPROX-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f64(double [[X:%.*]], i32 504) +// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // APPROX-NEXT: ret i32 [[CONV]] // extern "C" __device__ BOOL_TYPE test___finite(double x) { @@ -1505,9 +1501,8 @@ extern "C" __device__ BOOL_TYPE test___finite(double x) { // DEFAULT-LABEL: @test___isinff( // DEFAULT-NEXT: entry: -// DEFAULT-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X:%.*]]) -// DEFAULT-NEXT: [[TMP1:%.*]] = fcmp oeq float [[TMP0]], 0x7FF0000000000000 -// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// DEFAULT-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) +// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // DEFAULT-NEXT: ret i32 [[CONV]] // // FINITEONLY-LABEL: @test___isinff( @@ -1516,9 +1511,8 @@ extern "C" __device__ BOOL_TYPE test___finite(double x) { // // APPROX-LABEL: @test___isinff( // APPROX-NEXT: entry: -// APPROX-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X:%.*]]) -// APPROX-NEXT: [[TMP1:%.*]] = fcmp oeq float [[TMP0]], 0x7FF0000000000000 -// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// APPROX-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) +// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // APPROX-NEXT: ret i32 [[CONV]] // extern "C" __device__ BOOL_TYPE test___isinff(float x) { @@ -1527,9 +1521,8 @@ extern "C" __device__ BOOL_TYPE test___isinff(float x) { // DEFAULT-LABEL: @test___isinf( // DEFAULT-NEXT: entry: -// DEFAULT-NEXT: [[TMP0:%.*]] = tail call double @llvm.fabs.f64(double [[X:%.*]]) -// DEFAULT-NEXT: [[TMP1:%.*]] = fcmp oeq double [[TMP0]], 0x7FF0000000000000 -// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// DEFAULT-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f64(double [[X:%.*]], i32 516) +// DEFAULT-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // DEFAULT-NEXT: ret i32 [[CONV]] // // FINITEONLY-LABEL: @test___isinf( @@ -1538,9 +1531,8 @@ extern "C" __device__ BOOL_TYPE test___isinff(float x) { // // APPROX-LABEL: @test___isinf( // APPROX-NEXT: entry: -// APPROX-NEXT: [[TMP0:%.*]] = tail call double @llvm.fabs.f64(double [[X:%.*]]) -// APPROX-NEXT: [[TMP1:%.*]] = fcmp oeq double [[TMP0]], 0x7FF0000000000000 -// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP1]] to i32 +// APPROX-NEXT: [[TMP0:%.*]] = tail call noundef i1 @llvm.is.fpclass.f64(double [[X:%.*]], i32 516) +// APPROX-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i32 // APPROX-NEXT: ret i32 [[CONV]] // extern "C" __device__ BOOL_TYPE test___isinf(double x) { diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp index 3b7fe7fa226607..54d9886c5681b9 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -931,24 +931,6 @@ Instruction *InstCombinerImpl::foldIntrinsicIsFPClass(IntrinsicInst &II) { return replaceOperand(II, 0, FAbsSrc); } - if ((OrderedMask == fcInf || OrderedInvertedMask == fcInf) && - (IsOrdered || IsUnordered) && !IsStrict) { - // is.fpclass(x, fcInf) -> fcmp oeq fabs(x), +inf - // is.fpclass(x, ~fcInf) -> fcmp one fabs(x), +inf - // is.fpclass(x, fcInf|fcNan) -> fcmp ueq fabs(x), +inf - // is.fpclass(x, ~(fcInf|fcNan)) -> fcmp une fabs(x), +inf - Constant *Inf = ConstantFP::getInfinity(Src0->getType()); - FCmpInst::Predicate Pred = - IsUnordered ? FCmpInst::FCMP_UEQ : FCmpInst::FCMP_OEQ; - if (OrderedInvertedMask == fcInf) - Pred = IsUnordered ? FCmpInst::FCMP_UNE : FCmpInst::FCMP_ONE; - - Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, Src0); - Value *CmpInf = Builder.CreateFCmp(Pred, Fabs, Inf); - CmpInf->takeName(&II); - return replaceInstUsesWith(II, CmpInf); - } - if ((OrderedMask == fcPosInf || OrderedMask == fcNegInf) && (IsOrdered || IsUnordered) && !IsStrict) { // is.fpclass(x, fcPosInf) -> fcmp oeq x, +inf diff --git a/llvm/test/Transforms/InstCombine/and-fcmp.ll b/llvm/test/Transforms/InstCombine/and-fcmp.ll index 90d34171385c45..bffa4c2ae0fbd0 100644 --- a/llvm/test/Transforms/InstCombine/and-fcmp.ll +++ b/llvm/test/Transforms/InstCombine/and-fcmp.ll @@ -4794,8 +4794,7 @@ define i1 @clang_builtin_isnormal_inf_check_ord(half %x) { define i1 @clang_builtin_isnormal_inf_check_oge(half %x) { ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_oge( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[AND]] ; %fabs.x = call half @llvm.fabs.f16(half %x) @@ -4807,8 +4806,7 @@ define i1 @clang_builtin_isnormal_inf_check_oge(half %x) { define i1 @clang_builtin_isnormal_inf_check_olt(half %x) { ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_olt( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[AND:%.*]] = fcmp one half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) ; CHECK-NEXT: ret i1 [[AND]] ; %fabs.x = call half @llvm.fabs.f16(half %x) @@ -4835,8 +4833,7 @@ define i1 @clang_builtin_isnormal_inf_check_ole(half %x) { define i1 @clang_builtin_isnormal_inf_check_oeq(half %x) { ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_oeq( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[AND]] ; %fabs.x = call half @llvm.fabs.f16(half %x) diff --git a/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll b/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll index ed8bfd5d669d9e..66ee31f57f961b 100644 --- a/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll +++ b/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll @@ -135,8 +135,7 @@ define i1 @fcmp_isfinite_and_class_subnormal(half %x) { define i1 @fcmp_isfinite_or_class_subnormal(half %x) { ; CHECK-LABEL: @fcmp_isfinite_or_class_subnormal( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[SUBNORMAL_CLASS:%.*]] = fcmp one half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[SUBNORMAL_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) ; CHECK-NEXT: ret i1 [[SUBNORMAL_CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -149,9 +148,8 @@ define i1 @fcmp_isfinite_or_class_subnormal(half %x) { ; -> isfinite define i1 @fcmp_issubnormal_or_class_finite(half %x) { ; CHECK-LABEL: @fcmp_issubnormal_or_class_finite( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp one half [[TMP1]], 0xH7C00 -; CHECK-NEXT: ret i1 [[OR]] +; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) +; CHECK-NEXT: ret i1 [[IS_FINITE_CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -163,9 +161,8 @@ define i1 @fcmp_issubnormal_or_class_finite(half %x) { ; -> isfinite define i1 @class_finite_or_fcmp_issubnormal(half %x) { ; CHECK-LABEL: @class_finite_or_fcmp_issubnormal( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp one half [[TMP1]], 0xH7C00 -; CHECK-NEXT: ret i1 [[OR]] +; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) +; CHECK-NEXT: ret i1 [[IS_FINITE_CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -177,8 +174,8 @@ define i1 @class_finite_or_fcmp_issubnormal(half %x) { ; -> issubnormal define i1 @fcmp_issubnormal_and_class_finite(half %x) { ; CHECK-LABEL: @fcmp_issubnormal_and_class_finite( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240) -; CHECK-NEXT: ret i1 [[AND]] +; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240) +; CHECK-NEXT: ret i1 [[IS_FINITE_CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -189,8 +186,8 @@ define i1 @fcmp_issubnormal_and_class_finite(half %x) { define i1 @class_inf_or_fcmp_issubnormal(half %x) { ; CHECK-LABEL: @class_inf_or_fcmp_issubnormal( -; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756) -; CHECK-NEXT: ret i1 [[OR]] +; CHECK-NEXT: [[IS_INF_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756) +; CHECK-NEXT: ret i1 [[IS_INF_CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -202,9 +199,8 @@ define i1 @class_inf_or_fcmp_issubnormal(half %x) { ; -> isfinite define <2 x i1> @class_finite_or_fcmp_issubnormal_vector(<2 x half> %x) { ; CHECK-LABEL: @class_finite_or_fcmp_issubnormal_vector( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.fabs.v2f16(<2 x half> [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp one <2 x half> [[TMP1]], <half 0xH7C00, half 0xH7C00> -; CHECK-NEXT: ret <2 x i1> [[OR]] +; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 504) +; CHECK-NEXT: ret <2 x i1> [[IS_FINITE_CLASS]] ; %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x) %is.subnormal = fcmp olt <2 x half> %fabs, <half 0xH0400, half 0xH0400> diff --git a/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll b/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll index ea056de3f8ee71..8a51396ef577e9 100644 --- a/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll +++ b/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll @@ -250,8 +250,7 @@ define i1 @olt_0_or_fabs_ueq_inf(half %x) { ; Negative test define i1 @oeq_0_or_fabs_ult_inf(half %x) { ; CHECK-LABEL: @oeq_0_or_fabs_ult_inf( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp une half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507) ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -624,8 +623,7 @@ define i1 @fneg_fabs_olt_neg_smallest_normal_or_inf(half %x) { define i1 @issubnormal_or_finite_olt(half %x) { ; CHECK-LABEL: @issubnormal_or_finite_olt( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp one half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -726,8 +724,7 @@ define i1 @is_finite_or_ord(half %x) { define i1 @is_finite_or_uno(half %x) { ; CHECK-LABEL: @is_finite_or_uno( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp ueq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519) ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -739,8 +736,7 @@ define i1 @is_finite_or_uno(half %x) { define i1 @oeq_isinf_or_uno(half %x) { ; CHECK-LABEL: @oeq_isinf_or_uno( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519) ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -775,8 +771,7 @@ define i1 @oeq_isinf_and_uno(half %x) { define i1 @oeq_isinf_and_ord(half %x) { ; CHECK-LABEL: @oeq_isinf_and_ord( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -907,8 +902,7 @@ define i1 @isnormalinf_or_posinf(half %x) #0 { ; -> pinf|ninf define i1 @isnormalinf_and_inf(half %x) #0 { ; CHECK-LABEL: @isnormalinf_and_inf( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -976,8 +970,7 @@ define i1 @not_isnormalinf_and_ord(half %x) #0 { ; -> ~ninf define i1 @not_isnormalinf_or_inf(half %x) #0 { ; CHECK-LABEL: @not_isnormalinf_or_inf( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp une half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507) ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -1294,8 +1287,7 @@ define i1 @olt_smallest_normal_and_une_inf_or_one_smallest_normal(half %x) #0 { define i1 @oge_fabs_eq_inf_and_ord(half %x) #0 { ; CHECK-LABEL: @oge_fabs_eq_inf_and_ord( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -1318,8 +1310,7 @@ define i1 @oge_eq_inf_and_ord(half %x) #0 { define i1 @oge_fabs_eq_inf_or_uno(half %x) #0 { ; CHECK-LABEL: @oge_fabs_eq_inf_or_uno( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp ueq half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519) ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -1366,8 +1357,7 @@ define i1 @ult_eq_inf_and_ord(half %x) #0 { define i1 @ult_fabs_eq_inf_or_uno(half %x) #0 { ; CHECK-LABEL: @ult_fabs_eq_inf_or_uno( -; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) -; CHECK-NEXT: [[OR:%.*]] = fcmp une half [[TMP1]], 0xH7C00 +; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507) ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll index ad0bcd1b0c437c..7cc357cc1ef9e7 100644 --- a/llvm/test/Transforms/InstCombine/is_fpclass.ll +++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll @@ -107,7 +107,7 @@ define <2 x i1> @test_class_isnan_v2f32(<2 x float> %x) { define i1 @test_class_isnan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_isnan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR0:[0-9]+]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR6:[0-9]+]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp @@ -333,7 +333,7 @@ define <2 x i1> @test_class_is_not_p0_n0_v2f32(<2 x float> %x) { define i1 @test_class_is_not_p0_n0_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_not_p0_n0_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 927) strictfp ; ~fcZero & fcAllFlags @@ -387,7 +387,7 @@ define i1 @test_class_is_not_p0_n0_psub_nsub_f32_dynamic(float %x) "denormal-fp- define i1 @test_class_is_p0_n0_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_p0_n0_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 96) strictfp @@ -540,8 +540,7 @@ define <2 x i1> @test_class_is_ninf_v2f32(<2 x float> %x) { define i1 @test_class_is_inf_f32(float %x) { ; CHECK-LABEL: @test_class_is_inf_f32( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) -; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; fcInf @@ -550,8 +549,7 @@ define i1 @test_class_is_inf_f32(float %x) { define <2 x i1> @test_class_is_inf_v2f32(<2 x float> %x) { ; CHECK-LABEL: @test_class_is_inf_v2f32( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[X:%.*]]) -; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[TMP1]], <float 0x7FF0000000000000, float 0x7FF0000000000000> +; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 516) ; CHECK-NEXT: ret <2 x i1> [[VAL]] ; %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 516) ; fcInf @@ -560,8 +558,7 @@ define <2 x i1> @test_class_is_inf_v2f32(<2 x float> %x) { define i1 @test_class_is_inf_or_nan_f32(float %x) { ; CHECK-LABEL: @test_class_is_inf_or_nan_f32( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) -; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; fcInf|fcNan @@ -570,7 +567,7 @@ define i1 @test_class_is_inf_or_nan_f32(float %x) { define i1 @test_class_is_pinf_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_pinf_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 512) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 512) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 512) strictfp ; fcPosInf @@ -579,7 +576,7 @@ define i1 @test_class_is_pinf_f32_strict(float %x) strictfp { define i1 @test_class_is_ninf_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_ninf_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 4) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 4) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 4) strictfp ; fcNegInf @@ -588,7 +585,7 @@ define i1 @test_class_is_ninf_f32_strict(float %x) strictfp { define i1 @test_class_is_inf_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_inf_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 516) strictfp ; fcInf @@ -597,7 +594,7 @@ define i1 @test_class_is_inf_f32_strict(float %x) strictfp { define i1 @test_class_is_pinf_or_nan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_pinf_or_nan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 515) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 515) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 515) strictfp ; fcPosInf|fcNan @@ -606,7 +603,7 @@ define i1 @test_class_is_pinf_or_nan_f32_strict(float %x) strictfp { define i1 @test_class_is_ninf_or_nan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_ninf_or_nan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 7) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 7) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 7) strictfp ; fcNegInf|fcNan @@ -615,7 +612,7 @@ define i1 @test_class_is_ninf_or_nan_f32_strict(float %x) strictfp { define i1 @test_class_is_inf_or_nan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_inf_or_nan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) #[[ATTR0]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 519) strictfp ; fcInf|fcNan @@ -952,8 +949,7 @@ define i1 @test_class_not_is_nan_multi_use(float %x, ptr %ptr) { define i1 @test_class_not_is_inf_nan(float %x) { ; CHECK-LABEL: @test_class_not_is_inf_nan( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp one float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 504) ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %x, i32 519) @@ -1743,7 +1739,7 @@ define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_nan(float %arg) ; -> ninf|pnormal|negsubnormal|pzero|snan define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { ; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) #[[ATTR0]] +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[CLASS]] ; %fneg = fneg float %arg @@ -1897,8 +1893,7 @@ define i1 @test_class_fabs_posnormal(float %arg) { ; -> posinf define i1 @test_class_fabs_posinf(float %arg) { ; CHECK-LABEL: @test_class_fabs_posinf( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) @@ -2075,7 +2070,7 @@ define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_nan(float %arg) ; -> pinf|psubnormal|snan define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { ; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) #[[ATTR0]] +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) strictfp @@ -2155,8 +2150,7 @@ define i1 @test_class_fneg_fabs_qnan(float %arg) { define i1 @test_class_fneg_fabs_neginf(float %arg) { ; CHECK-LABEL: @test_class_fneg_fabs_neginf( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) @@ -2406,7 +2400,7 @@ define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_nan(float ; strictfp doesn't matter define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { ; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) #[[ATTR0]] +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) #[[ATTR6]] ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) strictfp @@ -2529,8 +2523,7 @@ define i1 @test_class_is_normal_or_zero_nozero_src(float nofpclass(zero) %arg) { define i1 @test_class_is_inf_or_nan_nozero_src(float nofpclass(zero) %arg) { ; CHECK-LABEL: @test_class_is_inf_or_nan_nozero_src( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 519) ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) @@ -2539,8 +2532,7 @@ define i1 @test_class_is_inf_or_nan_nozero_src(float nofpclass(zero) %arg) { define i1 @test_class_is_inf_or_nan_noinf_src(float nofpclass(inf) %arg) { ; CHECK-LABEL: @test_class_is_inf_or_nan_noinf_src( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[CLASS:%.*]] = fcmp uno float [[ARG:%.*]], 0.000000e+00 ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) @@ -2549,8 +2541,7 @@ define i1 @test_class_is_inf_or_nan_noinf_src(float nofpclass(inf) %arg) { define i1 @test_class_is_inf_or_nan_nonan_src(float nofpclass(nan) %arg) { ; CHECK-LABEL: @test_class_is_inf_or_nan_nonan_src( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) -; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 516) ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits