On 02/04/2014 01:39 AM, Alexandre Courbot wrote: > On 02/04/2014 12:55 PM, Ben Skeggs wrote: >> On Sat, Feb 1, 2014 at 1:16 PM, Alexandre Courbot >> <acourbot at nvidia.com> wrote: >>> GK20A's timer is directly attached to the system timer and cannot be >>> calibrated. Skip the calibration phase on that chip since the >>> corresponding registers do not exist. >> Just a curiosity: What timer resolution does the HW initialise at? > > On T124 the timer input is the oscillator clock, which depending on the > device can run between 12 and 48Mhz (IIUC).
On the one Tegra124 board we support upstream, the crystal is 12MHz. I believe this is a typical/common value; almost all the Tegra boards we support upstream run at this rate.
