From: Alex Hung <alex.h...@amd.com>

This patch adds colorops for custom 1D LUTs in the SHAPER and
BLND HW blocks.

With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut-srgb_eotf_lut

The color pipeline now consists of the following colorops:
1. 1D curve colorop
2. 1D curve colorop
3. 1D LUT
4. 1D curve colorop
5. 1D LUT

The 1D curve colorops support sRGB, BT2020, and PQ scaled to 125.0.

Signed-off-by: Alex Hung <alex.h...@amd.com>
Signed-off-by: Harry Wentland <harry.wentl...@amd.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_color.c   | 170 +++++++++---------
 .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c |  30 ++++
 2 files changed, 119 insertions(+), 81 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index d5d356cf9fc6..e7b51b29cc04 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -1212,40 +1212,6 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state 
*plane_state,
        return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state);
 }
 
-static int
-__set_colorop_in_shaper_1d_curve(struct dc_plane_state *dc_plane_state,
-                      struct drm_colorop_state *colorop_state)
-{
-       struct dc_transfer_func *tf = dc_plane_state->in_shaper_func;
-       struct drm_colorop *colorop = colorop_state->colorop;
-       struct drm_device *drm = colorop->dev;
-       const struct drm_color_lut *shaper_lut;
-       uint32_t shaper_size;
-
-       if (colorop->type != DRM_COLOROP_1D_CURVE)
-               return -EINVAL;
-
-       if (!(BIT(colorop_state->curve_1d_type) & 
amdgpu_dm_supported_shaper_tfs))
-               return -EINVAL;
-
-       if (colorop_state->bypass) {
-               tf->type = TF_TYPE_BYPASS;
-               tf->tf = TRANSFER_FUNCTION_LINEAR;
-               return 0;
-       }
-
-       drm_dbg(drm, "Shaper colorop with ID: %d\n", colorop->base.id);
-
-       if (colorop->type == DRM_COLOROP_1D_CURVE) {
-               tf->type = TF_TYPE_DISTRIBUTED_POINTS;
-               tf->tf = 
amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
-               tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
-               return __set_output_tf(tf, shaper_lut, shaper_size, false);
-       }
-
-       return -EINVAL;
-}
-
 static int
 __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
                              struct dc_plane_state *dc_plane_state,
@@ -1254,64 +1220,61 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state 
*plane_state,
        struct drm_colorop *old_colorop;
        struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
        struct drm_atomic_state *state = plane_state->state;
+       enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR;
+       struct dc_transfer_func *tf = dc_plane_state->in_shaper_func;
+       const struct drm_color_lut *shaper_lut;
+       struct drm_device *dev = colorop->dev;
+       uint32_t shaper_size;
        int i = 0;
 
+       /* 1D Curve - SHAPER TF */
        old_colorop = colorop;
-
-       /* 2nd op: 1d curve - shaper */
        for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
                if (new_colorop_state->colorop == old_colorop &&
                    (BIT(new_colorop_state->curve_1d_type) & 
amdgpu_dm_supported_shaper_tfs)) {
                        colorop_state = new_colorop_state;
                        break;
                }
+       }
 
-               if (new_colorop_state->colorop == old_colorop) {
+       if (colorop_state && !colorop_state->bypass && colorop->type == 
DRM_COLOROP_1D_CURVE) {
+               drm_dbg(dev, "Shaper TF colorop with ID: %d\n", 
colorop->base.id);
+               tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+               tf->tf = default_tf = 
amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
+               tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+               __set_output_tf(tf, shaper_lut, shaper_size, false);
+       }
+
+       /* 1D LUT - SHAPER LUT */
+       colorop = old_colorop->next;
+       if (!colorop) {
+               drm_dbg(dev, "no Shaper LUT colorop found\n");
+               return -EINVAL;
+       }
+
+       old_colorop = colorop;
+       for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+               if (new_colorop_state->colorop == old_colorop &&
+                   new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) {
                        colorop_state = new_colorop_state;
                        break;
                }
        }
 
-       if (!colorop_state)
-               return -EINVAL;
-
-       return __set_colorop_in_shaper_1d_curve(dc_plane_state, colorop_state);
-}
-
-
-static int
-__set_colorop_1d_curve_blend_tf_lut(struct dc_plane_state *dc_plane_state,
-                                 struct drm_colorop_state *colorop_state)
-{
-
-       struct dc_transfer_func *tf = dc_plane_state->blend_tf;
-       struct drm_colorop *colorop = colorop_state->colorop;
-       struct drm_device *drm = colorop->dev;
-       const struct drm_color_lut *blend_lut;
-       uint32_t blend_size;
-
-       if (colorop->type != DRM_COLOROP_1D_CURVE)
-               return -EINVAL;
-
-       if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs))
-               return -EINVAL;
-
-       if (colorop_state->bypass) {
-               tf->type = TF_TYPE_BYPASS;
-               tf->tf = TRANSFER_FUNCTION_LINEAR;
-               return 0;
-       }
-
-       drm_dbg(drm, "Blend colorop with ID: %d\n", colorop->base.id);
-
-       if (colorop->type == DRM_COLOROP_1D_CURVE) {
+       if (colorop_state && !colorop_state->bypass && colorop->type == 
DRM_COLOROP_1D_LUT) {
+               drm_dbg(dev, "Shaper LUT colorop with ID: %d\n", 
colorop->base.id);
                tf->type = TF_TYPE_DISTRIBUTED_POINTS;
-               tf->tf = 
amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
+               tf->tf = default_tf;
                tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
-               return __set_input_tf(NULL, tf, blend_lut, blend_size);
+               shaper_lut = __extract_blob_lut(colorop_state->data, 
&shaper_size);
+               shaper_size = shaper_lut != NULL ? shaper_size : 0;
+
+               /* Custom LUT size must be the same as supported size */
+               if (shaper_size == colorop_state->size)
+                       __set_output_tf(tf, shaper_lut, shaper_size, false);
        }
 
-       return -EINVAL;
+       return 0;
 }
 
 static int
@@ -1322,28 +1285,63 @@ __set_dm_plane_colorop_blend(struct drm_plane_state 
*plane_state,
        struct drm_colorop *old_colorop;
        struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
        struct drm_atomic_state *state = plane_state->state;
+       enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR;
+       struct dc_transfer_func *tf = dc_plane_state->blend_tf;
+       const struct drm_color_lut *blend_lut;
+       struct drm_device *dev = colorop->dev;
+       uint32_t blend_size;
        int i = 0;
 
+       /* 1D Curve - BLND TF */
        old_colorop = colorop;
-
-       /* 3nd op: 1d curve - blend */
        for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
                if (new_colorop_state->colorop == old_colorop &&
                    (BIT(new_colorop_state->curve_1d_type) & 
amdgpu_dm_supported_blnd_tfs)) {
                        colorop_state = new_colorop_state;
                        break;
                }
+       }
 
-               if (new_colorop_state->colorop == old_colorop) {
+       if (colorop_state && !colorop_state->bypass && colorop->type == 
DRM_COLOROP_1D_CURVE &&
+           (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) 
{
+               drm_dbg(dev, "Blend TF colorop with ID: %d\n", 
colorop->base.id);
+               tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+               tf->tf = default_tf = 
amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
+               tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+               __set_input_tf(NULL, tf, blend_lut, blend_size);
+       }
+
+       /* 1D Curve - BLND LUT */
+       colorop = old_colorop->next;
+       if (!colorop) {
+               drm_dbg(dev, "no Blend LUT colorop found\n");
+               return -EINVAL;
+       }
+
+       old_colorop = colorop;
+       for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+               if (new_colorop_state->colorop == old_colorop &&
+                   new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) {
                        colorop_state = new_colorop_state;
                        break;
                }
        }
 
-       if (!colorop_state)
-               return -EINVAL;
+       if (colorop_state && !colorop_state->bypass && colorop->type == 
DRM_COLOROP_1D_LUT &&
+           (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) 
{
+               drm_dbg(dev, "Blend LUT colorop with ID: %d\n", 
colorop->base.id);
+               tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+               tf->tf = default_tf;
+               tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+               blend_lut = __extract_blob_lut(colorop_state->data, 
&blend_size);
+               blend_size = blend_lut != NULL ? blend_size : 0;
 
-       return __set_colorop_1d_curve_blend_tf_lut(dc_plane_state, 
colorop_state);
+               /* Custom LUT size must be the same as supported size */
+               if (blend_size == colorop_state->size)
+                       __set_input_tf(NULL, tf, blend_lut, blend_size);
+       }
+
+       return 0;
 }
 
 static int
@@ -1413,7 +1411,7 @@ amdgpu_dm_plane_set_colorop_properties(struct 
drm_plane_state *plane_state,
        if (ret)
                return ret;
 
-       /* 1D Curve - SHAPER TF */
+       /* 1D Curve & LUT - SHAPER TF & LUT */
        colorop = colorop->next;
        if (!colorop) {
                drm_dbg(dev, "no Shaper TF colorop found\n");
@@ -1424,7 +1422,12 @@ amdgpu_dm_plane_set_colorop_properties(struct 
drm_plane_state *plane_state,
        if (ret)
                return ret;
 
-       /* 1D Curve - BLND TF */
+       /* Shaper LUT colorop is already handled, just skip here */
+       colorop = colorop->next;
+       if (!colorop)
+               return -EINVAL;
+
+       /* 1D Curve & LUT - BLND TF & LUT */
        colorop = colorop->next;
        if (!colorop) {
                drm_dbg(dev, "no Blend TF colorop found\n");
@@ -1435,6 +1438,11 @@ amdgpu_dm_plane_set_colorop_properties(struct 
drm_plane_state *plane_state,
        if (ret)
                return ret;
 
+       /* BLND LUT colorop is already handled, just skip here */
+       colorop = colorop->next;
+       if (!colorop)
+               return -EINVAL;
+
        return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
index bc66bd4f9fdd..08480bf61dc5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
@@ -29,6 +29,7 @@
 #include <drm/drm_property.h>
 #include <drm/drm_colorop.h>
 
+#include "amdgpu.h"
 #include "amdgpu_dm_colorop.h"
 
 const u64 amdgpu_dm_supported_degam_tfs =
@@ -83,6 +84,21 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane 
*plane, struct drm_pr
 
        prev_op = op;
 
+       /* 1D LUT - SHAPER LUT */
+       op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+       if (!op) {
+               DRM_ERROR("KMS: Failed to allocate colorop\n");
+               return -ENOMEM;
+       }
+
+       ret = drm_colorop_curve_1d_lut_init(dev, op, plane, 
MAX_COLOR_LUT_ENTRIES);
+       if (ret)
+               return ret;
+
+       drm_colorop_set_next_property(prev_op, op);
+
+       prev_op = op;
+
        /* 1D curve - BLND TF */
        op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
        if (!op) {
@@ -96,5 +112,19 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane 
*plane, struct drm_pr
 
        drm_colorop_set_next_property(prev_op, op);
 
+       prev_op = op;
+
+       /* 1D LUT - BLND LUT */
+       op = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+       if (!op) {
+               DRM_ERROR("KMS: Failed to allocate colorop\n");
+               return -ENOMEM;
+       }
+
+       ret = drm_colorop_curve_1d_lut_init(dev, op, plane, 
MAX_COLOR_LUT_ENTRIES);
+       if (ret)
+               return ret;
+
+       drm_colorop_set_next_property(prev_op, op);
        return 0;
 }
\ No newline at end of file
-- 
2.44.0

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