On Wed, 12 Jul 2017 17:34:49 -0000, Michael Witten wrote: > On Tue, 11 Jul 2017 05:08:56 -0000, Michael Witten wrote: > >> diff --git a/libtommath/Makefile.in b/libtommath/Makefile.in >> index dbcd2a0..c06187a 100644 >> --- a/libtommath/Makefile.in >> +++ b/libtommath/Makefile.in >> @@ -17,7 +17,7 @@ endif >> ifneq ($V,1) >> @echo " * ${CC} $@" >> endif >> - ${silent} ${CC} -c ${CFLAGS} $^ -o $@ >> + ${silent} ${CC} -c ${CFLAGS} $*.c -o $@ >> >> #default files to install >> ifndef LIBNAME > > The above change is not quite correct; primarily, it breaks > out-of-tree builds (which are already broken, and will be fixed > shortly in another patch that I'll be submitting). > > The patch above alters the recipe for all object files (the rule > not shown is `%.o: %.c'); in the original, the automatic variable > `$^' is replaced with all of the prerequisites for the target in > question, but this didn't work, because another part of this patch > tells `make' that some of the prerequisites are header files, and > thus `$^' expands to include those header files as well, which the > compiler doesn't appreciate. > > The solution provided here just uses the pattern-matching stem > of the target, provided by the automatic variable `$*', in order > to construct the relevant `*.c' file. Alas, during an out-of-tree > build, the stem is not enough to construct the path to the source > code that needs to be compiled. > > In order to benefit from the search-for-prerequisites performed by > `make', it's necessary to use the `$^' automatic variable, so the > real solution to all of the above is just to filter the expansion > of `$^' so that only `*.c' prerequisites are placed on the command > line. > > More concretely, the above patch *should* look like this: > > diff --git a/libtommath/Makefile.in b/libtommath/Makefile.in > index dbcd2a0..c06187a 100644 > --- a/libtommath/Makefile.in > +++ b/libtommath/Makefile.in > @@ -17,7 +17,7 @@ endif > ifneq ($V,1) > @echo " * ${CC} $@" > endif > - ${silent} ${CC} -c ${CFLAGS} $^ -o $@ > + ${silent} ${CC} -c ${CFLAGS} $(filter %.c,$^) -o $@ > > #default files to install > ifndef LIBNAME > > As out-of-tree builds are already broken, there's little value in > updating this particular patch; instead, the above improvement on > this patch will be incorporated in a future patch that I'll submit > soon for the purpose of fixing out-of-tree builds.
Good news, everyone! It turns out that the GCC option `-c' can be combined with `-o' only when there is one translation unit (that is, one `*.c' file) as input on the command line. Thus, using the `filter' function of GNU `make' is overkill here; it would be enough to use `$<', which is described by: info '(make)Automatic Variables' with the following: '$<' The name of the first prerequisite. If the target got its recipe from an implicit rule, this will be the first prerequisite added by the implicit rule (*note Implicit Rules::). An `implicit rule' is described here: info '(make)Implicit Rules' which states: You can define your own implicit rules by writing "pattern rules". Well, the above rule in question (`%.o: %.c') is a pattern rule, which means it defines an implicit rule, which means that `$<' should be the one, desired translation unit. More concretely, the above patch *should* look like this: diff --git a/libtommath/Makefile.in b/libtommath/Makefile.in index dbcd2a0..c06187a 100644 --- a/libtommath/Makefile.in +++ b/libtommath/Makefile.in @@ -17,7 +17,7 @@ endif ifneq ($V,1) @echo " * ${CC} $@" endif - ${silent} ${CC} -c ${CFLAGS} $^ -o $@ + ${silent} ${CC} -c ${CFLAGS} $< -o $@ #default files to install ifndef LIBNAME I'll incorporate this change as part of the final, consolidated patch series. Sincerely, Michael Witten