https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112816
--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> --- I think we want to add some patterns for combine which would match (set (reg:V4SI 115) (eq:V4SI (lshiftrt:V4SI (subreg:V4SI (reg:V2DI 110) 0) (const_int 31 [0x1f])) (const_vector:V4SI [ (const_int 0 [0]) repeated x4 ]))) (and ditto for ashiftrt, in both cases with just match_operand:V4SI for the register_operand and obviously iterators over 16/32-byte integral vector modes) and turn that into ashiftrt by the same count.