https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110773
--- Comment #6 from Wilco <wilco at gcc dot gnu.org> --- (In reply to Sainan from comment #5) > (In reply to Wilco from comment #4) > > The atomic will also set correct struct alignment. > > My thinking was that maybe this is not the case (= standard library issue) > since both GCC and Clang seem to be causing this issue, but manually adding > alignas(16) also didn't help. > > > You would get a crash if you build for LSE so you get a LDADDAL instruction > > and then run it on a CPU that doesn't. So try -mcpu=native and it should > > work. > > -mcpu=native didn't fix the SIGBUS, only removed __aarch64_ldadd4_acq_rel > from the stack trace. > > FWIW, the CPU on this system where I get the SIGBUS is Cortex-A76, which > should support LSE and atomics, but it seems everytime it encounters > atomics, it just throws a SIGBUS. It works fine on Snapdragon 8cx Gen 3. That does not make any sense. The only thing I think might happen is that your structure is not correctly aligned (for example by using a custom memory allocator). Can you check the address of count when it fails? (should be in the crash logs, or you can see it in gdb or just printf it).
