Hi!

The following testcase ICEs on powerpc-linux, because lra_substitute_pseudo
substitutes (const_int 1) into a subreg operand.  First a subreg of subreg
of a reg appears in a debug insn (which surely is invalid outside of
debug insns, but in debug insns we allow even what is normally invalid in
RTL like subregs which the target doesn't like, because either dwarf2out
is able to handle it, or we just throw away the location expression,
making some var <optimized out>.

lra_substitute_pseudo already has some code to deal with specifically
SUBREG of REG with the REG being substituted for VOIDmode constant,
but that doesn't cover this case, so the following patch extends
lra_substitute_pseudo for debug_p mode to treat stuff like e.g.
combiner's subst function to ensure we don't lose mode which is essential
for the IL.

Bootstrapped/regtested on {powerpc64{,le},x86_64,i686}-linux, ok for trunk?

2022-03-12  Jakub Jelinek  <ja...@redhat.com>

        PR debug/104778
        * lra.cc (lra_substitute_pseudo): For debug_p mode, simplify
        SUBREG, ZERO_EXTEND, SIGN_EXTEND, FLOAT or UNSIGNED_FLOAT if recursive
        call simplified the first operand into VOIDmode constant.

        * gcc.target/powerpc/pr104778.c: New test.

--- gcc/lra.cc.jj       2022-02-04 14:36:55.375600131 +0100
+++ gcc/lra.cc  2022-03-11 18:47:15.555025540 +0100
@@ -2015,8 +2015,39 @@ lra_substitute_pseudo (rtx *loc, int old
     {
       if (fmt[i] == 'e')
        {
-         if (lra_substitute_pseudo (&XEXP (x, i), old_regno,
-                                    new_reg, subreg_p, debug_p))
+         if (debug_p
+             && i == 0
+             && (code == SUBREG
+                 || code == ZERO_EXTEND
+                 || code == SIGN_EXTEND
+                 || code == FLOAT
+                 || code == UNSIGNED_FLOAT))
+           {
+             rtx y = XEXP (x, 0);
+             if (lra_substitute_pseudo (&y, old_regno,
+                                        new_reg, subreg_p, debug_p))
+               {
+                 result = true;
+                 if (CONST_SCALAR_INT_P (y))
+                   {
+                     if (code == SUBREG)
+                       y = simplify_subreg (GET_MODE (x), y,
+                                            GET_MODE (SUBREG_REG (x)),
+                                            SUBREG_BYTE (x));
+                     else
+                       y = simplify_unary_operation (code, GET_MODE (x), y,
+                                                     GET_MODE (XEXP (x, 0)));
+                     if (y)
+                       *loc = y;
+                     else
+                       *loc = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
+                   }
+                 else
+                   XEXP (x, 0) = y;
+               }
+           }
+         else if (lra_substitute_pseudo (&XEXP (x, i), old_regno,
+                                         new_reg, subreg_p, debug_p))
            result = true;
        }
       else if (fmt[i] == 'E')
--- gcc/testsuite/gcc.target/powerpc/pr104778.c.jj      2022-03-11 
18:54:09.455264514 +0100
+++ gcc/testsuite/gcc.target/powerpc/pr104778.c 2022-03-11 18:52:57.216269904 
+0100
@@ -0,0 +1,51 @@
+/* PR debug/104778 */
+/* { dg-do compile } */
+/* { dg-options "-mcmpb -Og -g" } */
+/* { dg-additional-options "-fpie" { target pie } } */
+
+unsigned long long int p;
+short int m, n;
+
+void
+foo (double u, int v, int x, int y, int z)
+{
+  long long int a = v;
+  short int b = v;
+  int c = 0, d = m, e = u;
+
+  if (n)
+    {
+      int q = b;
+
+      while (p / 1.0)
+        c = 0;
+
+      if (n * n == (d + 1) / (1LL << x))
+        a = 1;
+
+      b = u;
+      while (d)
+        {
+          u = m + 1ULL;
+          b = a - (unsigned long long int) u + a + (char) (u + 1.0);
+          d = (v - 1LL) * n / d + q + x;
+          q = m;
+        }
+    }
+
+  while (c < 1)
+    {
+      int r;
+
+      if (m == y)
+        m = e * z;
+
+      e = !a;
+
+      while (!r)
+        ;
+
+      if (b)
+        m = d;
+    }
+}

        Jakub

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