On 11/8/22 13:46, Philipp Tomsich wrote:
gcc/ChangeLog: * config/riscv/predicates.md (shifted_const_arith_operand): (uimm_extra_bit_operand): * config/riscv/riscv.md (*branch<ANYI:mode>_shiftedarith_equals_zero): (*branch<ANYI:mode>_shiftedmask_equals_zero): gcc/testsuite/ChangeLog: * gcc.target/riscv/branch-1.c: New test.
Nice... It seems so obvious, but I'm not offhand aware of other ports doing this, though many could likely benefit.
OK jeff