On Thu, Aug 3, 2023 at 4:10 PM Jan Beulich via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Record common properties in other attributes' default calculations:
> There's always a 1-byte immediate, and they're always encoded in a VEX3-
> like manner (note that "prefix_extra" already evaluates to 1 in this
> case). The drop now (or already previously) redundant explicit
> attributes, adding "mode" ones where they were missing.
>
> Furthermore use "sse4arg" consistently for all VPCOM* insns; so far
> signed comparisons did use it, while unsigned ones used "ssecmp". Note
> that while they have (not counting the explicit or implicit immediate
> operand) they really only have 3 operands, the operator is also counted
> in those patterns. That's relevant for establishing the "memory"
> attribute's value, and at the same time benign when there are only
> register operands.
>
> Note that despite also having 4 operands, multiply-add insns aren't
> affected by this change, as they use "ssemuladd" for "type".
Ok. (I'm not quite familiar for those xop instructions encoding, you
must have better understanding than me, so just rubber-stamp the
patch.
>
> gcc/
>
> * config/i386/i386.md (length_immediate): Handle "sse4arg".
> (prefix): Likewise.
> (*xop_pcmov_<mode>): Add "mode" attribute.
> * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
> "prefix_rep", "prefix_extra", and "length_immediate" attributes.
> (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
> (*xop_pcmov_<mode>): Add "mode" attribute.
> * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
> attribute.
> (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
> "prefix_extra", and "length_immediate" attributes.
> (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
> (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
> and "length_immediate" attributes. Switch "type" to "sse4arg".
> (xop_pcom_tf<mode>3): Likewise.
> (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
>
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -536,6 +536,8 @@
> (cond [(eq_attr "type" "incdec,setcc,icmov,str,lea,other,multi,idiv,leave,
> bitmanip,imulx,msklog,mskmov")
> (const_int 0)
> + (eq_attr "type" "sse4arg")
> + (const_int 1)
> (eq_attr "unit" "i387,sse,mmx")
> (const_int 0)
> (eq_attr "type" "alu,alu1,negnot,imovx,ishift,ishiftx,ishift1,
> @@ -635,6 +637,8 @@
> (const_string "vex")
> (eq_attr "mode" "XI,V16SF,V8DF")
> (const_string "evex")
> + (eq_attr "type" "sse4arg")
> + (const_string "vex")
> ]
> (const_string "orig")))
>
> @@ -23286,7 +23290,8 @@
> (match_operand:MODEF 3 "register_operand" "x")))]
> "TARGET_XOP"
> "vpcmov\t{%1, %3, %2, %0|%0, %2, %3, %1}"
> - [(set_attr "type" "sse4arg")])
> + [(set_attr "type" "sse4arg")
> + (set_attr "mode" "TI")])
>
> ;; These versions of the min/max patterns are intentionally ignorant of
> ;; their behavior wrt -0.0 and NaN (via the commutative operand mark).
> --- a/gcc/config/i386/mmx.md
> +++ b/gcc/config/i386/mmx.md
> @@ -2909,10 +2909,6 @@
> "TARGET_XOP"
> "vpcom%Y1<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
> [(set_attr "type" "sse4arg")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_rep" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> (set_attr "mode" "TI")])
>
> (define_insn "*xop_maskcmp<mode>3"
> @@ -2923,10 +2919,6 @@
> "TARGET_XOP"
> "vpcom%Y1<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
> [(set_attr "type" "sse4arg")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_rep" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> (set_attr "mode" "TI")])
>
> (define_insn "*xop_maskcmp_uns<mode>3"
> @@ -2936,11 +2928,7 @@
> (match_operand:MMXMODEI 3 "register_operand" "x")]))]
> "TARGET_XOP"
> "vpcom%Y1u<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
> - [(set_attr "type" "ssecmp")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_rep" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> + [(set_attr "type" "sse4arg")
> (set_attr "mode" "TI")])
>
> (define_insn "*xop_maskcmp_uns<mode>3"
> @@ -2950,11 +2938,7 @@
> (match_operand:VI_16_32 3 "register_operand" "x")]))]
> "TARGET_XOP"
> "vpcom%Y1u<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
> - [(set_attr "type" "ssecmp")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_rep" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> + [(set_attr "type" "sse4arg")
> (set_attr "mode" "TI")])
>
> (define_expand "vec_cmp<mode><mode>"
> @@ -3144,7 +3128,8 @@
> (match_operand:MMXMODE124 2 "register_operand" "x")))]
> "TARGET_XOP && TARGET_MMX_WITH_SSE"
> "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
> - [(set_attr "type" "sse4arg")])
> + [(set_attr "type" "sse4arg")
> + (set_attr "mode" "TI")])
>
> (define_insn "*xop_pcmov_<mode>"
> [(set (match_operand:VI_16_32 0 "register_operand" "=x")
> @@ -3154,7 +3139,8 @@
> (match_operand:VI_16_32 2 "register_operand" "x")))]
> "TARGET_XOP"
> "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
> - [(set_attr "type" "sse4arg")])
> + [(set_attr "type" "sse4arg")
> + (set_attr "mode" "TI")])
>
> ;; XOP permute instructions
> (define_insn "mmx_ppermv64"
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -24821,7 +24821,8 @@
> (match_operand:V_128_256 2 "nonimmediate_operand" "xm,x")))]
> "TARGET_XOP"
> "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
> - [(set_attr "type" "sse4arg")])
> + [(set_attr "type" "sse4arg")
> + (set_attr "mode" "<sseinsnmode>")])
>
> ;; Recognize XOP's vpcmov from canonical (xor (and (xor t f) c) f)
> (define_split
> @@ -25739,10 +25740,6 @@
> "TARGET_XOP"
> "vpcom%Y1<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
> [(set_attr "type" "sse4arg")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_rep" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> (set_attr "mode" "TI")])
>
> (define_insn "xop_maskcmp_uns<mode>3"
> @@ -25752,11 +25749,7 @@
> (match_operand:VI_128 3 "nonimmediate_operand" "xm")]))]
> "TARGET_XOP"
> "vpcom%Y1u<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
> - [(set_attr "type" "ssecmp")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_rep" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> + [(set_attr "type" "sse4arg")
> (set_attr "mode" "TI")])
>
> ;; Version of pcom*u* that is called from the intrinsics that allows pcomequ*
> @@ -25771,10 +25764,7 @@
> UNSPEC_XOP_UNSIGNED_CMP))]
> "TARGET_XOP"
> "vpcom%Y1u<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
> - [(set_attr "type" "ssecmp")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> + [(set_attr "type" "sse4arg")
> (set_attr "mode" "TI")])
>
> ;; Pcomtrue and pcomfalse support. These are useless instructions, but are
> @@ -25792,10 +25782,7 @@
> ? "vpcomtrue<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
> : "vpcomfalse<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}");
> }
> - [(set_attr "type" "ssecmp")
> - (set_attr "prefix_data16" "0")
> - (set_attr "prefix_extra" "2")
> - (set_attr "length_immediate" "1")
> + [(set_attr "type" "sse4arg")
> (set_attr "mode" "TI")])
>
> (define_insn "xop_vpermil2<mode>3"
> @@ -25809,7 +25796,6 @@
> "TARGET_XOP"
> "vpermil2<ssemodesuffix>\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}"
> [(set_attr "type" "sse4arg")
> - (set_attr "length_immediate" "1")
> (set_attr "mode" "<MODE>")])
>
> ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
>
--
BR,
Hongtao
