Hi,
With the proposed design of these switches, how would I restrict AVX10.1
to particular AVX-512 subsets?
For example, usage of the |_mm256_rol_epi32| intrinsic should be
compatible on any AVX10/256 implementation, /as well as /any AVX-512VL
without AVX10 implementation (e.g. Skylake-X). But how do I signal that
I want compatibility with both these targets?
* |-mavx512vl| lets the compiler use 512-bit registers -> incompatible
with 256-bit AVX10.
* |-mavx512vl -mprefer-vector-width=256| might steer the compiler away
from 512-bit registers, but I don't think it guarantees it.
* |-mavx10.1-256| lets the compiler use all Sapphire Rapids AVX-512
features at 256-bit wide (so in theory, it could choose to compile
it with |vpshldd|) -> incompatible with Skylake-X.
* |-mavx10.1-256 -mno-avx512fp16 -mno-avx512...| will emit a warning
and ignore the attempts at disabling AVX-512 subsets.
* |-mavx10.1-256 -mavx512vl| takes the /union/ of the features, not
the /intersection./
Is there something like |-mavx512vl -mmax-vector-width=256|, or am I
misunderstanding the situation?
Thanks!
