From: Pan Li <pan2...@intel.com>
Given we have RTL as below.
(plus:DI (mult:DI (reg:DI 138 [ g.4_6 ])
(const_int 8 [0x8]))
(lo_sum:DI (reg:DI 167)
(symbol_ref:DI ("f") [flags 0x86] <var_decl 0x7fa96ea1cc60
f>)
))
When handling (plus (plus (mult (a) (mem_shadd_constant)) (fp)) (C)) case,
the fp will be the lo_sum operand as above. We have assumption that the fp
is reg but actually not here. It will have ICE when building with option
--enable-checking=rtl.
This patch would like to fix it by adding the REG_P to ensure the operand
is a register. The test case gcc/testsuite/gcc.dg/pr109417.c covered this
fix when build with --enable-checking=rtl.
PR target/111634
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_legitimize_address): Bugfix.
Signed-off-by: Pan Li <pan2...@intel.com>
---
gcc/config/riscv/riscv.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d5446b63dbf..2b839241f1a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -2042,7 +2042,7 @@ riscv_legitimize_address (rtx x, rtx oldx
ATTRIBUTE_UNUSED,
{
rtx index = XEXP (base, 0);
rtx fp = XEXP (base, 1);
- if (REGNO (fp) == VIRTUAL_STACK_VARS_REGNUM)
+ if (REG_P (fp) && REGNO (fp) == VIRTUAL_STACK_VARS_REGNUM)
{
/* If we were given a MULT, we must fix the constant
--
2.34.1
