Committed, thanks Juzhe. Pan
From: juzhe.zh...@rivai.ai <juzhe.zh...@rivai.ai> Sent: Saturday, April 20, 2024 9:20 AM To: Li, Pan2 <pan2...@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org> Cc: kito.cheng <kito.ch...@gmail.com>; Robin Dapp <rdapp....@gmail.com>; Li, Pan2 <pan2...@intel.com> Subject: Re: [PATCH v1] RISC-V: Add xfail test case for wv insn register overlap LGTM. ________________________________ juzhe.zh...@rivai.ai<mailto:juzhe.zh...@rivai.ai> From: pan2.li<mailto:pan2...@intel.com> Date: 2024-04-20 09:04 To: gcc-patches<mailto:gcc-patches@gcc.gnu.org> CC: juzhe.zhong<mailto:juzhe.zh...@rivai.ai>; kito.cheng<mailto:kito.ch...@gmail.com>; rdapp.gcc<mailto:rdapp....@gmail.com>; Pan Li<mailto:pan2...@intel.com> Subject: [PATCH v1] RISC-V: Add xfail test case for wv insn register overlap From: Pan Li <pan2...@intel.com<mailto:pan2...@intel.com>> gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr112431-42.c: New test. Signed-off-by: Pan Li <pan2...@intel.com<mailto:pan2...@intel.com>> --- .../gcc.target/riscv/rvv/base/pr112431-42.c | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-42.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-42.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-42.c new file mode 100644 index 00000000000..fa5dac58a20 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-42.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ffast-math" } */ + +#include <stdint-gcc.h> + +int64_t +reduc_plus_int (int *__restrict a, int n) +{ + int64_t r = 0; + for (int i = 0; i < n; ++i) + r += a[i]; + return r; +} + +double +reduc_plus_float (float *__restrict a, int n) +{ + double r = 0; + for (int i = 0; i < n; ++i) + r += a[i]; + return r; +} + +/* { dg-final { scan-assembler-not {vmv1r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv2r} } } */ +/* { dg-final { scan-assembler-not {vmv4r} } } */ +/* { dg-final { scan-assembler-not {vmv8r} } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-assembler-times {vwadd\.wv} 1 } } */ +/* { dg-final { scan-assembler-times {vfwadd\.wv} 1 } } */ -- 2.34.1
