Hi, Originally eliminate_regs_in_insn will transform (parallel [ (set (reg:QI 130) (plus:QI (subreg:QI (reg:DI 19 frame) 0) (const_int 96))) (clobber (reg:CC 17 flag))]) {*addqi_1} to (set (reg:QI 130) (subreg:QI (reg:DI 19 frame) 0)) {*movqi_internal} when verify_changes.
But with No Flags add, it transforms (set (reg:QI 5 di) (plus:QI (subreg:QI (reg:DI 19 frame) 0) (const_int 96))) {*addqi_1_nf} to (set (reg:QI 5 di) (subreg:QI (reg:DI 19 frame) 0)) {*addqi_1_nf}. there is no extra clobbers at the end, and its dest reg just is a hardreg. For ix86_hardreg_mov_ok, it returns false. So it fails to update insn and causes the ICE when transform to movqi_internal. But actually it is ok and safe for ix86_hardreg_mov_ok when lra_in_progress. And tested the spec2017, the performance was not affected. Bootstrapped and regtested on x86_64-pc-linux-gnu. OK for trunk? gcc/ChangeLog: * config/i386/i386.cc (ix86_hardreg_mov_ok): Relax hard reg mov restriction when lra in progress. --- gcc/config/i386/i386.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 4d6b2b98761..ca4348a18bf 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -20357,7 +20357,8 @@ ix86_hardreg_mov_ok (rtx dst, rtx src) ? standard_sse_constant_p (src, GET_MODE (dst)) : x86_64_immediate_operand (src, GET_MODE (dst))) && ix86_class_likely_spilled_p (REGNO_REG_CLASS (REGNO (dst))) - && !reload_completed) + && !reload_completed + && !lra_in_progress) return false; return true; } -- 2.31.1