Stop relying on the default fallback to TARGET_RTX_COST for PRU's
addressing costs. Implement TARGET_ADDRESS_COST, in order to allow RTX
cost refactoring in the future without affecting the addressing costs.
No code generation changes are expected by this patch. No changes were
detected when running embench-iot and building a few real-world firmware
examples.
gcc/ChangeLog:
* config/pru/pru.cc (pru_address_cost): Implement address cost
calculation.
(TARGET_ADDRESS_COST): Define for PRU.
Signed-off-by: Dimitar Dimitrov <dimi...@dinux.eu>
---
gcc/config/pru/pru.cc | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/gcc/config/pru/pru.cc b/gcc/config/pru/pru.cc
index 270c536d4c7..a76451f4223 100644
--- a/gcc/config/pru/pru.cc
+++ b/gcc/config/pru/pru.cc
@@ -784,6 +784,28 @@ pru_rtx_costs (rtx x, machine_mode mode,
}
}
+/* Calculate the cost of an addressing mode that contains ADDR.
+ ADDR must be a valid address. */
+
+static int
+pru_address_cost (rtx addr, machine_mode, addr_space_t as, bool)
+{
+ if (as != ADDR_SPACE_GENERIC)
+ /* All currently implemented special address spaces for PRU
+ are much more efficient than generic memory I/O. */
+ return 0;
+ else if (ctable_addr_operand (addr, VOIDmode)
+ || (GET_CODE (addr) == PLUS
+ && ctable_base_operand (XEXP (addr, 1), VOIDmode)))
+ /* Using CTABLE instructions reduces register pressure,
+ so give it precedence. */
+ return 1;
+ else
+ /* Same two instructions (LBBO/SBBO) are used for any valid
+ addressing mode. */
+ return 2;
+}
+
/* Insn costs on PRU are straightforward because:
- Insns emit 0, 1 or more instructions.
- All instructions are 32-bit length.
@@ -3208,6 +3230,9 @@ pru_unwind_word_mode (void)
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS pru_rtx_costs
+#undef TARGET_ADDRESS_COST
+#define TARGET_ADDRESS_COST pru_address_cost
+
#undef TARGET_INSN_COST
#define TARGET_INSN_COST pru_insn_cost
--
2.45.0
