On 2018-06-15 10:56:05 +0200, Torbjorn Granlund wrote: > ni...@lysator.liu.se (Niels Möller) writes: > > 10% speedup. > > A great speedup for an important functions. > > (It will be a slowdown for one obsolete platform, 64-bit Pentium 4. > There, a 64-bit right shift has a latency 7 or 8 cycles depending on > where the count is located. I will not lose sleep over this, in > particular as it will typically use asm.)
But shouldn't it be the goal of the compiler to generate the fastest code for the target? -- Vincent Lefèvre <vinc...@vinc17.net> - Web: <https://www.vinc17.net/> 100% accessible validated (X)HTML - Blog: <https://www.vinc17.net/blog/> Work: CR INRIA - computer arithmetic / AriC project (LIP, ENS-Lyon) _______________________________________________ gmp-bugs mailing list gmp-bugs@gmplib.org https://gmplib.org/mailman/listinfo/gmp-bugs