We are planning to move flush performed from work queue. This
means it is possible to have invalidate -> flip -> flush sequence.
Handle this by clearing possible busy bits on flip.
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 1c6d467cec26..817e5784660b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1307,11 +1307,9 @@ static void __intel_fbc_post_update(struct intel_fbc
*fbc)
lockdep_assert_held(&fbc->lock);
fbc->flip_pending = false;
+ fbc->busy_bits = 0;
- if (!fbc->busy_bits)
- intel_fbc_activate(fbc);
- else
- intel_fbc_deactivate(fbc, "frontbuffer write");
+ intel_fbc_activate(fbc);
}
void intel_fbc_post_update(struct intel_atomic_state *state,
--
2.34.1
