Since these patches have been acked for upstreaming but are not yet added to 
any upstreaming branch, we will wait for another week before sending canonical 
the patches.
Patches needed:

- pinctrl: Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro
- [PATCH v4] gpio: mmio: handle "ngpios" properly in bgpio_init()
- [PATCH v1] gpio: mmio: fix calculation of bgpio_bits
- [PATCH v6 1/2] gpio: mlxbf3: Add gpio driver support
- [PATCH v6 2/2] pinctrl: mlxbf3: Add pinctrl driver support

on top of the above, we need to revert the changes related to the gpio-
mlxbf3.c driver, add the Kconfigs for both the GPIO and PIN ctrl drivers
and add the pinctrl driver to the deb.

** Description changed:

  SRU Justification:
  
  [Impact]
  
  Support the BlueField-3 SoC GPIO driver for handling interrupts and providing 
the option to change the direction and value of a GPIO.
  Support the BlueField-3 SoC pin controller driver for allowing a select 
number of GPIO pins to be manipulated from userspace or the kernel.
  
- All these changes have been accepted for upstream but most of them are not 
yet in the tree/branches so
- we need to submit them as SAUCE. 
+ All these changes have been accepted for upstream but most of them are
+ not yet in the tree/branches.
  
  PLEASE NOTE: This change is dependent on changes done in the ACPI
  tables. So the UEFI image needs to be updated accordingly.
  
  [Fix]
  
  * Add support for the BlueField-3 SoC GPIO driver.
  This driver configures and handles GPIO interrupts. It also enables a user to 
manipulate certain GPIO pins via libgpiod tools or other kernel drivers.
  The usable pins are defined via the "gpio-reserved-ranges" property.
  
  * NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs or
  take the default hardware functionality. Add a driver for the pin
  muxing.
  
  * The following gpiolib commits are bug fixes and are required for the gpio 
driver to work:
  443a0a0f0cf4f432c7af6654b7f2f920d411d379
  
- Although the following have been accepted by maintainers, they are not 
present in any tree/branch yet so 
+ Although the following have been accepted by maintainers, they are not 
present in any tree/branch yet so
  these will be pushed as SAUCE for now:
  [PATCH v4] gpio: mmio: handle "ngpios" properly in bgpio_init()
  [PATCH v1] gpio: mmio: fix calculation of bgpio_bits
  
  [Test Case]
  
  * Check if the gpio-mlxbf3 driver is loaded
  * Check if the pinctrl-mlxbf3 driver is loaded
  * check if the mlxbf-gige driver is loaded
  * check if the pwr-mlxbf driver is loaded
  * Check that the oob_net0 interface is up and operational
  * Do reset and powercycle and check the oob_net0 interface again
  * Test power GPIO interrupt on BF3.
  
  [Regression Potential]
  
  * The Mellanox drivers could fail to be loaded.
  * The mlxbf-gige PHY interrupt or pwr-mlxbf interrupt could fail.

-- 
You received this bug notification because you are a member of Kernel
Packages, which is subscribed to linux-bluefield in Ubuntu.
https://bugs.launchpad.net/bugs/2012743

Title:
  Support Nvidia BlueField-3 GPIO driver and pin controller

Status in linux-bluefield package in Ubuntu:
  New

Bug description:
  SRU Justification:

  [Impact]

  Support the BlueField-3 SoC GPIO driver for handling interrupts and providing 
the option to change the direction and value of a GPIO.
  Support the BlueField-3 SoC pin controller driver for allowing a select 
number of GPIO pins to be manipulated from userspace or the kernel.

  All these changes have been accepted for upstream but most of them are
  not yet in the tree/branches.

  PLEASE NOTE: This change is dependent on changes done in the ACPI
  tables. So the UEFI image needs to be updated accordingly.

  [Fix]

  * Add support for the BlueField-3 SoC GPIO driver.
  This driver configures and handles GPIO interrupts. It also enables a user to 
manipulate certain GPIO pins via libgpiod tools or other kernel drivers.
  The usable pins are defined via the "gpio-reserved-ranges" property.

  * NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs or
  take the default hardware functionality. Add a driver for the pin
  muxing.

  * The following gpiolib commits are bug fixes and are required for the gpio 
driver to work:
  443a0a0f0cf4f432c7af6654b7f2f920d411d379

  Although the following have been accepted by maintainers, they are not 
present in any tree/branch yet so
  these will be pushed as SAUCE for now:
  [PATCH v4] gpio: mmio: handle "ngpios" properly in bgpio_init()
  [PATCH v1] gpio: mmio: fix calculation of bgpio_bits

  [Test Case]

  * Check if the gpio-mlxbf3 driver is loaded
  * Check if the pinctrl-mlxbf3 driver is loaded
  * check if the mlxbf-gige driver is loaded
  * check if the pwr-mlxbf driver is loaded
  * Check that the oob_net0 interface is up and operational
  * Do reset and powercycle and check the oob_net0 interface again
  * Test power GPIO interrupt on BF3.

  [Regression Potential]

  * The Mellanox drivers could fail to be loaded.
  * The mlxbf-gige PHY interrupt or pwr-mlxbf interrupt could fail.

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