Ah.  This is not an error in the board.  This is just an NPTH.  If you
click on it in GAL, you will see it.

I think the correct patch to this should check the pad type instead of
drawing one with no layers.

-S

Am Fr., 22. Juni 2018 um 12:33 Uhr schrieb Andrzej Wolski <
awolski.ki...@gmail.com>:

> IIRC you have to leave (layers) to reproduce this.
>
> This is a board where I found the issue:
>
> https://github.com/mntmn/reform/blob/master/electronics/reform-motherboard.kicad_pcb
> There are two mPCIE connectors in the center, they have NPTH alignment
> holes, you can see them in legacy mode.
>
> Andrzej
>
> W dniu 2018-06-22 o 20:06, Seth Hillbrand pisze:
>
> Andrzej-
>
> I just tested this, editing a file to remove the layers from a pad and
> KiCad automatically adds the pad back to all copper layers.  I see the pad
> in pcbnew and can edit it.
>
> Can you provide a board that demonstrates the issue?  Maybe it was only
> the test board I used?
>
> -S
>
> Am Fr., 22. Juni 2018 um 10:51 Uhr schrieb Andrzej Wolski <
> awolski.ki...@gmail.com>:
>
>> Hi Seth,
>>
>> current behavior is that malformed pad holes are always hidden, so you
>> can't see on the screen something that exists on your PCB and will be
>> plotted in drill files. This patch makes those holes visible.
>>
>> Andrzej
>>
>> W dniu 2018-06-22 o 17:46, Seth Hillbrand pisze:
>>
>> ​Andrzej-
>>
>> Can you explain the issue that this patch addresses?  I read the commit
>> message but it looks like malformed pads (GetLayerSet().any() == 0) are no
>> longer hidden.  This seems counter-intuitive but maybe I'm just not seeing
>> the problem.
>>
>> Thanks!
>> Seth​
>>
>>
>>
>> Am Fr., 22. Juni 2018 um 03:57 Uhr schrieb Andrzej Wolski <
>> awolski.ki...@gmail.com>:
>>
>>>
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>>
>>
>
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