Add hbr3_hbr2 voltage and pre-emphasis swing table to support
HBR3 link rate

Signed-off-by: Kuogee Hsieh <khs...@codeaurora.org>
---
 drivers/gpu/drm/msm/dp/dp_panel.c   |  4 ----
 drivers/phy/qualcomm/phy-qcom-qmp.c | 24 ++++++++++++++++++++++--
 2 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c 
b/drivers/gpu/drm/msm/dp/dp_panel.c
index 9cc8166..63112fa 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -76,10 +76,6 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel)
        if (link_info->num_lanes > dp_panel->max_dp_lanes)
                link_info->num_lanes = dp_panel->max_dp_lanes;
 
-       /* Limit support upto HBR2 until HBR3 support is added */
-       if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4)))
-               link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
-
        DRM_DEBUG_DP("version: %d.%d\n", major, minor);
        DRM_DEBUG_DP("link_rate=%d\n", link_info->rate);
        DRM_DEBUG_DP("lane_count=%d\n", link_info->num_lanes);
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c 
b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 0939a9e..cc5ef59 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -2965,6 +2965,21 @@ static void qcom_qmp_phy_dp_aux_init(struct qmp_phy 
*qphy)
               qphy->pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK);
 }
 
+
+static u8 const qmp_dp_v3_pre_emphasis_hbr3_hbr2[4][4] = {
+        {0x00, 0x0C, 0x15, 0x1A},
+        {0x02, 0x0E, 0x16, 0xFF},
+        {0x02, 0x11, 0xFF, 0xFF},
+        {0x04, 0xFF, 0xFF, 0xFF}
+};
+
+static u8 const qmp_dp_v3_voltage_swing_hbr3_hbr2[4][4] = {
+        {0x02, 0x12, 0x16, 0x1A},
+        {0x09, 0x19, 0x1F, 0xFF},
+        {0x10, 0x1F, 0xFF, 0xFF},
+        {0x1F, 0xFF, 0xFF, 0xFF}
+};
+
 static const u8 qmp_dp_v3_pre_emphasis_hbr_rbr[4][4] = {
        { 0x00, 0x0c, 0x14, 0x19 },
        { 0x00, 0x0b, 0x12, 0xff },
@@ -3000,8 +3015,13 @@ static void qcom_qmp_phy_configure_dp_tx(struct qmp_phy 
*qphy)
                drvr_en = 0x10;
        }
 
-       voltage_swing_cfg = qmp_dp_v3_voltage_swing_hbr_rbr[v_level][p_level];
-       pre_emphasis_cfg = qmp_dp_v3_pre_emphasis_hbr_rbr[v_level][p_level];
+       if (dp_opts->link_rate <= 2700) {
+               voltage_swing_cfg = 
qmp_dp_v3_voltage_swing_hbr_rbr[v_level][p_level];
+               pre_emphasis_cfg = 
qmp_dp_v3_pre_emphasis_hbr_rbr[v_level][p_level];
+       } else {
+               voltage_swing_cfg = 
qmp_dp_v3_voltage_swing_hbr3_hbr2[v_level][p_level];
+               pre_emphasis_cfg = 
qmp_dp_v3_pre_emphasis_hbr3_hbr2[v_level][p_level];
+       }
 
        /* TODO: Move check to config check */
        if (voltage_swing_cfg == 0xFF && pre_emphasis_cfg == 0xFF)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Reply via email to