https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/91672
>From 7dbd266e89a70e96a747d8dd4aa5c6abfde15b2c Mon Sep 17 00:00:00 2001
From: Amara Emerson <am...@apple.com>
Date: Thu, 7 Mar 2024 15:38:33 -0800
Subject: [PATCH] [AArc64][GlobalISel] Fix legalizer assert for
G_INSERT_VECTOR_ELT
We should moreElements <3 x s1> to <4 x s1> before we try to widen the element,
otherwise we end up with a <3 x s21> nonsense type.
(cherry picked from commit a01e9ce86f4c1bc9af819902db9f287b6d23f54f)
Test has been changed from original commit due to a fallback in a G_BITCAST.
Added abort=2 so we can see partial legalization and check no crash.
---
.../AArch64/GISel/AArch64LegalizerInfo.cpp | 1 +
.../GlobalISel/legalize-insert-vector-elt.mir | 69 ++++++++++++++++++-
2 files changed, 69 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 4b9d549e79114..de3c89e925a2a 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -877,6 +877,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const
AArch64Subtarget &ST)
getActionDefinitionsBuilder(G_INSERT_VECTOR_ELT)
.legalIf(typeInSet(0, {v16s8, v8s8, v8s16, v4s16, v4s32, v2s32, v2s64}))
+ .moreElementsToNextPow2(0)
.widenVectorEltsToVectorMinSize(0, 64);
getActionDefinitionsBuilder(G_BUILD_VECTOR)
diff --git
a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
index 6f6cf2cc165b9..563d3d3e26edf 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=aarch64-linux-gnu -O0 -run-pass=legalizer %s -o -
-global-isel-abort=1 | FileCheck %s
+# RUN: llc -mtriple=aarch64-linux-gnu -O0 -run-pass=legalizer %s -o -
-global-isel-abort=2 | FileCheck %s
---
name: pr63826_v2s16
body: |
@@ -216,3 +216,70 @@ body: |
$q0 = COPY %2(<2 x s64>)
RET_ReallyLR
...
+---
+name: v3s8_crash
+body: |
+ ; CHECK-LABEL: name: v3s8_crash
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: liveins: $w1, $w2, $w3, $x0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $w3
+ ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR
[[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<3 x s8>) = G_TRUNC [[BUILD_VECTOR]](<3
x s32>)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
+ ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s8>) = G_BUILD_VECTOR
[[C1]](s8), [[DEF]](s8), [[DEF]](s8)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
+ ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<3 x s8>) = G_INSERT_VECTOR_ELT
[[TRUNC]], [[C3]](s8), [[C2]](s64)
+ ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<12 x s8>) = G_SHUFFLE_VECTOR [[IVEC]](<3
x s8>), [[BUILD_VECTOR1]], shufflemask(0, 3, 3, 3, 1, 3, 3, 3, 2, 3, 3, 3)
+ ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<3 x s32>) = G_BITCAST [[SHUF]](<12 x
s8>)
+ ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32),
[[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BITCAST]](<3 x s32>)
+ ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR
[[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[DEF1]](s32)
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(<4 x s32>) = G_UITOFP
[[BUILD_VECTOR2]](<4 x s32>)
+ ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32),
[[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UITOFP]](<4
x s32>)
+ ; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR
[[UV3]](s32), [[UV4]](s32), [[UV5]](s32)
+ ; CHECK-NEXT: [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32),
[[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BUILD_VECTOR3]](<3 x s32>)
+ ; CHECK-NEXT: G_STORE [[UV7]](s32), [[COPY]](p0) :: (store (s32), align 16)
+ ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s64)
+ ; CHECK-NEXT: G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into
unknown-address + 4)
+ ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C5]](s64)
+ ; CHECK-NEXT: G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into
unknown-address + 8, align 8)
+ ; CHECK-NEXT: G_BR %bb.1
+ bb.1:
+ liveins: $w1, $w2, $w3, $x0
+
+ %0:_(p0) = COPY $x0
+ %2:_(s32) = COPY $w1
+ %3:_(s32) = COPY $w2
+ %4:_(s32) = COPY $w3
+ %5:_(<3 x s32>) = G_BUILD_VECTOR %2(s32), %3(s32), %4(s32)
+ %1:_(<3 x s8>) = G_TRUNC %5(<3 x s32>)
+ %8:_(s64) = G_CONSTANT i64 0
+ %11:_(s8) = G_IMPLICIT_DEF
+ %7:_(s8) = G_CONSTANT i8 0
+ %10:_(<3 x s8>) = G_BUILD_VECTOR %7(s8), %11(s8), %11(s8)
+
+ bb.2:
+ %14:_(s64) = G_CONSTANT i64 0
+ %15:_(s8) = G_CONSTANT i8 0
+ %6:_(<3 x s8>) = G_INSERT_VECTOR_ELT %1, %15(s8), %14(s64)
+ %9:_(<12 x s8>) = G_SHUFFLE_VECTOR %6(<3 x s8>), %10, shufflemask(0, 3, 3,
3, 1, 3, 3, 3, 2, 3, 3, 3)
+ %12:_(<3 x s32>) = G_BITCAST %9(<12 x s8>)
+ %13:_(<3 x s32>) = G_UITOFP %12(<3 x s32>)
+ G_STORE %13(<3 x s32>), %0(p0) :: (store (<3 x s32>))
+ G_BR %bb.2
+
+...
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