Re: [coreboot] Development IDE
On 24.08.2009 22:45, Harald Gutmann wrote: On Monday 24 August 2009 22:36:35 Carl-Daniel Hailfinger wrote: On 24.08.2009 19:02, conged...@voila.fr wrote: I wanted to know which development IDE do you use to develop coreboot: Eclipse, Netbeans ... I can't find anything, any project under Eclipse or any other IDE. I use vim and grep. There is no IDE for coreboot development. Interesting, but do you use any extensions for vim? I really love vim, and use it for all kinds of text modification. :) Some time ago I came across this article: http://www.swaroopch.com/notes/Vim_en:Programmers_Editor and some things in there are really useful to use vim as IDE. IMHO a few bits of advice on that page encourage writing mediocre code (like focusing on typing speed instead of thinking), but making up for it with sheer size. Then again, this is probably a cultural thing. The only special vim features I use are syntax highlighting (always) and bracket bouncing (rarely). Autoindent is off. Each helper tool is run in a separate window, usually even on a different virtual desktop. I usually use 3-4 virtual desktops for development, each with another window open at the same time. Ctrl-Alt-Arrow for moving between virtual desktops in a 4x2 grid. Top row of desktops is for development, bottom row is for communication (web, mail, IRC). The exact window layout differs depending on the task (code/datasheet cross-checking, writing new generic code, writing new chip-specific code, or changing the architecture of some code). Window manager is fvwm2. ctags/cscope are nice, but I hardly ever need them outside orientation phases (and during orientation phases I usually read _all_ related code to avoid using ctags/cscope later). While using ctags/cscope can be a great timesaver, it is often even faster if you don't need them at all. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] HP dl145 g3
Hey, I'm using the port of the HP DL145 G3 on two machines quite succesfully. There is one single problem with it. If I do not boot the kernel with 'clocksource=tsc' the time on the machine runs at double speed. Do you want me to file a bug for this? Or is adding a cmdline option considered a good solution? gr, S. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Development IDE
I use Kscope for both kernel development and coreboot http://kscope.sourceforge.net/ On 24.08.2009 22:45, Harald Gutmann wrote: On Monday 24 August 2009 22:36:35 Carl-Daniel Hailfinger wrote: On 24.08.2009 19:02, conged...@voila.fr wrote: I wanted to know which development IDE do you use to develop coreboot: Eclipse, Netbeans ... I can't find anything, any project under Eclipse or any other IDE. I use vim and grep. There is no IDE for coreboot development. Interesting, but do you use any extensions for vim? I really love vim, and use it for all kinds of text modification. :) Some time ago I came across this article: http://www.swaroopch.com/notes/Vim_en:Programmers_Editor and some things in there are really useful to use vim as IDE. IMHO a few bits of advice on that page encourage writing mediocre code (like focusing on typing speed instead of thinking), but making up for it with sheer size. Then again, this is probably a cultural thing. The only special vim features I use are syntax highlighting (always) and bracket bouncing (rarely). Autoindent is off. Each helper tool is run in a separate window, usually even on a different virtual desktop. I usually use 3-4 virtual desktops for development, each with another window open at the same time. Ctrl-Alt-Arrow for moving between virtual desktops in a 4x2 grid. Top row of desktops is for development, bottom row is for communication (web, mail, IRC). The exact window layout differs depending on the task (code/datasheet cross-checking, writing new generic code, writing new chip-specific code, or changing the architecture of some code). Window manager is fvwm2. ctags/cscope are nice, but I hardly ever need them outside orientation phases (and during orientation phases I usually read _all_ related code to avoid using ctags/cscope later). While using ctags/cscope can be a great timesaver, it is often even faster if you don't need them at all. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot --- DISCLAIMER: This e-mail and any attachment (s) is for authorised use by the intended recipient (s) only. It may contain proprietary material, confidential information and/or be subject to the legal privilege of iWave Systems Technologies Private Limited. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from retaining, using, copying, alerting or disclosing the content of this message. Thank you for your co-operation. -- --- DISCLAIMER: This e-mail and any attachment (s) is for authorised use by the intended recipient (s) only. It may contain proprietary material, confidential information and/or be subject to the legal privilege of iWave Systems Technologies Private Limited. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from retaining, using, copying, alerting or disclosing the content of this message. Thank you for your co-operation. -- -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] HP dl145 g3
On Tue, Aug 25, 2009 at 09:13:38AM +0200, samuel wrote: I'm using the port of the HP DL145 G3 on two machines quite succesfully. There is one single problem with it. If I do not boot the kernel with 'clocksource=tsc' the time on the machine runs at double speed. Do you want me to file a bug for this? Or is adding a cmdline option considered a good solution? I think that should be considered a bug. Thanks, Ward. -- Ward Vandewege w...@gnu.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Fix copy-paste error in src/cpu/x86/Kconfig (XIP_*)
On 8/25/09 1:23 AM, Uwe Hermann wrote: See patch. Uwe. Acked-by: Stefan Reinauer ste...@coresystems.de -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: i...@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] kconfig support for ASUS P2B-F
On 8/25/09 12:58 AM, Uwe Hermann wrote: See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org Add kconfig support for ASUS P2B-F. Only build-tested so far, not tested on hardware. Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Stefan Reinauer ste...@coresystems.de -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: i...@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Only build option_table.o if CONFIG_HAVE_OPTION_TABLE is 'y'
On 8/25/09 12:33 AM, Uwe Hermann wrote: Only build option_table.o if CONFIG_HAVE_OPTION_TABLE is 'y'. Not all boards have an option table (cmos.layout). Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Stefan Reinauer ste...@coresystems.de -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: i...@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] socket 940 Kconfig
On 8/24/09 8:01 PM, Myles Watson wrote: Add support for socket 940. Move common files from socket_F, socket_AM2, and socket_940 into model_fxx. Signed-off-by: Myles Watson myle...@gmail.com Thanks, Myles Acked-by: Stefan Reinauer ste...@coresystems.de -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: i...@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] usbrom + invanders
Hi all, USB ROM can successfully load grub+invanders now. And i am trying to use PMM to get enouth memory at the top address. -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [GSoC] usbrom + invanders
On 8/25/09 11:35 AM, Jason Wang wrote: Hi all, USB ROM can successfully load grub+invanders now. And i am trying to use PMM to get enouth memory at the top address. -- Jason Wang Peking University excellent! -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: i...@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [GSoC] usbrom + invanders
On Tue, 25 Aug 2009 11:44:26 +0200, Stefan Reinauer ste...@coresystems.de wrote: On 8/25/09 11:35 AM, Jason Wang wrote: Hi all, USB ROM can successfully load grub+invanders now. And i am trying to use PMM to get enouth memory at the top address. SWEET! Great work Jason :-) -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] vga not working
I would look in targets/intel/truxton/truxton/fallback/ldoptions Check the values of CONFIG_VGA, CONFIG_CONSOLE_VGA... maybe cat targets/intel/truxton/truxton/fallback/ldoptions | grep VGA cat targets/intel/truxton/truxton/fallback/ldoptions | grep ROM make sure that you have it configured as you expect. If that doesn't help, send the log file and ldoptions to the list. This is not going to be required. I have the VGA output.. Actually Global SMRAM Enable was set to '1' The description of this bit is quite confusing. 0 = The compatible SMRAM functions are disabled. 1 = The compatible SMRAM functions are enabled, providing 128 Kbyte of DRAM accessible at the 0xA address while in SMM (ADS# with SMM decode). The SMM configuration of a few other bits would cause this range to be open as well as non locked so this seemed to be correct, I've actually I've tried to disable this bit a few days ago but then the memory test failed on the 0xA range. By failed I mean the value read back from the memory at this time was always 0x. I assumed this a a misbehavior and did set back this bit to '1' as it was initially. Today I've been trying to disable the memory test and reset this bit again. This made that the VGA output is consistent and as expected. So actually the PCIe configuration was not in cause. Even if quite a few bits in the PCIe configuration does not match the Intel recommendation it seems they are not such a big deal. I will however keep my pciexp_porta_ep80579 file in there. I still have some work around the southbridge configuration (PS2 input), I will keep you guys updated. Thank you for your help guys! Arnaud * * -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Only build option_table.o if CONFIG_HAVE_OPTION_TABLE is 'y'
On Tue, Aug 25, 2009 at 11:15:41AM +0200, Stefan Reinauer wrote: On 8/25/09 12:33 AM, Uwe Hermann wrote: Only build option_table.o if CONFIG_HAVE_OPTION_TABLE is 'y'. Not all boards have an option table (cmos.layout). Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Stefan Reinauer ste...@coresystems.de Thanks, r4570. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4571 - trunk/coreboot-v2/src/cpu/x86
Author: uwe Date: 2009-08-25 14:19:28 +0200 (Tue, 25 Aug 2009) New Revision: 4571 Modified: trunk/coreboot-v2/src/cpu/x86/Kconfig Log: Fix copy-paste error in src/cpu/x86/Kconfig. That file defines XIP_ROM_BASE twice, but the latter definition should be XIP_ROM_SIZE (not *_BASE). These exact two definitions are listed in src/Kconfig already, though, so maybe one of the two locations should remove them? Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Stefan Reinauer ste...@coresystems.de Modified: trunk/coreboot-v2/src/cpu/x86/Kconfig === --- trunk/coreboot-v2/src/cpu/x86/Kconfig 2009-08-25 12:18:05 UTC (rev 4570) +++ trunk/coreboot-v2/src/cpu/x86/Kconfig 2009-08-25 12:19:28 UTC (rev 4571) @@ -6,6 +6,6 @@ hex default 0xfffe -config XIP_ROM_BASE +config XIP_ROM_SIZE hex default 0x2000 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Fix copy-paste error in src/cpu/x86/Kconfig (XIP_*)
On Tue, Aug 25, 2009 at 11:15:00AM +0200, Stefan Reinauer wrote: On 8/25/09 1:23 AM, Uwe Hermann wrote: See patch. Uwe. Acked-by: Stefan Reinauer ste...@coresystems.de Thanks, r4571. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4572 - in trunk/coreboot-v2/src: cpu/intel cpu/intel/slot_2 mainboard/asus mainboard/asus/p2b-f northbridge/intel northbridge/intel/i440bx
Author: uwe Date: 2009-08-25 14:25:36 +0200 (Tue, 25 Aug 2009) New Revision: 4572 Added: trunk/coreboot-v2/src/cpu/intel/slot_2/Kconfig trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc trunk/coreboot-v2/src/mainboard/asus/p2b-f/Kconfig trunk/coreboot-v2/src/mainboard/asus/p2b-f/Makefile.inc trunk/coreboot-v2/src/northbridge/intel/i440bx/Kconfig trunk/coreboot-v2/src/northbridge/intel/i440bx/Makefile.inc Modified: trunk/coreboot-v2/src/cpu/intel/Kconfig trunk/coreboot-v2/src/cpu/intel/Makefile.inc trunk/coreboot-v2/src/mainboard/asus/Kconfig trunk/coreboot-v2/src/northbridge/intel/Kconfig trunk/coreboot-v2/src/northbridge/intel/Makefile.inc Log: Add kconfig support for ASUS P2B-F. Only build-tested so far, not tested on hardware. Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Stefan Reinauer ste...@coresystems.de Modified: trunk/coreboot-v2/src/cpu/intel/Kconfig === --- trunk/coreboot-v2/src/cpu/intel/Kconfig 2009-08-25 12:19:28 UTC (rev 4571) +++ trunk/coreboot-v2/src/cpu/intel/Kconfig 2009-08-25 12:25:36 UTC (rev 4572) @@ -1,4 +1,5 @@ source src/cpu/intel/model_6ex/Kconfig source src/cpu/intel/model_6fx/Kconfig source src/cpu/intel/socket_mFCPGA478/Kconfig -source src/cpu/intel/socket_PGA370/Kconfig \ No newline at end of file +source src/cpu/intel/socket_PGA370/Kconfig +source src/cpu/intel/slot_2/Kconfig Modified: trunk/coreboot-v2/src/cpu/intel/Makefile.inc === --- trunk/coreboot-v2/src/cpu/intel/Makefile.inc2009-08-25 12:19:28 UTC (rev 4571) +++ trunk/coreboot-v2/src/cpu/intel/Makefile.inc2009-08-25 12:25:36 UTC (rev 4572) @@ -5,6 +5,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 +subdirs-$(CONFIG_CPU_INTEL_SLOT_2) += slot_2 #socket_mPGA478 #socket_mPGA479M Added: trunk/coreboot-v2/src/cpu/intel/slot_2/Kconfig === --- trunk/coreboot-v2/src/cpu/intel/slot_2/Kconfig (rev 0) +++ trunk/coreboot-v2/src/cpu/intel/slot_2/Kconfig 2009-08-25 12:25:36 UTC (rev 4572) @@ -0,0 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Uwe Hermann u...@hermann-uwe.de +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config CPU_INTEL_SLOT_2 + bool + default n + Added: trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc === --- trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/intel/slot_2/Makefile.inc 2009-08-25 12:25:36 UTC (rev 4572) @@ -0,0 +1,32 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Uwe Hermann u...@hermann-uwe.de +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +obj-y += slot_2.o +subdirs-y += ../model_6xx +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode + Modified: trunk/coreboot-v2/src/mainboard/asus/Kconfig === --- trunk/coreboot-v2/src/mainboard/asus/Kconfig2009-08-25 12:19:28 UTC (rev 4571) +++ trunk/coreboot-v2/src/mainboard/asus/Kconfig2009-08-25 12:25:36 UTC (rev
[coreboot] [PATCH] Replace PIRQ_TABLE with HAVE_PIRQ_TABLE
See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org Replace PIRQ_TABLE with HAVE_PIRQ_TABLE, the former doesn't exist. Signed-off-by: Uwe Hermann u...@hermann-uwe.de Index: kontron/Kconfig === --- kontron/Kconfig (Revision 4572) +++ kontron/Kconfig (Arbeitskopie) @@ -10,7 +10,7 @@ select NORTHBRIDGE_INTEL_I945 select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG - select PIRQ_TABLE + select HAVE_PIRQ_TABLE select MMCONF_SUPPORT select USE_PRINTK_IN_CAR help Index: amd/serengeti_cheetah/Kconfig === --- amd/serengeti_cheetah/Kconfig (Revision 4572) +++ amd/serengeti_cheetah/Kconfig (Arbeitskopie) @@ -12,7 +12,7 @@ select SOUTHBRIDGE_AMD_AMD8111 select SOUTHBRIDGE_AMD_AMD8131 select SUPERIO_WINBOND_W83627HF - select PIRQ_TABLE + select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR help AMD Serengeti Cheetah mainboard. Index: via/vt8454c/Kconfig === --- via/vt8454c/Kconfig (Revision 4572) +++ via/vt8454c/Kconfig (Arbeitskopie) @@ -5,7 +5,7 @@ select NORTHBRIDGE_VIA_CX700 # select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_VIA_VT1211 - select PIRQ_TABLE + select HAVE_PIRQ_TABLE # select MMCONF_SUPPORT select USE_PRINTK_IN_CAR help Index: via/epia-n/Kconfig === --- via/epia-n/Kconfig (Revision 4572) +++ via/epia-n/Kconfig (Arbeitskopie) @@ -5,7 +5,7 @@ select NORTHBRIDGE_VIA_CN400 select SOUTHBRIDGE_VIA_VT8237R select SUPERIO_WINBOND_W83697HF - select PIRQ_TABLE + select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR help VIA EPIA-N mainboard. Index: msi/Kconfig === --- msi/Kconfig (Revision 4572) +++ msi/Kconfig (Arbeitskopie) @@ -29,7 +29,7 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801XX select SUPERIO_WINBOND_W83627HF - select PIRQ_TABLE + select HAVE_PIRQ_TABLE help MSI MS-6178 mainboard. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Replace PIRQ_TABLE with HAVE_PIRQ_TABLE
Acked-by: Stefan Reinauer ste...@coresystems.de On 25.08.2009, at 14:45, Uwe Hermann u...@hermann-uwe.de wrote: See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org v2_kconfig_have_pirq_table.patch -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4573 - in trunk/coreboot-v2: . src/arch/i386
Author: oxygene Date: 2009-08-25 15:53:14 +0200 (Tue, 25 Aug 2009) New Revision: 4573 Modified: trunk/coreboot-v2/Makefile trunk/coreboot-v2/src/arch/i386/Makefile.inc Log: Properly check for the LZMA compression variable, and fix a print message for the VGA ROM that would print a useless NULL string. Signed-off by: Cristi Magherusan cristi.magheru...@net.utcluj.ro Acked-by: Patrick Georgi patrick.geo...@coresystems.de Modified: trunk/coreboot-v2/Makefile === --- trunk/coreboot-v2/Makefile 2009-08-25 12:25:36 UTC (rev 4572) +++ trunk/coreboot-v2/Makefile 2009-08-25 13:53:14 UTC (rev 4573) @@ -232,7 +232,7 @@ CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CBFS_COMPRESS_FLAG:= -ifeq $(CONFIG_COMPRESSED_PAYLOAD_LZMA) 1 +ifeq ($(CONFIG_COMPRESSED_PAYLOAD_LZMA),y) CBFS_COMPRESS_FLAG:=l endif Modified: trunk/coreboot-v2/src/arch/i386/Makefile.inc === --- trunk/coreboot-v2/src/arch/i386/Makefile.inc2009-08-25 12:25:36 UTC (rev 4572) +++ trunk/coreboot-v2/src/arch/i386/Makefile.inc2009-08-25 13:53:14 UTC (rev 4573) @@ -27,7 +27,7 @@ $(Q) printf PAYLOAD$(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n $(Q)$(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_VGA_BIOS),y) - $(Q) printf VGABIOS$(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID) $(COMPRESSFLAG)\n + $(Q) printf VGABIOS$(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n $(Q) $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom optionrom endif $(Q) printf CBFSPRINT ./build/coreboot.rom\n\n -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] kconfig support for ASUS P2B-F
Now I know why I never write docs nobody ever reads them :-) Index: src/northbridge/intel/i440bx/Makefile.inc === --- src/northbridge/intel/i440bx/Makefile.inc (Revision 0) +++ src/northbridge/intel/i440bx/Makefile.inc (Revision 0) @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Uwe Hermann u...@hermann-uwe.de +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +driver-$(CONFIG_NORTHBRIDGE_INTEL_I440BX) += northbridge.o + Index: src/northbridge/intel/Makefile.inc === --- src/northbridge/intel/Makefile.inc (Revision 4566) +++ src/northbridge/intel/Makefile.inc (Arbeitskopie) @@ -2,7 +2,7 @@ #subdirs-y += e7520 #subdirs-y += e7525 #subdirs-y += i3100 -#subdirs-y += i440bx +subdirs-y += i440bx subdirs-y += i82810 #subdirs-y += i82830 #subdirs-y += i855gme This is not quite right. Please change as follows: Index: src/northbridge/intel/i440bx/Makefile.inc === --- src/northbridge/intel/i440bx/Makefile.inc (Revision 0) +++ src/northbridge/intel/i440bx/Makefile.inc (Revision 0) @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Uwe Hermann u...@hermann-uwe.de +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +driver-y += northbridge.o + Index: src/northbridge/intel/Makefile.inc === --- src/northbridge/intel/Makefile.inc (Revision 4566) +++ src/northbridge/intel/Makefile.inc (Arbeitskopie) @@ -2,7 +2,7 @@ #subdirs-y += e7520 #subdirs-y += e7525 #subdirs-y += i3100 -#subdirs-y += i440bx +subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440BX) += i440bx subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810 #subdirs-y += i82830 #subdirs-y += i855gme Again, conditional conclusion is at the DIRECTORY level for parts, not at the FILE level in the actual part directory. Why do this? It makes is MUCH simpler if you have a part that also depends on some other variable, such as ACPI configuration variable. Please change this if you get a chance. Thanks for doing this. It is really wonderful to see people taking up the Kconfig stuff. Next I'll introduce my romcc-free qemu stuff ... ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] kconfig support for ASUS P2B-F
On Tue, Aug 25, 2009 at 5:26 AM, Uwe Hermannu...@hermann-uwe.de wrote: I took the freedom to move the board config from src/mainboard/asus/Kconfig to src/mainboard/asus/p2b-f/Kconfig to match the style of the other new Kconfig boards. Wonderful! how does it look to you when you do mainboard selection? As you would like it to? ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4574 - in trunk/coreboot-v2/src/cpu/amd: . model_fxx socket_940 socket_AM2 socket_F
Author: myles Date: 2009-08-25 16:22:58 +0200 (Tue, 25 Aug 2009) New Revision: 4574 Added: trunk/coreboot-v2/src/cpu/amd/socket_940/Kconfig trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc Modified: trunk/coreboot-v2/src/cpu/amd/Kconfig trunk/coreboot-v2/src/cpu/amd/Makefile.inc trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_AM2/Kconfig trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_F/Kconfig trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc Log: Add support for AMD Socket 940. Move common files to model_fxx. Signed-off-by: Myles Watson myle...@gmail.com Acked-by: Stefan Reinauer ste...@coresystems.de Modified: trunk/coreboot-v2/src/cpu/amd/Kconfig === --- trunk/coreboot-v2/src/cpu/amd/Kconfig 2009-08-25 13:53:14 UTC (rev 4573) +++ trunk/coreboot-v2/src/cpu/amd/Kconfig 2009-08-25 14:22:58 UTC (rev 4574) @@ -1,6 +1,6 @@ #source src/cpu/amd/socket_754/Kconfig #source src/cpu/amd/socket_939/Kconfig -#source src/cpu/amd/socket_940/Kconfig +source src/cpu/amd/socket_940/Kconfig source src/cpu/amd/socket_AM2/Kconfig #source src/cpu/amd/socket_AM2r2/Kconfig source src/cpu/amd/socket_F/Kconfig Modified: trunk/coreboot-v2/src/cpu/amd/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/Makefile.inc 2009-08-25 13:53:14 UTC (rev 4573) +++ trunk/coreboot-v2/src/cpu/amd/Makefile.inc 2009-08-25 14:22:58 UTC (rev 4574) @@ -1,2 +1,3 @@ subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F +subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940 subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2 Modified: trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc2009-08-25 13:53:14 UTC (rev 4573) +++ trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc2009-08-25 14:22:58 UTC (rev 4574) @@ -4,3 +4,16 @@ obj-y += model_fxx_update_microcode.o obj-y += processor_name.o obj-y += powernow_acpi.o +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../microcode +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae +subdirs-y += ../../x86/smm Copied: trunk/coreboot-v2/src/cpu/amd/socket_940/Kconfig (from rev 4558, trunk/coreboot-v2/src/cpu/amd/socket_F/Kconfig) === --- trunk/coreboot-v2/src/cpu/amd/socket_940/Kconfig (rev 0) +++ trunk/coreboot-v2/src/cpu/amd/socket_940/Kconfig2009-08-25 14:22:58 UTC (rev 4574) @@ -0,0 +1,14 @@ +config CPU_AMD_SOCKET_940 + bool + default false + +config K8_REV_F_SUPPORT + bool + default n + depends on CPU_AMD_SOCKET_940 + +#Opteron K8 1G HT Support +config K8_HT_FREQ_1G_SUPPORT + hex + default 1 + depends on CPU_AMD_SOCKET_940 Property changes on: trunk/coreboot-v2/src/cpu/amd/socket_940/Kconfig ___ Added: svn:mergeinfo + Copied: trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc (from rev 4564, trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc) === --- trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc (rev 0) +++ trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-08-25 14:22:58 UTC (rev 4574) @@ -0,0 +1,2 @@ +obj-y += socket_940.o +subdirs-y += ../model_fxx Property changes on: trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc ___ Added: svn:mergeinfo + Modified: trunk/coreboot-v2/src/cpu/amd/socket_AM2/Kconfig === --- trunk/coreboot-v2/src/cpu/amd/socket_AM2/Kconfig2009-08-25 13:53:14 UTC (rev 4573) +++ trunk/coreboot-v2/src/cpu/amd/socket_AM2/Kconfig2009-08-25 14:22:58 UTC (rev 4574) @@ -8,8 +8,8 @@ depends on CPU_AMD_SOCKET_AM2 config K8_REV_F_SUPPORT - hex - default 1 + bool + default y depends on CPU_AMD_SOCKET_AM2 # Opteron K8 1G HT support Modified: trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc 2009-08-25 13:53:14 UTC (rev 4573) +++ trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc 2009-08-25 14:22:58 UTC (rev 4574) @@ -1,15 +1,2 @@ obj-y += socket_AM2.o subdirs-y += ../model_fxx -subdirs-y += ../dualcore
[coreboot] [v2] r4575 - trunk/coreboot-v2/src/mainboard
Author: myles Date: 2009-08-25 16:41:38 +0200 (Tue, 25 Aug 2009) New Revision: 4575 Modified: trunk/coreboot-v2/src/mainboard/Kconfig Log: Add vendor strings in mainboard/Kconfig. Trivial. Signed-off-by: Myles Watson myle...@gmail.com Acked-by: Myles Watson myle...@gmail.com Modified: trunk/coreboot-v2/src/mainboard/Kconfig === --- trunk/coreboot-v2/src/mainboard/Kconfig 2009-08-25 14:22:58 UTC (rev 4574) +++ trunk/coreboot-v2/src/mainboard/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) @@ -97,24 +97,224 @@ config MAINBOARD_VENDOR string + default A-Trend + depends on VENDOR_ATREND + +config MAINBOARD_VENDOR + string + default Abit + depends on VENDOR_ABIT + +config MAINBOARD_VENDOR + string + default Advantech + depends on VENDOR_ADVANTECH + +config MAINBOARD_VENDOR + string + default agami + depends on VENDOR_AGAMI + +config MAINBOARD_VENDOR + string + default AMD + depends on VENDOR_AMD + +config MAINBOARD_VENDOR + string + default Arima + depends on VENDOR_ARIMA + +config MAINBOARD_VENDOR + string + default Artec Group + depends on VENDOR_ARTEC + +config MAINBOARD_VENDOR + string + default ASI + depends on VENDOR_ASI + +config MAINBOARD_VENDOR + string + default ASUS + depends on VENDOR_ASUS + +config MAINBOARD_VENDOR + string + default AXUS + depends on VENDOR_AXUS + +config MAINBOARD_VENDOR + string + default AZZA + depends on VENDOR_AZZA + +config MAINBOARD_VENDOR + string + default BCOM + depends on VENDOR_BCOM + +config MAINBOARD_VENDOR + string + default Biostar + depends on VENDOR_BIOSTAR + +config MAINBOARD_VENDOR + string + default Broadcom + depends on VENDOR_BROADCOM + +config MAINBOARD_VENDOR + string + default Compaq + depends on VENDOR_COMPAQ + +config MAINBOARD_VENDOR + string + default Dell + depends on VENDOR_DELL + +config MAINBOARD_VENDOR + string + default DIGITAL-LOGIC + depends on VENDOR_DIGITALLOGIC + +config MAINBOARD_VENDOR + string + default EagleLion + depends on VENDOR_EAGLELION + +config MAINBOARD_VENDOR + string + default Embedded Planet + depends on VENDOR_EMBEDDEDPLANET + +config MAINBOARD_VENDOR + string default Emulation depends on VENDOR_EMULATION config MAINBOARD_VENDOR string + default GIGABYTE + depends on VENDOR_GIGABYTE + +config MAINBOARD_VENDOR + string + default HP + depends on VENDOR_HP + +config MAINBOARD_VENDOR + string + default IBM + depends on VENDOR_IBM + +config MAINBOARD_VENDOR + string + default IEI + depends on VENDOR_IEI + +config MAINBOARD_VENDOR + string + default Intel + depends on VENDOR_INTEL + +config MAINBOARD_VENDOR + string + default IWILL + depends on VENDOR_IWILL + +config MAINBOARD_VENDOR + string + default Jetway + depends on VENDOR_JETWAY + +config MAINBOARD_VENDOR + string default Kontron depends on VENDOR_KONTRON config MAINBOARD_VENDOR string - default VIA - depends on VENDOR_VIA + default Lippert + depends on VENDOR_LIPPERT config MAINBOARD_VENDOR string - default AMD - depends on VENDOR_AMD + default Motorola + depends on VENDOR_MOTOROLA +config MAINBOARD_VENDOR + string + default MSI + depends on VENDOR_MSI + +config MAINBOARD_VENDOR + string + default NEC + depends on VENDOR_NEC + +config MAINBOARD_VENDOR + string + default Newisys + depends on VENDOR_NEWISYS + +config MAINBOARD_VENDOR + string + default NVIDIA + depends on VENDOR_NVIDIA + +config MAINBOARD_VENDOR + string + default OLPC + depends on VENDOR_OLPC + +config MAINBOARD_VENDOR + string + default PC Engines + depends on VENDOR_PCENGINES + +config MAINBOARD_VENDOR + string + default RCA + depends on VENDOR_RCA + +config MAINBOARD_VENDOR + string + default Sun + depends on VENDOR_SUNW + +config MAINBOARD_VENDOR + string + default Supermicro + depends on VENDOR_SUPERMICRO + +config MAINBOARD_VENDOR + string + default Technexion + depends on VENDOR_TECHNEXION + +config MAINBOARD_VENDOR + string + default Thomson + depends on VENDOR_THOMSON + +config MAINBOARD_VENDOR + string + default Total Impact + depends on VENDOR_TOTALIMPACT + +config MAINBOARD_VENDOR + string + default Tyan + depends on VENDOR_TYAN + +config MAINBOARD_VENDOR + string + default VIA + depends
Re: [coreboot] socket 940 Kconfig
Acked-by: Stefan Reinauer ste...@coresystems.de Rev. 4574 Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4576 - in trunk/coreboot-v2/src/mainboard: amd/serengeti_cheetah kontron msi via/epia-n via/vt8454c
Author: uwe Date: 2009-08-25 16:51:25 +0200 (Tue, 25 Aug 2009) New Revision: 4576 Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig trunk/coreboot-v2/src/mainboard/kontron/Kconfig trunk/coreboot-v2/src/mainboard/msi/Kconfig trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig Log: Replace PIRQ_TABLE with HAVE_PIRQ_TABLE, the former doesn't exist. Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Stefan Reinauer ste...@coresystems.de Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig === --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-08-25 14:51:25 UTC (rev 4576) @@ -12,7 +12,7 @@ select SOUTHBRIDGE_AMD_AMD8111 select SOUTHBRIDGE_AMD_AMD8131 select SUPERIO_WINBOND_W83627HF - select PIRQ_TABLE + select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR help AMD Serengeti Cheetah mainboard. Modified: trunk/coreboot-v2/src/mainboard/kontron/Kconfig === --- trunk/coreboot-v2/src/mainboard/kontron/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) +++ trunk/coreboot-v2/src/mainboard/kontron/Kconfig 2009-08-25 14:51:25 UTC (rev 4576) @@ -10,7 +10,7 @@ select NORTHBRIDGE_INTEL_I945 select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG - select PIRQ_TABLE + select HAVE_PIRQ_TABLE select MMCONF_SUPPORT select USE_PRINTK_IN_CAR help Modified: trunk/coreboot-v2/src/mainboard/msi/Kconfig === --- trunk/coreboot-v2/src/mainboard/msi/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) +++ trunk/coreboot-v2/src/mainboard/msi/Kconfig 2009-08-25 14:51:25 UTC (rev 4576) @@ -29,7 +29,7 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801XX select SUPERIO_WINBOND_W83627HF - select PIRQ_TABLE + select HAVE_PIRQ_TABLE help MSI MS-6178 mainboard. Modified: trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig === --- trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) +++ trunk/coreboot-v2/src/mainboard/via/epia-n/Kconfig 2009-08-25 14:51:25 UTC (rev 4576) @@ -5,7 +5,7 @@ select NORTHBRIDGE_VIA_CN400 select SOUTHBRIDGE_VIA_VT8237R select SUPERIO_WINBOND_W83697HF - select PIRQ_TABLE + select HAVE_PIRQ_TABLE select USE_PRINTK_IN_CAR help VIA EPIA-N mainboard. Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig === --- trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Kconfig 2009-08-25 14:51:25 UTC (rev 4576) @@ -5,7 +5,7 @@ select NORTHBRIDGE_VIA_CX700 # select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_VIA_VT1211 - select PIRQ_TABLE + select HAVE_PIRQ_TABLE # select MMCONF_SUPPORT select USE_PRINTK_IN_CAR help -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Replace PIRQ_TABLE with HAVE_PIRQ_TABLE
On Tue, Aug 25, 2009 at 03:37:52PM +0200, Stefan Reinauer wrote: Acked-by: Stefan Reinauer ste...@coresystems.de Thanks, r4576. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] socket 940 Kconfig
On Mon, Aug 24, 2009 at 11:01 AM, Myles Watsonmyle...@gmail.com wrote: Move common files from socket_F, socket_AM2, and socket_940 into model_fxx. This may be good for this model and set of sockets but may be a problem in general. If some future socket includes both model_fxx, AND includes some other model, is there any problem that may occur if the subdirs-y for some directories are executed twice? Remember, you are not only setting up sockets/models for one part of one cpu family, you are setting up a pattern which others will follow. Be very careful about that! If there is no problem, I guess this change is ok. I'm not that comfortable with it, however. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4577 - in trunk/coreboot-v2: . src/arch/i386 util/x86emu
Author: uwe
Date: 2009-08-25 17:03:20 +0200 (Tue, 25 Aug 2009)
New Revision: 4577
Modified:
trunk/coreboot-v2/Makefile
trunk/coreboot-v2/src/arch/i386/Makefile.inc
trunk/coreboot-v2/util/x86emu/Makefile
Log:
Improve build output.
The Makefile prints need to be @printf -- not $(Q)printf -- as they should
(1) be printed always (with 'make' _and_ with 'make V=1'),
(2) but the printf command itself should not be printed, hence the '@'.
Signed-off-by: Uwe Hermann u...@hermann-uwe.de
Acked-by: Uwe Hermann u...@hermann-uwe.de
Modified: trunk/coreboot-v2/Makefile
===
--- trunk/coreboot-v2/Makefile 2009-08-25 14:51:25 UTC (rev 4576)
+++ trunk/coreboot-v2/Makefile 2009-08-25 15:03:20 UTC (rev 4577)
@@ -143,49 +143,49 @@
define objs_c_template
$(obj)/$(1)%.o: src/$(1)%.c
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 $$(CFLAGS) -c -o $$@ $$
endef
define objs_S_template
$(obj)/$(1)%.o: src/$(1)%.S
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 -DASSEMBLY $$(CFLAGS) -c -o $$@ $$
endef
define initobjs_c_template
$(obj)/$(1)%.o: src/$(1)%.c
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 $$(CFLAGS) -c -o $$@ $$
endef
define initobjs_S_template
$(obj)/$(1)%.o: src/$(1)%.S
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 -DASSEMBLY $$(CFLAGS) -c -o $$@ $$
endef
define drivers_c_template
$(obj)/$(1)%.o: src/$(1)%.c
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 $$(CFLAGS) -c -o $$@ $$
endef
define drivers_S_template
$(obj)/$(1)%.o: src/$(1)%.S
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 -DASSEMBLY $$(CFLAGS) -c -o $$@ $$
endef
define smmobjs_c_template
$(obj)/$(1)%.o: src/$(1)%.c
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 $$(CFLAGS) -c -o $$@ $$
endef
define smmobjs_S_template
$(obj)/$(1)%.o: src/$(1)%.S
- $(Q)printf CC $$(subst $$(shell pwd)/,,$$(@))\n
+ @printf CC $$(subst $$(shell pwd)/,,$$(@))\n
$(Q)$(CC) -m32 $$(CFLAGS) -c -o $$@ $$
endef
@@ -246,7 +246,7 @@
$(Q)test -n $(alldirs) mkdir -p $(alldirs) || true
prepare2:
- $(Q)printf GEN$(subst $(shell pwd)/,,$(obj)/build.h)\n
+ @printf GEN$(subst $(shell pwd)/,,$(obj)/build.h)\n
$(Q)printf #define COREBOOT_VERSION \$(KERNELVERSION)\\n
$(obj)/build.h
$(Q)printf #define COREBOOT_EXTRA_VERSION
\$(COREBOOT_EXTRA_VERSION)\\n $(obj)/build.h
$(Q)printf #define COREBOOT_V2 \$(COREBOOT_V2)\\n $(obj)/build.h
@@ -292,7 +292,7 @@
$(Q)awk '/^#define ([^])* ([^])*$$/ {print $$2 = $$3 ;;}' $
$@
$(obj)/romcc: $(top)/util/romcc/romcc.c
- $(Q)printf HOSTCC romcc
+ @printf HOSTCC romcc
$(HOSTCC) -g -O2 -Wall -o $@ $
.PHONY: $(PHONY) prepare prepare2 clean distclean doxygen doxy coreboot
Modified: trunk/coreboot-v2/src/arch/i386/Makefile.inc
===
--- trunk/coreboot-v2/src/arch/i386/Makefile.inc2009-08-25 14:51:25 UTC
(rev 4576)
+++ trunk/coreboot-v2/src/arch/i386/Makefile.inc2009-08-25 15:03:20 UTC
(rev 4577)
@@ -18,20 +18,20 @@
$(Q)$(CBFSTOOL) $@ create $(shell expr 1024 \*
$(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock
$(Q)if [ -f fallback/coreboot_apc ]; \
then \
- $(Q) $(CBFSTOOL) $@ add-stage fallback/coreboot_apc
fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
+ $(Q)$(CBFSTOOL) $@ add-stage fallback/coreboot_apc
fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
fi
$(Q)$(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram
$(CBFS_COMPRESS_FLAG)
ifeq ($(CONFIG_PAYLOAD_NONE),y)
- $(Q)printf PAYLOADnone (as specified by user)\n
+ @printf PAYLOADnone (as specified by user)\n
else
- $(Q) printf PAYLOAD$(CONFIG_FALLBACK_PAYLOAD_FILE)
$(COMPRESSFLAG)\n
+ @printf PAYLOAD$(CONFIG_FALLBACK_PAYLOAD_FILE)
$(COMPRESSFLAG)\n
$(Q)$(CBFSTOOL) ./build/coreboot.rom add-payload
$(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG)
ifeq ($(CONFIG_VGA_BIOS),y)
- $(Q) printf
[coreboot] [PATCH]Less noisy Makefile format
Hi, attached patch uses the gnu make .SILENT: mechanism instead of requiring $(Q) in front of every silent line. make V=1 or make Q= still make make noisy again. I checked operation by building a couple of boards, and looked over the diff, but the removal of the $(Q)s was an automatic one, and I might have missed some mistake introduced by improper tool use Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de Index: src/arch/i386/Makefile.inc === --- src/arch/i386/Makefile.inc (Revision 4577) +++ src/arch/i386/Makefile.inc (Arbeitskopie) @@ -14,24 +14,24 @@ # Build the final rom image $(obj)/coreboot.rom: $(obj)/coreboot.bootblock $(obj)/coreboot_ram $(CBFSTOOL) - $(Q)rm -f $@ - $(Q)$(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock - $(Q)if [ -f fallback/coreboot_apc ]; \ + rm -f $@ + $(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock + if [ -f fallback/coreboot_apc ]; \ then \ - $(Q)$(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \ + $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \ fi - $(Q)$(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y) @printf PAYLOADnone (as specified by user)\n else @printf PAYLOAD$(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n - $(Q)$(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_VGA_BIOS),y) @printf VGABIOS$(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n - $(Q)$(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom optionrom + $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom optionrom endif @printf CBFSPRINT ./build/coreboot.rom\n\n - $(Q)$(CBFSTOOL) build/coreboot.rom print + $(CBFSTOOL) build/coreboot.rom print endif @@ -40,53 +40,53 @@ $(obj)/coreboot.bootblock: $(obj)/coreboot @printf OBJCOPY$(subst $(obj)/,,$(@))\n - $(Q)$(OBJCOPY) -O binary $ $@ + $(OBJCOPY) -O binary $ $@ $(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions - $(Q)printf 'INCLUDE ldoptions\n' $@ - $(Q)printf '$(foreach ldscript,$(ldscripts),INCLUDE $(ldscript)\n)' $@ + printf 'INCLUDE ldoptions\n' $@ + printf '$(foreach ldscript,$(ldscripts),INCLUDE $(ldscript)\n)' $@ $(obj)/crt0_includes.h: $(crt0s) - $(Q)printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include $(crt0)\n)' $@ + printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include $(crt0)\n)' $@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s - $(Q)$(CC) -I$(obj) -Wa,-acdlns -c -o $@ $ $(dir $@)/crt0.disasm + $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $ $(dir $@)/crt0.disasm $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/crt0_includes.h - $(Q)$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $ $...@.new mv $...@.new $@ + $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $ $...@.new mv $...@.new $@ $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld @printf LINK $(subst $(obj)/,,$(@))\n - $(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs) - $(Q)$(NM) -n $(obj)/coreboot | sort $(obj)/coreboot.map + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs) + $(NM) -n $(obj)/coreboot | sort $(obj)/coreboot.map ### # i386 specific tools $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout @printf OPTION $(subst $(obj)/,,$(@))\n - $(Q)$(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c + $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h @printf HOSTCC $(subst $(obj)/,,$(@))\n - $(Q)$(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $ -o $@ + $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $ -o $@
Re: [coreboot] Seabios/Coreboot USB Keyboard support
hi, I am still working on usb msc devices, hope my work can support usb keyboard later. On Tue, Aug 25, 2009 at 9:32 PM, Arnaud Maye arnaud.m...@4dsp.com wrote: Hello Gents, Just wanted to know if the the development moved since December 2008 around this. To proceed with something as simple as installing windows from CD one need to react about Press any key to boot from cdrom. Thank you! Arnaud -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot -- Jason Wang Peking University -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH]Less noisy Makefile format
Acked-by: Ronald G. Minnich rminn...@gmail.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [v2] r4575 - trunk/coreboot-v2/src/mainboard
On Tue, Aug 25, 2009 at 04:41:38PM +0200, s...@coreboot.org wrote: Add vendor strings in mainboard/Kconfig. Trivial. Signed-off-by: Myles Watson myle...@gmail.com Acked-by: Myles Watson myle...@gmail.com Modified: trunk/coreboot-v2/src/mainboard/Kconfig === --- trunk/coreboot-v2/src/mainboard/Kconfig 2009-08-25 14:22:58 UTC (rev 4574) +++ trunk/coreboot-v2/src/mainboard/Kconfig 2009-08-25 14:41:38 UTC (rev 4575) @@ -97,24 +97,224 @@ config MAINBOARD_VENDOR string + default A-Trend + depends on VENDOR_ATREND + +config MAINBOARD_VENDOR + string + default Abit + depends on VENDOR_ABIT + Am I guessing correctly that the rationale here is that boards don't need to do this: +config MAINBOARD_VENDOR + string + default MSI + depends on BOARD_MSI_MS6178 + +config MAINBOARD_PART_NUMBER + string + default MS-6178 + depends on BOARD_MSI_MS6178 But instead this should be sufficient per-board? +config MAINBOARD_PART_NUMBER + string + default MS-6178 + depends on BOARD_MSI_MS6178 Thanks, Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [v2] r4575 - trunk/coreboot-v2/src/mainboard
Am I guessing correctly that the rationale here is that boards don't need to do this: +config MAINBOARD_VENDOR + string + default MSI + depends on BOARD_MSI_MS6178 + +config MAINBOARD_PART_NUMBER + string + default MS-6178 + depends on BOARD_MSI_MS6178 But instead this should be sufficient per-board? +config MAINBOARD_PART_NUMBER + string + default MS-6178 + depends on BOARD_MSI_MS6178 That's what I was hoping. Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Revert socket abstraction change
I agree that it's dangerous because it's not abstracted correctly yet. I'm not sure what the right fix is, but I don't think there should be this much duplication in every socket Makefile.inc. Maybe the best thing would be for someone to take a socket that supports two families and implement it for Kconfig so that we can see what shakes out. Signed-off-by: Myles Watson myle...@gmail.com Thanks, Myles Index: src/cpu/amd/socket_940/Makefile.inc === --- src/cpu/amd/socket_940/Makefile.inc (revision 4577) +++ src/cpu/amd/socket_940/Makefile.inc (working copy) @@ -1,2 +1,13 @@ obj-y += socket_940.o subdirs-y += ../model_fxx +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae Index: src/cpu/amd/model_fxx/Makefile.inc === --- src/cpu/amd/model_fxx/Makefile.inc (revision 4577) +++ src/cpu/amd/model_fxx/Makefile.inc (working copy) @@ -4,16 +4,3 @@ obj-y += model_fxx_update_microcode.o obj-y += processor_name.o obj-y += powernow_acpi.o -subdirs-y += ../dualcore -subdirs-y += ../mtrr -subdirs-y += ../microcode -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu -subdirs-y += ../../x86/mmx -subdirs-y += ../../x86/sse -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/pae -subdirs-y += ../../x86/smm Index: src/cpu/amd/socket_AM2/Makefile.inc === --- src/cpu/amd/socket_AM2/Makefile.inc (revision 4577) +++ src/cpu/amd/socket_AM2/Makefile.inc (working copy) @@ -1,2 +1,15 @@ obj-y += socket_AM2.o subdirs-y += ../model_fxx +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../microcode +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae +subdirs-y += ../../x86/smm Index: src/cpu/amd/socket_F/Makefile.inc === --- src/cpu/amd/socket_F/Makefile.inc (revision 4577) +++ src/cpu/amd/socket_F/Makefile.inc (working copy) @@ -1,2 +1,14 @@ obj-y += socket_F.o subdirs-y += ../model_fxx +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae +subdirs-y += ../../x86/smm -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Revert socket abstraction change
Acked-by: Ronald G. Minnich rminn...@gmail.com Myles, not sure which is right, but per IRC discussion, let's take this one slowly for now. It's easy to fix later. thanks again ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4578 - in trunk/coreboot-v2/src/cpu/amd: model_fxx socket_940 socket_AM2 socket_F
Author: myles Date: 2009-08-25 18:04:45 +0200 (Tue, 25 Aug 2009) New Revision: 4578 Modified: trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc Log: Revert socket abstraction. Signed-off-by: Myles Watson myle...@gmail.com Acked-by: Ronald G. Minnich rminn...@gmail.com Modified: trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc2009-08-25 15:03:20 UTC (rev 4577) +++ trunk/coreboot-v2/src/cpu/amd/model_fxx/Makefile.inc2009-08-25 16:04:45 UTC (rev 4578) @@ -4,16 +4,3 @@ obj-y += model_fxx_update_microcode.o obj-y += processor_name.o obj-y += powernow_acpi.o -subdirs-y += ../dualcore -subdirs-y += ../mtrr -subdirs-y += ../microcode -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/fpu -subdirs-y += ../../x86/mmx -subdirs-y += ../../x86/sse -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/pae -subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-08-25 15:03:20 UTC (rev 4577) +++ trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-08-25 16:04:45 UTC (rev 4578) @@ -1,2 +1,13 @@ obj-y += socket_940.o subdirs-y += ../model_fxx +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae Modified: trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc 2009-08-25 15:03:20 UTC (rev 4577) +++ trunk/coreboot-v2/src/cpu/amd/socket_AM2/Makefile.inc 2009-08-25 16:04:45 UTC (rev 4578) @@ -1,2 +1,15 @@ obj-y += socket_AM2.o subdirs-y += ../model_fxx +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../microcode +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae +subdirs-y += ../../x86/smm Modified: trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc 2009-08-25 15:03:20 UTC (rev 4577) +++ trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc 2009-08-25 16:04:45 UTC (rev 4578) @@ -1,2 +1,14 @@ obj-y += socket_F.o subdirs-y += ../model_fxx +subdirs-y += ../dualcore +subdirs-y += ../mtrr +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/fpu +subdirs-y += ../../x86/mmx +subdirs-y += ../../x86/sse +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/pae +subdirs-y += ../../x86/smm -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Revert socket abstraction change
On Tue, Aug 25, 2009 at 10:01 AM, ron minnichrminn...@gmail.com wrote: Acked-by: Ronald G. Minnich rminn...@gmail.com Rev 4578. Myles, not sure which is right, but per IRC discussion, let's take this one slowly for now. Sure. It's easy to fix later. Agreed. Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Revert socket abstraction change
On Tue, Aug 25, 2009 at 10:05 AM, Myles Watsonmyle...@gmail.com wrote: On Tue, Aug 25, 2009 at 10:01 AM, ron minnichrminn...@gmail.com wrote: Acked-by: Ronald G. Minnich rminn...@gmail.com Rev 4578. I just realized that there was no microcode included for socket F, and socket 940 needs it. I need to add it back in. Should I add it for socket F at the same time? Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Revert socket abstraction change
On Tue, Aug 25, 2009 at 9:07 AM, Myles Watsonmyle...@gmail.com wrote: On Tue, Aug 25, 2009 at 10:05 AM, Myles Watsonmyle...@gmail.com wrote: On Tue, Aug 25, 2009 at 10:01 AM, ron minnichrminn...@gmail.com wrote: Acked-by: Ronald G. Minnich rminn...@gmail.com Rev 4578. I just realized that there was no microcode included for socket F, and socket 940 needs it. I need to add it back in. Should I add it for socket F at the same time? yes please. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4579 - in trunk/coreboot-v2/src/cpu/amd: socket_940 socket_F
Author: myles Date: 2009-08-25 18:18:11 +0200 (Tue, 25 Aug 2009) New Revision: 4579 Modified: trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc Log: Add microcode to socket_940 and socket_F. Part of the last reverting commit. Signed-off-by: Myles Watson myle...@gmail.com Acked-by: Ronald G. Minnich rminn...@gmail.com Modified: trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-08-25 16:04:45 UTC (rev 4578) +++ trunk/coreboot-v2/src/cpu/amd/socket_940/Makefile.inc 2009-08-25 16:18:11 UTC (rev 4579) @@ -2,6 +2,7 @@ subdirs-y += ../model_fxx subdirs-y += ../dualcore subdirs-y += ../mtrr +subdirs-y += ../microcode subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/fpu Modified: trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc === --- trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc 2009-08-25 16:04:45 UTC (rev 4578) +++ trunk/coreboot-v2/src/cpu/amd/socket_F/Makefile.inc 2009-08-25 16:18:11 UTC (rev 4579) @@ -2,6 +2,7 @@ subdirs-y += ../model_fxx subdirs-y += ../dualcore subdirs-y += ../mtrr +subdirs-y += ../microcode subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/fpu -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Revert socket abstraction change
I just realized that there was no microcode included for socket F, and socket 940 needs it. I need to add it back in. Should I add it for socket F at the same time? yes please. Rev 4579. Now the only difference is that I didn't include smm for socket_940. I don't think there are any socket_940 boards with smm support. Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] ECC with AMD Family 10h processors
Are there any guidelines or code for setting up DRAM ECC mode in memory controller of AMD Family 10h processors? I mean beyond what BKDG has to say on that. Thank you! -- Andriy Gapon -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [PATCH]unify types in kconfig
Hi, attached patch makes PCI_ROM_RUN a boolean (like it is elsewhere), which is the correct choice, too. Avoids type problems in kconfig Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de Index: src/Kconfig === --- src/Kconfig (Revision 4577) +++ src/Kconfig (Arbeitskopie) @@ -85,8 +85,8 @@ default 1 config PCI_ROM_RUN - int - default 0 + bool + default n config HT_CHAIN_UNITID_BASE int Index: src/mainboard/amd/serengeti_cheetah/Kconfig === --- src/mainboard/amd/serengeti_cheetah/Kconfig (Revision 4577) +++ src/mainboard/amd/serengeti_cheetah/Kconfig (Arbeitskopie) @@ -189,7 +189,7 @@ depends on BOARD_AMD_SERENGETI_CHEETAH config PCI_ROM_RUN - int - default 1 + bool + default y depends on BOARD_AMD_SERENGETI_CHEETAH -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [PATCH]modify make menuconfig output
In the mainboard selection, the selected mainboard is printed twice in
certain cases, this patch eliminates the second mention.
This change might have unintended side-effects, but seems to work okay
Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de
Index: mconf.c
===
--- mconf.c (Revision 4577)
+++ mconf.c (Arbeitskopie)
@@ -506,11 +506,14 @@
if (def_menu) {
item_add_str( (%s), _(menu_get_prompt(def_menu)));
item_add_str( ---);
+#if 0
+/* coreboot doesn't need this representation */
if (def_menu-list) {
indent += 2;
build_conf(def_menu);
indent -= 2;
}
+#endif
}
return;
}
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH]unify types in kconfig
attached patch makes PCI_ROM_RUN a boolean (like it is elsewhere), which is the correct choice, too. Avoids type problems in kconfig I agree with the type change. I think setting it in a mainboard Kconfig is a mistake. I tried to build Serengeti_cheetah without VGA to test something and it was a pain. Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de Acked-by: Myles Watson myle...@gmail.com Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH]modify make menuconfig output
On Tue, Aug 25, 2009 at 10:56 AM, Patrick Georgipatr...@georgi-clan.de wrote: In the mainboard selection, the selected mainboard is printed twice in certain cases, this patch eliminates the second mention. This change might have unintended side-effects, but seems to work okay I'd rather fix the offending boards. Isn't it board-specific? Maybe I haven't seen all the cases. Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH]unify types in kconfig
On Tue, Aug 25, 2009 at 10:58:44AM -0600, Myles Watson wrote: attached patch makes PCI_ROM_RUN a boolean (like it is elsewhere), which is the correct choice, too. Avoids type problems in kconfig I agree with the type change. Ditto, I was going to post the same patch also :) Acked-by: Uwe Hermann u...@hermann-uwe.de I think setting it in a mainboard Kconfig is a mistake. I tried to build Serengeti_cheetah without VGA to test something and it was a pain. Hm, you could be right. This was per-mainboard in Config.lb, but in kconfig it should be a global/common option, and not set in each board. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH]modify make menuconfig output
Am Dienstag, den 25.08.2009, 11:10 -0600 schrieb Myles Watson:
On Tue, Aug 25, 2009 at 10:56 AM, Patrick Georgipatr...@georgi-clan.de
wrote:
In the mainboard selection, the selected mainboard is printed twice in
certain cases, this patch eliminates the second mention.
This change might have unintended side-effects, but seems to work okay
I'd rather fix the offending boards. Isn't it board-specific? Maybe
I haven't seen all the cases.
No, it's specific to the Kconfig source layout:
choice
config { THE BOARDS }
config { THE BOARDS' DEPENDENCIES }
endchoice
To fix that, we'd have to do
choice
config { THE BOARDS }
endchoice
config { THE BOARDS' DEPENDENCIES }
which doesn't work with the source statement
Patrick
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Re: [coreboot] [PATCH]unify types in kconfig
On Tue, Aug 25, 2009 at 10:14 AM, Uwe Hermannu...@hermann-uwe.de wrote: Hm, you could be right. This was per-mainboard in Config.lb, but in kconfig it should be a global/common option, and not set in each board. yes, we really need to start using the power of Kconfig now. Let's make it so people can choose this in menuconfig. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Enable Direct TMDS for the RS690
On Fri, Aug 21, 2009 at 12:36 PM, Daniel Toussaintdan...@dmhome.net wrote:
Enable Direct TMDS for the RS690, which allows to display on HDMI and DVI
monitors.
Signed-off-by: Libra Li libra...@technexion.com
Hi,
Thanks for the patch.
Why add the code to step 6 in rs690_gfx.c when there seems to be a
spot reserved for it in step 2?
/* step 2, TMDS, (only need if CMOS option is enabled) */
if (cfg-gfx_tmds) {
}
Marc
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Re: [coreboot] [PATCH]unify types in kconfig
On Tue, Aug 25, 2009 at 11:37 AM, ron minnichrminn...@gmail.com wrote: On Tue, Aug 25, 2009 at 10:14 AM, Uwe Hermannu...@hermann-uwe.de wrote: Hm, you could be right. This was per-mainboard in Config.lb, but in kconfig it should be a global/common option, and not set in each board. yes, we really need to start using the power of Kconfig now. Let's make it so people can choose this in menuconfig. Here's my attempt. It doesn't build yet due to my util confusion. Signed-off-by: Myles Watson myle...@gmail.com Thanks, Myles Index: src/Kconfig === --- src/Kconfig (revision 4580) +++ src/Kconfig (working copy) @@ -84,10 +84,6 @@ int default 1 -config PCI_ROM_RUN - bool - default n - config HT_CHAIN_UNITID_BASE int default 1 Index: src/mainboard/amd/serengeti_cheetah/Kconfig === --- src/mainboard/amd/serengeti_cheetah/Kconfig (revision 4580) +++ src/mainboard/amd/serengeti_cheetah/Kconfig (working copy) @@ -188,8 +188,3 @@ default y depends on BOARD_AMD_SERENGETI_CHEETAH -config PCI_ROM_RUN - bool - default y - depends on BOARD_AMD_SERENGETI_CHEETAH - Index: src/devices/Kconfig === --- src/devices/Kconfig (revision 4580) +++ src/devices/Kconfig (working copy) @@ -21,33 +21,35 @@ menu Devices config VGA_ROM_RUN - bool + bool Run VGA Option ROMs help - Execute PCI/AGP option ROMs if available. This is required to - enable PCI/AGP VGA plugin cards. + Execute VGA option ROMs if found. This is required to enable PCI/AGP + VGA plugin cards. -choice - prompt Execute PCI option ROMs - default PCI_OPTION_ROM_RUN_REALMODE +config PCI_ROM_RUN + bool Run non-VGA Option ROMs help - Execute PCI/AGP option ROMs if available. You can choose to - execute PCI option ROMs natively (32bit x86 system required), - in an emulator (x86emu), or ignore option ROM execution. + Execute non-VGA PCI option ROMs if found. -config PCI_OPTION_ROM_RUN_REALMODE - prompt Run VGA ROMs - bool - select VGA_ROM_RUN - help - Execute PCI/AGP option ROMs if available. This is required to - enable PCI/AGP VGA plugin cards. +choice +prompt Option ROM Execution +default PCI_OPTION_ROM_RUN_REALMODE + depends on PCI_ROM_RUN || VGA_ROM_RUN +help + You can choose to execute PCI option ROMs natively (32bit x86 system + required) or in an emulator (x86emu or YABEL). -config NO_RUN - prompt Do NOT run VGA ROMs - bool - help - Do not execute PCI/AGP option ROMs. + config PCI_OPTION_ROM_RUN_REALMODE + prompt Real mode + bool + config PCI_OPTION_ROM_RUN_YABEL + prompt YABEL + bool + + config PCI_OPTION_ROM_RUN_X86EMU + prompt X86EMU + bool endchoice endmenu -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [v2] r4582 - in trunk/coreboot-v2: documentation util/x86emu
Author: myles
Date: 2009-08-25 21:46:50 +0200 (Tue, 25 Aug 2009)
New Revision: 4582
Modified:
trunk/coreboot-v2/documentation/Kconfig.tex
trunk/coreboot-v2/util/x86emu/Makefile.inc
Log:
Correct typos /subdir/subdirs/ in documentation and util/x86emu/Makefile.inc.
Signed-off-by: Myles Watson myle...@gmail.com
Acked-by: Myles Watson myle...@gmail.com
Modified: trunk/coreboot-v2/documentation/Kconfig.tex
===
--- trunk/coreboot-v2/documentation/Kconfig.tex 2009-08-25 19:38:46 UTC (rev
4581)
+++ trunk/coreboot-v2/documentation/Kconfig.tex 2009-08-25 19:46:50 UTC (rev
4582)
@@ -21,8 +21,8 @@
There is only one Makefile, at the top level. All other makefiles are included
as Makefile.inc. All the next-level Makefile.inc files are selected in the top
level Makefile. Directories that are platform-independent are in BUILD-y;
platform-dependent (e.g. Makefile.inc's that depend on architecture) are
included in PLATFORM-y.
Make is not recursive. There is only one make process.
-\subsection{subdir usage}
-Further includes of Makefile.inc, if needed, are done via subdir-y commands.
As in Linux, the subdir can be conditional or unconditional. Conditional
includes are done via subdir-\$(CONFIG\_VARIABLE) usage; unconditional are done
via subdir-y.
+\subsection{subdirs usage}
+Further includes of Makefile.inc, if needed, are done via subdirs-y commands.
As in Linux, the subdirs can be conditional or unconditional. Conditional
includes are done via subdirs-\$(CONFIG\_VARIABLE) usage; unconditional are
done via subdirs-y.
We define the common rules for which variation to use below.
\subsection{object file specification}
Modified: trunk/coreboot-v2/util/x86emu/Makefile.inc
===
--- trunk/coreboot-v2/util/x86emu/Makefile.inc 2009-08-25 19:38:46 UTC (rev
4581)
+++ trunk/coreboot-v2/util/x86emu/Makefile.inc 2009-08-25 19:46:50 UTC (rev
4582)
@@ -18,9 +18,9 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-subdir-$(CONFIG_PCI_OPTION_ROM_RUN_X86EMU) += x86emu
+subdirs-$(CONFIG_PCI_OPTION_ROM_RUN_X86EMU) += x86emu
obj-$(CONFIG_PCI_OPTION_ROM_RUN_X86EMU) += biosemu.c
-subdir-$(CONFIG_PCI_OPTION_ROM_RUN_X86EMU) += pcbios
+subdirs-$(CONFIG_PCI_OPTION_ROM_RUN_X86EMU) += pcbios
obj-$(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) += x86.o
obj-$(CONFIG_PCI_OPTION_ROM_RUN_REALMODE) += x86_asm.o
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Re: [coreboot] unstable AMD Fam10h boot
Hi Patrick, On Tue, Aug 25, 2009 at 02:53:19PM +0200, Patrick Georgi wrote: I have some issues with an Fam10h board here. Every once in a while, boot fails with FIXME! CPU Version unknown or not supported!. The CPU Version mask that is calculated at the location the patch changes is 0x10efff. This value appears if the result of the cpuid call (or NB probe) is 0xff (the highest 8 bits aren't counted in, it might be 0x, too)' I've seen this occasionally, too. I suspected compiler issues again... Thanks, Ward. -- Ward Vandewege w...@fsf.org Free Software Foundation - Senior Systems Administrator -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Kconfig and util/
On Tue, Aug 25, 2009 at 11:57 AM, Myles Watsonmyle...@gmail.com wrote: How do you include anything in util in a build? fixed by changing subdir- to subdirs. Thanks, Myles -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH]modify make menuconfig output
Am Dienstag, den 25.08.2009, 14:13 -0600 schrieb Myles Watson: How about this fix? I thought about that, but it has the disadvantage that it spreads the configuration of the board across two files. I'm not sure what the best fix is... Patrick -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Development IDE
Thanks for your help. I will study Kscope because I didn't know this tool. Regards. Message du 25/08/09 à 10h32 De : mans...@iwavesystems.com A : coreboot@coreboot.org Copie à : Harald Gutmann harald.gutm...@gmx.net Objet : Re: [coreboot] Development IDE I use Kscope for both kernel development and coreboot http://kscope.sourceforge.net/ On 24.08.2009 22:45, Harald Gutmann wrote: On Monday 24 August 2009 22:36:35 Carl-Daniel Hailfinger wrote: On 24.08.2009 19:02, conged...@voila.fr wrote: I wanted to know which development IDE do you use to develop coreboot: Eclipse, Netbeans ... I can't find anything, any project under Eclipse or any other IDE. I use vim and grep. There is no IDE for coreboot development. Interesting, but do you use any extensions for vim? I really love vim, and use it for all kinds of text modification. :) Some time ago I came across this article: http://www.swaroopch.com/notes/Vim_en:Programmers_Editor and some things in there are really useful to use vim as IDE. IMHO a few bits of advice on that page encourage writing mediocre code (like focusing on typing speed instead of thinking), but making up for it with sheer size. Then again, this is probably a cultural thing. The only special vim features I use are syntax highlighting (always) and bracket bouncing (rarely). Autoindent is off. Each helper tool is run in a separate window, usually even on a different virtual desktop. I usually use 3-4 virtual desktops for development, each with another window open at the same time. Ctrl-Alt-Arrow for moving between virtual desktops in a 4x2 grid. Top row of desktops is for development, bottom row is for communication (web, mail, IRC). The exact window layout differs depending on the task (code/datasheet cross-checking, writing new generic code, writing new chip-specific code, or changing the architecture of some code). Window manager is fvwm2. ctags/cscope are nice, but I hardly ever need them outside orientation phases (and during orientation phases I usually read _all_ related code to avoid using ctags/cscope later). While using ctags/cscope can be a great timesaver, it is often even faster if you don't need them at all. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot --- DISCLAIMER: This e-mail and any attachment (s) is for authorised use by the intended recipient (s) only. It may contain proprietary material, confidential information and/or be subject to the legal privilege of iWave Systems Technologies Private Limited. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from retaining, using, copying, alerting or disclosing the content of this message. Thank you for your co-operation. -- --- DISCLAIMER: This e-mail and any attachment (s) is for authorised use by the intended recipient (s) only. It may contain proprietary material, confidential information and/or be subject to the legal privilege of iWave Systems Technologies Private Limited. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from retaining, using, copying, alerting or disclosing the content of this message. Thank you for your co-operation. -- -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot Envie de partager vos photos de vacances ? Voila vous offre 1 Go d’espace de stockage sur http://macle.voila.fr -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH] Enable Direct TMDS for the RS690
Hello,
I had reference AMD RS690 ASIC Family Register Programming
Requirements. It's in Chapter 6 PCIE Initialization for TMDS. That is
show step 6.
Thanks.
2009/8/26 Marc Jones marcj...@gmail.com
On Fri, Aug 21, 2009 at 12:36 PM, Daniel Toussaintdan...@dmhome.net
wrote:
Enable Direct TMDS for the RS690, which allows to display on HDMI and DVI
monitors.
Signed-off-by: Libra Li libra...@technexion.com
Hi,
Thanks for the patch.
Why add the code to step 6 in rs690_gfx.c when there seems to be a
spot reserved for it in step 2?
/* step 2, TMDS, (only need if CMOS option is enabled) */
if (cfg-gfx_tmds) {
}
Marc
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