[coreboot] Tyan S2912[Fam10] HTX problem

2009-08-11 Thread Maximilian Thuermer
Hi all,

I am trying to get an HTX plug in card running on a Tyan S2912 Fam10 System.
I tried both Barcelona and Shanghai CPUs and both system setups ended
booting
during PCI scanning.
I am not familiar with the PCI subsystem and the procedures of coreboot
regarding
this matter, but when scanning through the code, I do not even see why
the last
line is printed out twice whereas the procedure including the printout
only gets called
once with the specified parameters. Does anyone have an idea where I
could start
searching for a possible solution to my problem.

Thanks for the help in advance,

Maximilian Thuermer



coreboot-2.0.0-r4380:4526M_Fallback Tue Aug 11 15:51:58 CEST 2009
starting...

BSP Family_Model: 00100f42
*sysinfo range: [000cc000,000cdfa0]
bsp_apicid = 00
cpu_init_detectedx = 
microcode: rev id not found. Skipping microcode patch!
cpuSetAMDMSR  done
Enter amd_ht_init()
AMD_CB_EventNotify()
 event class: 05
 event: 1004
 data:  04  00  00  01
AMD_CB_ManualBUIDSwapList()
AMD_CB_EventNotify()
 event class: 05
 event: 2006
 data:  04  00  02  ff
Exit amd_ht_init()
cpuSetAMDPCI 00
On node 0, link 0 isOn node 0, link 1 isOn node 0, link 2 isOn node 0,
link 0 isOn node 0, link 1 isOn node 0, link 2 isOn node 0, link 0 e
cpuSetAMDPCI 01
On node 1, link 0 isOn node 1, link 1 isOn node 1, link 2 isOn node 1,
link 0 isOn node 1, link 1 isOn node 1, link 2 isOn node 1, link 0 e
Prep FID/VID Node:00
  F3x80: e600a681
  F3x84: a0e641e6
  F3xD4: c3310f24
  F3xD8: 03000916
  F3xDC: 5334
Prep FID/VID Node:01
  F3x80: e600a681
  F3x84: a0e641e6
  F3xD4: c3310f24
  F3xD8: 03000916
  F3xDC: 5334
setup_remote_node: 01 done
Start node 01 done.
Wait all core0s started
  Core0 started on node: 01
Wait all core0s started done
start_other_cores()
init node: 00  cores: 03
Start other core - nodeid: 00  cores: 03
init node: 01  cores: 03
reexx other core - nodeid: 01  cores:cco0coorr3e
-:   x::s t: a   r- t--e-d - { { a  { p A A
aPPApIIPCiCIIcICiDDI d D =:=   = F000o12 u 3 NnNONdODO DDE3EIEI IDDD w =
=or =x
:


0rroo2o1---mm--Pm-i -ii-cc  cs- trr{{r  o{aooc crc
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trsswiutuodeper:dpkd !ppc! ooi
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ene VVn
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tanw nago tpe1_o rs)a p uapinocppioticdr sti d=uepd: p2! 8 o
t1

EFFIdIX! MDV
 !ID FI CXoPnUM  E!VAP eCr: Ps8Ui o1Vn
rerusniknoonw unn korn ownno t osru npopotr tsuepdp! o
 te ddo! ne

uIiXnMitE_!f CiPdUvi dVe_rasp(isont augen1k)no wapni cori dn: o0t 2s
 FpIpDorVtIDe do! n
 AP d: o0ne2

 n  irt_efaidbdavicdk_ =a p2(s0t10a7g0e11)
(   acpiocmimodn:_ 4f1id
1pFIaDcVkeIdD) o n=  1A0P:7 040

Wait for AP stage 1: ap_apicid = 3
readback = 3010701
common_fid(packed) = 10700
common_fid = 10700
FID Change Node:00, F3xD4: c3310f27
FID Change Node:01, F3xD4: c3310f27
End FIDVIDMSR 0xc0010071 0x0083 0x30036040
mcp55_num:01
...WARM RESET...




coreboot-2.0.0-r4380:4526M_Fallback Tue Aug 11 15:51:58 CEST 2009
starting...

BSP Family_Model: 00100f42
*sysinfo range: [000cc000,000cdfa0]
bsp_apicid = 00
cpu_init_detectedx = 
microcode: rev id not found. Skipping microcode patch!
cpuSetAMDMSR  done
Enter amd_ht_init()
AMD_CB_EventNotify()
 event class: 05
 event: 1004
 data:  04  00  00  01
AMD_CB_ManualBUIDSwapList()
AMD_CB_EventNotify()
 event class: 05
 event: 2006
 data:  04  00  02  ff
Exit amd_ht_init()
cpuSetAMDPCI 00
On node 0, link 0 isOn node 0, link 1 isOn node 0, link 2 isOn node 0,
link 0 isOn node 0, link 1 isOn node 0, link 2 isOn node 0, link 0 e
cpuSetAMDPCI 01
On node 1, link 0 isOn node 1, link 1 isOn node 1, link 2 isOn node 1,
link 0 isOn 

Re: [coreboot] Tyan S2912[Fam10] HTX problem

2009-08-11 Thread Myles Watson


 -Original Message-
 From: coreboot-boun...@coreboot.org [mailto:coreboot-boun...@coreboot.org]
 On Behalf Of Maximilian Thuermer
 Sent: Tuesday, August 11, 2009 8:13 AM
 To: coreboot@coreboot.org
 Subject: [coreboot] Tyan S2912[Fam10] HTX problem
 
 Hi all,
 
 I am trying to get an HTX plug in card running on a Tyan S2912 Fam10
 System.
 I tried both Barcelona and Shanghai CPUs and both system setups ended
 booting
 during PCI scanning.
 I am not familiar with the PCI subsystem and the procedures of coreboot
 regarding
 this matter, but when scanning through the code, I do not even see why
 the last
 line is printed out twice whereas the procedure including the printout
 only gets called
 once with the specified parameters. Does anyone have an idea where I
 could start
 searching for a possible solution to my problem.
I would print out the path to each bridge in the scan to see where it's
getting stuck.  You can get that with dev_path(bus-dev).

It looks pretty normal up to that point.  It looks like it found your
chipset, 2 cpus, and a graphics card before it died.

If that doesn't help you track it down, an lspci would be helpful with the
information of which bridge it gets stuck scanning.  The values of the
Configuration Map registers 0xE0-EC might also help you track down where the
PCI requests are being routed.

 PCI: pci_scan_bus returning with max=004
 PCI: pci_scan_bus returning with max=004
I can't tell why it's printed twice either.

Good luck,
Myles


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Re: [coreboot] Tyan S2912[Fam10] HTX problem

2009-08-11 Thread Ward Vandewege
Hi Maximilian,

On Tue, Aug 11, 2009 at 04:12:39PM +0200, Maximilian Thuermer wrote:
 I am trying to get an HTX plug in card running on a Tyan S2912 Fam10 System.
 I tried both Barcelona and Shanghai CPUs and both system setups ended
 booting
 during PCI scanning.

Do you mean *re*booting?

I've seen some of that.

Are you using gcc 3.x or 4.x to compile, and on 32 or 64 bit? 

I've found there are issues with gcc 4.3 (even when built with the nice
coresystems build-your-own-toolchain script). The most reliable compiler for
coreboot in my experience is still gcc 3.4.

Also, are you sure your CONFIG_HT_* settings are correct? I found that
CONFIG_HT_CHAIN_UNITID_BASE really has to be 1 to get a bootable system with
mcp55 on fam10.

Thanks,
Ward. 

-- 
Ward Vandewege w...@fsf.org
Free Software Foundation - Senior Systems Administrator

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Re: [coreboot] Tyan S2912[Fam10] HTX problem

2009-08-11 Thread ron minnich
On Tue, Aug 11, 2009 at 8:16 AM, Ward Vandewegew...@gnu.org wrote:

 The most reliable compiler for
 coreboot in my experience is still gcc 3.4.

This is really getting to be a problem. Is 4.4 any better? Any idea
what could have caused the breakage? I think we can trust that gcc is
not going to stop changing just for us :-)

ron

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