Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Shawn Guo]

On Fri, Mar 02, 2018 at 01:35:43PM +0530, Kishon Vijay Abraham I wrote:
> >>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> >>> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> >>> new file mode 100644
> >>> index ..b563cf54ca7b
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> >>> @@ -0,0 +1,52 @@
> >>> +HiSilicon INNO USB2 PHY
> >>> +
> >>> +Required properties:
> >>> +- compatible: Should be one of the following strings:
> >>> + "hisilicon,inno-usb2-phy",
> >>> + "hisilicon,hi3798cv200-usb2-phy".
> >>> +- reg: Should be the address space for PHY configuration register in 
> >>> peripheral
> >>> +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
> >>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
> >>> +  reference.
> >>
> >> This can be '0' if the consumers directly use phandle to the subnodes.
> > 
> > Yes, I understand that for most of PHY devices #phy-cells is just 0, and
> > consumers simply use the phandle without any cell number.  But for this
> > inno-usb2-phy, every single device contains two PHY ports, and each port
> 
> Why not have a separate sub-node for each phy port? Then you can just use
> phandle to the subnode in the controller node.

It sounds like a sensible suggestion.  I will try to implement that and
see how it goes.  Thanks.

Shawn

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Shawn Guo]

On Fri, Mar 02, 2018 at 01:35:43PM +0530, Kishon Vijay Abraham I wrote:
> >>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> >>> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> >>> new file mode 100644
> >>> index ..b563cf54ca7b
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> >>> @@ -0,0 +1,52 @@
> >>> +HiSilicon INNO USB2 PHY
> >>> +
> >>> +Required properties:
> >>> +- compatible: Should be one of the following strings:
> >>> + "hisilicon,inno-usb2-phy",
> >>> + "hisilicon,hi3798cv200-usb2-phy".
> >>> +- reg: Should be the address space for PHY configuration register in 
> >>> peripheral
> >>> +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
> >>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
> >>> +  reference.
> >>
> >> This can be '0' if the consumers directly use phandle to the subnodes.
> > 
> > Yes, I understand that for most of PHY devices #phy-cells is just 0, and
> > consumers simply use the phandle without any cell number.  But for this
> > inno-usb2-phy, every single device contains two PHY ports, and each port
> 
> Why not have a separate sub-node for each phy port? Then you can just use
> phandle to the subnode in the controller node.

It sounds like a sensible suggestion.  I will try to implement that and
see how it goes.  Thanks.

Shawn

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Kishon Vijay Abraham I]

Hi,

On Friday 02 March 2018 01:07 PM, Shawn Guo wrote:
> Hi Kishon,
> 
> On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote:
>> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
>>> From: Pengcheng Li 
>>>
>>> It adds device tree bindings document for HiSilicon INNO USB2 PHY.
>>>
>>> Signed-off-by: Pengcheng Li 
>>> Signed-off-by: Jiancheng Xue 
>>> Signed-off-by: Shawn Guo 
>>> ---
>>>  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 
>>> ++
>>>  1 file changed, 52 insertions(+)
>>>  create mode 100644 
>>> Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
>>> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>> new file mode 100644
>>> index ..b563cf54ca7b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>> @@ -0,0 +1,52 @@
>>> +HiSilicon INNO USB2 PHY
>>> +
>>> +Required properties:
>>> +- compatible: Should be one of the following strings:
>>> +   "hisilicon,inno-usb2-phy",
>>> +   "hisilicon,hi3798cv200-usb2-phy".
>>> +- reg: Should be the address space for PHY configuration register in 
>>> peripheral
>>> +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
>>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
>>> +  reference.
>>
>> This can be '0' if the consumers directly use phandle to the subnodes.
> 
> Yes, I understand that for most of PHY devices #phy-cells is just 0, and
> consumers simply use the phandle without any cell number.  But for this
> inno-usb2-phy, every single device contains two PHY ports, and each port

Why not have a separate sub-node for each phy port? Then you can just use
phandle to the subnode in the controller node.

Thanks
Kishon

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Kishon Vijay Abraham I]

Hi,

On Friday 02 March 2018 01:07 PM, Shawn Guo wrote:
> Hi Kishon,
> 
> On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote:
>> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
>>> From: Pengcheng Li 
>>>
>>> It adds device tree bindings document for HiSilicon INNO USB2 PHY.
>>>
>>> Signed-off-by: Pengcheng Li 
>>> Signed-off-by: Jiancheng Xue 
>>> Signed-off-by: Shawn Guo 
>>> ---
>>>  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 
>>> ++
>>>  1 file changed, 52 insertions(+)
>>>  create mode 100644 
>>> Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
>>> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>> new file mode 100644
>>> index ..b563cf54ca7b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
>>> @@ -0,0 +1,52 @@
>>> +HiSilicon INNO USB2 PHY
>>> +
>>> +Required properties:
>>> +- compatible: Should be one of the following strings:
>>> +   "hisilicon,inno-usb2-phy",
>>> +   "hisilicon,hi3798cv200-usb2-phy".
>>> +- reg: Should be the address space for PHY configuration register in 
>>> peripheral
>>> +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
>>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
>>> +  reference.
>>
>> This can be '0' if the consumers directly use phandle to the subnodes.
> 
> Yes, I understand that for most of PHY devices #phy-cells is just 0, and
> consumers simply use the phandle without any cell number.  But for this
> inno-usb2-phy, every single device contains two PHY ports, and each port

Why not have a separate sub-node for each phy port? Then you can just use
phandle to the subnode in the controller node.

Thanks
Kishon

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Shawn Guo]

Hi Kishon,

On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote:
> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
> > From: Pengcheng Li 
> > 
> > It adds device tree bindings document for HiSilicon INNO USB2 PHY.
> > 
> > Signed-off-by: Pengcheng Li 
> > Signed-off-by: Jiancheng Xue 
> > Signed-off-by: Shawn Guo 
> > ---
> >  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 
> > ++
> >  1 file changed, 52 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> > b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> > new file mode 100644
> > index ..b563cf54ca7b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> > @@ -0,0 +1,52 @@
> > +HiSilicon INNO USB2 PHY
> > +
> > +Required properties:
> > +- compatible: Should be one of the following strings:
> > +   "hisilicon,inno-usb2-phy",
> > +   "hisilicon,hi3798cv200-usb2-phy".
> > +- reg: Should be the address space for PHY configuration register in 
> > peripheral
> > +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
> > +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
> > +  reference.
> 
> This can be '0' if the consumers directly use phandle to the subnodes.

Yes, I understand that for most of PHY devices #phy-cells is just 0, and
consumers simply use the phandle without any cell number.  But for this
inno-usb2-phy, every single device contains two PHY ports, and each port
can be connected to different USB controller.  That said, for each
inno-usb2-phy device, we need to create two phy devices and register
them to PHY core system.  And the phy-cell number is used by consumers
to specify the PHY port id.

Shawn

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Shawn Guo]

Hi Kishon,

On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote:
> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
> > From: Pengcheng Li 
> > 
> > It adds device tree bindings document for HiSilicon INNO USB2 PHY.
> > 
> > Signed-off-by: Pengcheng Li 
> > Signed-off-by: Jiancheng Xue 
> > Signed-off-by: Shawn Guo 
> > ---
> >  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 
> > ++
> >  1 file changed, 52 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> > b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> > new file mode 100644
> > index ..b563cf54ca7b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> > @@ -0,0 +1,52 @@
> > +HiSilicon INNO USB2 PHY
> > +
> > +Required properties:
> > +- compatible: Should be one of the following strings:
> > +   "hisilicon,inno-usb2-phy",
> > +   "hisilicon,hi3798cv200-usb2-phy".
> > +- reg: Should be the address space for PHY configuration register in 
> > peripheral
> > +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
> > +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
> > +  reference.
> 
> This can be '0' if the consumers directly use phandle to the subnodes.

Yes, I understand that for most of PHY devices #phy-cells is just 0, and
consumers simply use the phandle without any cell number.  But for this
inno-usb2-phy, every single device contains two PHY ports, and each port
can be connected to different USB controller.  That said, for each
inno-usb2-phy device, we need to create two phy devices and register
them to PHY core system.  And the phy-cell number is used by consumers
to specify the PHY port id.

Shawn

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Kishon Vijay Abraham I]

On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
> From: Pengcheng Li 
> 
> It adds device tree bindings document for HiSilicon INNO USB2 PHY.
> 
> Signed-off-by: Pengcheng Li 
> Signed-off-by: Jiancheng Xue 
> Signed-off-by: Shawn Guo 
> ---
>  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 
> ++
>  1 file changed, 52 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> new file mode 100644
> index ..b563cf54ca7b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> @@ -0,0 +1,52 @@
> +HiSilicon INNO USB2 PHY
> +
> +Required properties:
> +- compatible: Should be one of the following strings:
> + "hisilicon,inno-usb2-phy",
> + "hisilicon,hi3798cv200-usb2-phy".
> +- reg: Should be the address space for PHY configuration register in 
> peripheral
> +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
> +  reference.

This can be '0' if the consumers directly use phandle to the subnodes.

Thanks
Kishon

Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Kishon Vijay Abraham I]

On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
> From: Pengcheng Li 
> 
> It adds device tree bindings document for HiSilicon INNO USB2 PHY.
> 
> Signed-off-by: Pengcheng Li 
> Signed-off-by: Jiancheng Xue 
> Signed-off-by: Shawn Guo 
> ---
>  .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 
> ++
>  1 file changed, 52 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> new file mode 100644
> index ..b563cf54ca7b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> @@ -0,0 +1,52 @@
> +HiSilicon INNO USB2 PHY
> +
> +Required properties:
> +- compatible: Should be one of the following strings:
> + "hisilicon,inno-usb2-phy",
> + "hisilicon,hi3798cv200-usb2-phy".
> +- reg: Should be the address space for PHY configuration register in 
> peripheral
> +  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to
> +  reference.

This can be '0' if the consumers directly use phandle to the subnodes.

Thanks
Kishon

[PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Shawn Guo]

From: Pengcheng Li 

It adds device tree bindings document for HiSilicon INNO USB2 PHY.

Signed-off-by: Pengcheng Li 
Signed-off-by: Jiancheng Xue 
Signed-off-by: Shawn Guo 
---
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 ++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index ..b563cf54ca7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,52 @@
+HiSilicon INNO USB2 PHY
+
+Required properties:
+- compatible: Should be one of the following strings:
+   "hisilicon,inno-usb2-phy",
+   "hisilicon,hi3798cv200-usb2-phy".
+- reg: Should be the address space for PHY configuration register in peripheral
+  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
+- #phy-cells: Should be 1. The specifier is the index of the PHY port to
+  reference.
+- clocks: The phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: The list of phandle and reset specifier pairs for each reset signal
+  in reset-names.
+- reset-names: Should contain "power_on", "utmi0" and "utmi1". The "utmi1"
+  should exist only if the device has two PHY port.
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Note: the device node should be a child of peripheral controller that contains
+the PHY configuration register.
+
+Example:
+
+perictrl: peripheral-controller@8a2 {
+   compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
+"simple-mfd";
+   reg = <0x8a2 0x1000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0x0 0x8a2 0x1000>;
+
+   usb2_phy1: phy@120 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   reg = <0x120 0x4>;
+   #phy-cells = <1>;
+   clocks = < HISTB_USB2_PHY1_REF_CLK>;
+   resets = < 0xbc 4>,
+< 0xbc 8>,
+< 0xbc 9>;
+   reset-names = "power_on", "utmi0", "utmi1";
+   };
+
+   usb2_phy2: phy@124 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   reg = <0x124 0x4>;
+   #phy-cells = <1>;
+   clocks = < HISTB_USB2_PHY2_REF_CLK>;
+   resets = < 0xbc 6>,
+< 0xbc 10>;
+   reset-names = "power_on", "utmi0";
+   };
+};
-- 
1.9.1

[PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY

[Shawn Guo]

From: Pengcheng Li 

It adds device tree bindings document for HiSilicon INNO USB2 PHY.

Signed-off-by: Pengcheng Li 
Signed-off-by: Jiancheng Xue 
Signed-off-by: Shawn Guo 
---
 .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 ++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt 
b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
new file mode 100644
index ..b563cf54ca7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
@@ -0,0 +1,52 @@
+HiSilicon INNO USB2 PHY
+
+Required properties:
+- compatible: Should be one of the following strings:
+   "hisilicon,inno-usb2-phy",
+   "hisilicon,hi3798cv200-usb2-phy".
+- reg: Should be the address space for PHY configuration register in peripheral
+  controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC.
+- #phy-cells: Should be 1. The specifier is the index of the PHY port to
+  reference.
+- clocks: The phandle and clock specifier pair for reference clock utmi_refclk.
+- resets: The list of phandle and reset specifier pairs for each reset signal
+  in reset-names.
+- reset-names: Should contain "power_on", "utmi0" and "utmi1". The "utmi1"
+  should exist only if the device has two PHY port.
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Note: the device node should be a child of peripheral controller that contains
+the PHY configuration register.
+
+Example:
+
+perictrl: peripheral-controller@8a2 {
+   compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
+"simple-mfd";
+   reg = <0x8a2 0x1000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0x0 0x8a2 0x1000>;
+
+   usb2_phy1: phy@120 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   reg = <0x120 0x4>;
+   #phy-cells = <1>;
+   clocks = < HISTB_USB2_PHY1_REF_CLK>;
+   resets = < 0xbc 4>,
+< 0xbc 8>,
+< 0xbc 9>;
+   reset-names = "power_on", "utmi0", "utmi1";
+   };
+
+   usb2_phy2: phy@124 {
+   compatible = "hisilicon,hi3798cv200-usb2-phy";
+   reg = <0x124 0x4>;
+   #phy-cells = <1>;
+   clocks = < HISTB_USB2_PHY2_REF_CLK>;
+   resets = < 0xbc 6>,
+< 0xbc 10>;
+   reset-names = "power_on", "utmi0";
+   };
+};
-- 
1.9.1