Re: [PATCH] Fix neighbor discovery ethernet address saving

[Sean Edmond]

Hi Vyachesla,

Let's start by saying neighbour discovery protocol is definitely working 
properly.  I'm only suggesting that it isn't properly caching the MAC 
address.  During IPv6 TFTP I observe that neighbour discovery is 
performed before every packet sent from client(u-boot)->server.


Here's a snapshot of what the packets from client(u-boot)<->server look 
like during IPv6 TFTP:

-> neighbour solicitation
<- neighbour advertisement
-> read request
<- Block 0
-> neighbour solicitation
<- neighbour advertisement
-> ACK block 0
<- Block 1
-> neighbour solicitation
<- neighbour advertisement
-> ACK block 1
- ... (continues for entire file transfer)

The neighbour discovery on every TX TFTP packet isn't required and 
results in degraded performance.  Note, when performing the test with 
IPv4, ARP is not performed before every TX packet.


Here's a description of the code flow (including my proposal):
- net.c defines "u8 net_server_ethaddr[6];"
- tftp_send()-> net_send_udp_packet6(net_server_ethaddr, ...)
- in net_send_udp_packet6(), "net_nd_packet_mac = ether;"  (now, 
net_nd_packet_mac is pointing to net_server_ethaddr)
- in ndisc_receive(), when NA is received the mac becomes available in 
neigh_eth_addr
- My proposal is, "if pointer net_nd_packet_mac isn't NULL, copy this 
contents of neigh_eth_addr into net_nd_packet_mac"
- For TFTP, my fix allows the server's MAC to get copied into 
net_server_ethaddr
- on the next tftp_send(), in net_send_udp_packet6() neighbour discovery 
is skipped because "ether" isn't all zeros


The memcpy isn't dangerous, because it's copying the discovered mac 
address into the already allocated net_server_ethaddr (and it's checking 
to make sure that net_nd_packet_mac isn't NULL before copying).


Also, the current code serves no purpose.  The current code is, "if 
net_nd_packet_mac is NULL, set it to stack variable neigh_eth_addr, then 
set net_nd_packet_mac to NULL when there is no ND pending (the mac 
address doesn't get saved in net_server_ethaddr).


Sean










On 2024-05-05 2:40 a.m., Vyacheslav V. Mitrofanov wrote:

On Mon, 2024-04-29 at 11:51 -0700, seanedm...@linux.microsoft.com
wrote:

s...@yadro.com

From: Sean Edmond 

When a successful neighbor advertisement is received, the ethernet
address should be saved for later use to avoid having to redo the
neighbor discovery process.

For example, with TFTP the address should get saved into
"net_server_ethaddr".  This is being done correctly with ARP for
IPv4,
but not for neighbor discovery with IPv6.

Signed-off-by: Sean Edmond 
---
  net/ndisc.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/net/ndisc.c b/net/ndisc.c
index d1cec0601c8..505515f2d95 100644
--- a/net/ndisc.c
+++ b/net/ndisc.c
@@ -461,8 +461,8 @@ int ndisc_receive(struct ethernet_hdr *et, struct
ip6_hdr *ip6, int len)
     ndisc_extract_enetaddr(ndisc,
neigh_eth_addr);

     /* save address for later use */
-   if (!net_nd_packet_mac)
-   net_nd_packet_mac = neigh_eth_addr;
+   if (net_nd_packet_mac)
+   memcpy(net_nd_packet_mac,
neigh_eth_addr, 6);

     /* modify header, and transmit it */
     memcpy(((struct ethernet_hdr
*)net_nd_tx_packet)->et_dest,
--
2.42.0


Hello, Sean. Thanks for your notice. I see that net_nd_packet_mac is
just a uchar pointer without memory allocation. It is dangerous to do
memcpy and not necessary. All works as it has to be.

Re: [PATCH] board: rockchip: add ArmSoM Sige7 Rk3588 board

[Kever Yang]

Hi Jianfeng,

On 2024/5/5 01:05, Jianfeng Liu wrote:

ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.

There are two variants depending on the DRAM size : 8G and 16G.

Specification:

 Rockchip Rk3588 SoC
 4x ARM Cortex-A76, 4x ARM Cortex-A55
 8/16GB memory LPDDR4x
 Mali G610MC4 GPU
 2x MIPI CSI 2 multiple lanes connector
 64GB/128GB on board eMMC
 uSD slot
 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
 1x HDMI 2.1 output
 2x 2.5 Gbps Ethernet port
 40-pin IO header including UART, SPI and I2C
 USB PD over USB Type-C
 Size: 92mm x 62mm

Kernel commit:
81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)

Note that these commits:
- e18e5e8188f2 (arm64: dts: rockchip: add USBDP phys on rk3588)
- 6fca4edb93d3 (arm64: dts: rockchip: Add rk3588 GPU node)
are not synced to u-boot, so I remove usb3 drd nodes and gpu from kernel
devicetree.

Signed-off-by: Jianfeng Liu 
---

  MAINTAINERS  |   1 +
  arch/arm/dts/Makefile|   1 +
  arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi |  31 +
  arch/arm/dts/rk3588-armsom-sige7.dts | 691 +++


We have enable OF_UPSTREAM which is using dts from 
dts/upstream/src/arm64/rockchip/,


please update to use OF_UPSTREAM so that we will easy to keep sync the dts.


Thanks,
- Kever

  arch/arm/mach-rockchip/rk3588/Kconfig|  26 +
  board/armsom/sige7-rk3588/Kconfig|  12 +
  board/armsom/sige7-rk3588/MAINTAINERS|   8 +
  configs/sige7-rk3588_defconfig   | 104 +++
  doc/board/rockchip/rockchip.rst  |   1 +
  include/configs/sige7-rk3588.h   |  15 +
  10 files changed, 890 insertions(+)
  create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
  create mode 100644 arch/arm/dts/rk3588-armsom-sige7.dts
  create mode 100644 board/armsom/sige7-rk3588/Kconfig
  create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS
  create mode 100644 configs/sige7-rk3588_defconfig
  create mode 100644 include/configs/sige7-rk3588.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 7a3b4d3712..52367bf38c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -532,6 +532,7 @@ F:  arch/arm/dts/rv11*
  F:arch/arm/include/asm/arch-rockchip/
  F:arch/arm/mach-rockchip/
  F:board/amarula/vyasa-rk3288/
+F: board/armsom/sige7-rk3588/
  F:board/anbernic/rgxx3_rk3566/
  F:board/chipspark/popmetal_rk3288
  F:board/engicam/px30_core/
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c9f1b25ad6..040238dede 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -166,6 +166,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-rock-3a.dtb
  
  dtb-$(CONFIG_ROCKCHIP_RK3588) += \

+   rk3588-armsom-sige7.dtb \
rk3588s-coolpi-4b.dtb \
rk3588-coolpi-cm5-evb.dtb \
rk3588-edgeble-neu6a-io.dtb \
diff --git a/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi 
b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
new file mode 100644
index 00..b9196ba5f5
--- /dev/null
+++ b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 ArmSoM Technology Co., Ltd.
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+ {
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+};
+
+ {
+   status = "okay";
+};
+
+_otg {
+   status = "okay";
+};
+
+_phy1 {
+   status = "okay";
+};
+
+_phy1_u3 {
+   status = "okay";
+};
+
+_host1_xhci {
+   status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-armsom-sige7.dts 
b/arch/arm/dts/rk3588-armsom-sige7.dts
new file mode 100644
index 00..c7b46536ec
--- /dev/null
+++ b/arch/arm/dts/rk3588-armsom-sige7.dts
@@ -0,0 +1,691 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include 
+#include 
+#include "rk3588.dtsi"
+
+/ {
+   model = "ArmSoM Sige7";
+   compatible = "armsom,sige7", "rockchip,rk3588";
+
+   aliases {
+   mmc0 = 
+   mmc1 = 
+   };
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+
+   analog-sound {
+   compatible = "audio-graph-card";
+   dais = <_8ch_p0>;
+   label = "rk3588-es8316";
+   hp-det-gpio = < RK_PD5 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_detect>;
+   routing = "MIC2", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR";
+   widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgb_g>;
+
+   led_green: led-0 {
+   color = ;
+   function = LED_FUNCTION_STATUS;
+ 

Re: [PATCH V3] board: rockchip: add Powkiddy X55

[Kever Yang]

On 2024/5/3 05:40, Chris Morgan wrote:

From: Chris Morgan 

The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.

Kernel commit:
e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy X55")

Signed-off-by: Chris Morgan 
---

Changes since V2:
  - Refactored to use the upstream device tree from Linux.
  - Removed logic for handling the adc button and instead simply try to
boot from sdmmc0 as a valid target first.

---
  arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi |  9 +++
  arch/arm/mach-rockchip/rk3568/Kconfig|  6 ++
  board/powkiddy/x55/Kconfig   | 15 +
  board/powkiddy/x55/MAINTAINERS   |  7 +++
  board/powkiddy/x55/Makefile  |  6 ++
  board/powkiddy/x55/x55.c | 39 +
  configs/powkiddy-x55-rk3566_defconfig| 59 
  doc/board/rockchip/rockchip.rst  |  1 +
  include/configs/powkiddy-x55-rk3566.h| 12 
  9 files changed, 154 insertions(+)
  create mode 100644 arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
  create mode 100644 board/powkiddy/x55/Kconfig
  create mode 100644 board/powkiddy/x55/MAINTAINERS
  create mode 100644 board/powkiddy/x55/Makefile
  create mode 100644 board/powkiddy/x55/x55.c
  create mode 100644 configs/powkiddy-x55-rk3566_defconfig
  create mode 100644 include/configs/powkiddy-x55-rk3566.h

diff --git a/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi 
b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
new file mode 100644
index 00..c440201ec7
--- /dev/null
+++ b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = , , 
+   };
+};
diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig 
b/arch/arm/mach-rockchip/rk3568/Kconfig
index af537d912a..014ebf9f0b 100644
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568
help
  Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC.
  
+config TARGET_POWKIDDY_X55_RK3566

+   bool "Powkiddy X55"
+   help
+ Powkiddy X55 handheld gaming console with an RK3566 SoC.
+
  config TARGET_QUARTZ64_RK3566
bool "Pine64 Quartz64"
help
@@ -48,5 +53,6 @@ source "board/rockchip/evb_rk3568/Kconfig"
  source "board/anbernic/rgxx3_rk3566/Kconfig"
  source "board/hardkernel/odroid_m1/Kconfig"
  source "board/pine64/quartz64_rk3566/Kconfig"
+source "board/powkiddy/x55/Kconfig"
  
  endif

diff --git a/board/powkiddy/x55/Kconfig b/board/powkiddy/x55/Kconfig
new file mode 100644
index 00..a7b3ed4d0d
--- /dev/null
+++ b/board/powkiddy/x55/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_POWKIDDY_X55_RK3566
+
+config SYS_BOARD
+   default "x55"
+
+config SYS_VENDOR
+   default "powkiddy"
+
+config SYS_CONFIG_NAME
+   default "powkiddy-x55-rk3566"
+
+config BOARD_SPECIFIC_OPTIONS
+   def_bool y
+
+endif
diff --git a/board/powkiddy/x55/MAINTAINERS b/board/powkiddy/x55/MAINTAINERS
new file mode 100644
index 00..01ae8da19d
--- /dev/null
+++ b/board/powkiddy/x55/MAINTAINERS
@@ -0,0 +1,7 @@
+X55
+M: Chris Morgan 
+S: Maintained
+F: board/powkiddy/x55
+F: include/configs/powkiddy-x55-rk3566.h
+F: configs/powkiddy-x55-rk3566_defconfig
+F: arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
diff --git a/board/powkiddy/x55/Makefile b/board/powkiddy/x55/Makefile
new file mode 100644
index 00..55c8c16aa1
--- /dev/null
+++ b/board/powkiddy/x55/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Chris Morgan 
+#
+
+obj-y += x55.o
diff --git a/board/powkiddy/x55/x55.c b/board/powkiddy/x55/x55.c
new file mode 100644
index 00..b2703e6382
--- /dev/null
+++ b/board/powkiddy/x55/x55.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Chris Morgan 
+ */
+
+#include 
+
+#define GPIO4_BASE 0xfe77
+#define GPIO_SWPORT_DR_L   0x
+#define GPIO_SWPORT_DDR_L  0x0008
+#define GPIO_B4BIT(12)
+#define GPIO_B5BIT(13)
+#define GPIO_B6BIT(14)
+
+#define GPIO_WRITEMASK(bits)   ((bits) << 16)
+
+/*
+ * Start LED very early so user knows device is on. Set color
+ * to red.
+ */
+void spl_board_init(void)
+{
+   /* Set GPIO4_B4, GPIO4_B5, and GPIO4_B6 to output. */
+   writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | \
+  (GPIO_B6 | GPIO_B5 | GPIO_B4),
+  (GPIO4_BASE + GPIO_SWPORT_DDR_L));
+   /* Set GPIO4_B5 and GPIO4_B6 to 0 and GPIO4_B4 to 1. */
+   writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B4,
+  (GPIO4_BASE + GPIO_SWPORT_DR_L));
+}
+
+int rk_board_late_init(void)
+{
+   

Re: [PATCH V2] board: rockchip: Add Indiedroid Nova

[Kever Yang]

On 2024/5/3 02:57, Chris Morgan wrote:

From: Chris Morgan 

The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.

Specifications:

 Rockchip RK3588S SoC
 4x ARM Cortex-A76, 4x ARM Cortex-A55
 4/8/16GB memory LPDDR4x
 Mali G610MC4 GPU
 Optional eMMC
 2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
 1x MIPI-CSI Port (4-lane or 2x 2-lane)
 1x MIPI-DSI 4-lane connector
 1x Micro HDMI 2.1 output, 1x DP 1.4 output
 Gigabit Ethernet
 Realtek RTL8821CS WiFi
 4 pin debug UART connector
 40 pin GPIO header
 Size: 85mm x 56mm (Raspberry Pi Form Factor)

Kernel commit:
3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")

Signed-off-by: Chris Morgan 
---

Changes since V1:
  - Refactored to use the upstream Linux device tree now that that is
an option.
  - Added board to doc/board/rockchip/rockchip.rst.

---
  arch/arm/mach-rockchip/rk3588/Kconfig | 10 
  board/indiedroid/nova/Kconfig | 12 +
  board/indiedroid/nova/MAINTAINERS |  6 +++
  configs/nova-rk3588s_defconfig| 70 +++
  doc/board/rockchip/rockchip.rst   |  1 +
  include/configs/nova-rk3588s.h| 15 ++
  6 files changed, 114 insertions(+)
  create mode 100644 board/indiedroid/nova/Kconfig
  create mode 100644 board/indiedroid/nova/MAINTAINERS
  create mode 100644 configs/nova-rk3588s_defconfig
  create mode 100644 include/configs/nova-rk3588s.h

diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig 
b/arch/arm/mach-rockchip/rk3588/Kconfig
index 39049ab35a..820e979abb 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -78,6 +78,15 @@ config TARGET_NANOPCT6_RK3588
  Power: 5.5*2.1mm DC Jack, 12VDC input
  Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
  
+config TARGET_NOVA_RK3588

+   bool "Indiedroid Nova RK3588"
+   select BOARD_LATE_INIT
+   help
+ Indiedroid Nova is a Rockchip RK3588s based SBC by Indiedroid.
+ It comes in configurations from 4GB of RAM to 16GB of RAM,
+ includes socket for eMMC storage, an SDMMC slot, and a 40-pin
+ GPIO header for expansion.
+
  config TARGET_RK3588_NEU6
bool "Edgeble Neural Compute Module 6(Neu6) SoM"
select BOARD_LATE_INIT
@@ -223,6 +232,7 @@ config TEXT_BASE
  
  source "board/edgeble/neural-compute-module-6/Kconfig"

  source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
+source "board/indiedroid/nova/Kconfig"
  source "board/pine64/quartzpro64-rk3588/Kconfig"
  source "board/turing/turing-rk1-rk3588/Kconfig"
  source "board/radxa/rock5a-rk3588s/Kconfig"
diff --git a/board/indiedroid/nova/Kconfig b/board/indiedroid/nova/Kconfig
new file mode 100644
index 00..271d15a0ed
--- /dev/null
+++ b/board/indiedroid/nova/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_NOVA_RK3588
+
+config SYS_BOARD
+   default "nova-rk3588s"
+
+config SYS_VENDOR
+   default "indiedroid"
+
+config SYS_CONFIG_NAME
+   default "nova-rk3588s"
+
+endif
diff --git a/board/indiedroid/nova/MAINTAINERS 
b/board/indiedroid/nova/MAINTAINERS
new file mode 100644
index 00..9c56d01bf0
--- /dev/null
+++ b/board/indiedroid/nova/MAINTAINERS
@@ -0,0 +1,6 @@
+INDIEDROID-NOVA-RK3588
+M: Chris Morgan 
+S: Maintained
+F: board/indiedroid/nova
+F: include/configs/nova-rk3588s.h
+F: configs/indiedroid-nova-rk3588_defconfig
diff --git a/configs/nova-rk3588s_defconfig b/configs/nova-rk3588s_defconfig
new file mode 100644
index 00..231831fb55
--- /dev/null
+++ b/configs/nova-rk3588s_defconfig
@@ -0,0 +1,70 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-indiedroid-nova"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_NOVA_RK3588=y
+CONFIG_DEBUG_UART_BASE=0xFEB5
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-indiedroid-nova.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x4
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y


The OF_UPSTREAM already enabled for ROCKCHIP_RK3588, so no need here, 
please help to rebase on latest code.



Thanks,

- Kever


+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y

Re: [PATCH v2] rockchip: add support for Theobroma Systems SOM-RK3588-Q7 Tiger module

[Kever Yang]

Hi Quentin,

    Could you please update this patch with OF_UPSTREAM support?


Thanks,
- Kever
On 2024/4/23 18:18, Quentin Schulz wrote:

From: Quentin Schulz 

The RK3588-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3588.

It provides the following feature set:
  * up to 16GB LPDDR4x
  * on-module eMMC
  * SD card (on a baseboard) via edge connector
  * Gigabit Ethernet with on-module GbE PHY
  * HDMI/eDP
  * MIPI-DSI
  * 4x MIPI-CSI (3x on FPC connectors, 1x over Q7)
  * HDMI input over FPC connector
  * CAN
  * USB
- 1x USB 3.0 dual-role (direct connection)
- 2x USB 3.0 host + 1x USB 2.0 host
  * PCIe
- 1x PCIe 2.1 Gen3, 4 lanes
- 2xSATA / 2x PCIe 2.1 Gen1, 2 lanes
  * on-module ATtiny816 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
   * on-module Secure Element with Global Platform 2.2.1 compliant
 JavaCard environment

The support is added for Tiger on Haikou devkit, similarly to RK3399
Puma and PX30 Ringneck.

The DTS and DTSI are taken from upstream Linux kernel v6.9-rc4.

Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 
---
This has a light dependency on
https://lore.kernel.org/u-boot/20240415-rk35xx-dram-atags-v3-0-5bc5475b3...@theobroma-systems.com/
(the Tiger defconfig can be updated to remove the dependency if required)

To: Tom Rini 
To: Klaus Goger 
To: Heiko Stuebner 
To: Simon Glass 
To: Philipp Tomsich 
To: Kever Yang 
Cc: u-boot@lists.denx.de
Signed-off-by: Quentin Schulz 

Changes in v2:
- removed uart controller muxing patch as not necessary until we get
   open-source DRAM init,
- disabled DEBUG_UART_BOARD_INIT as it's only used for muxing the UART
   controller and it's not necessary since DDR bin does this for us
   already,
- added missing uart2 mux bootph in U-Boot dtsi (though not required
   yet),
- switched to USB_DWC3_GENERIC from USB_XHCI_DWC3 as requested by Jonas,
- Link to v1: 
https://lore.kernel.org/r/20240422-tiger-v1-0-8816b070d...@theobroma-systems.com
---
  arch/arm/dts/Makefile  |   1 +
  arch/arm/dts/rk3588-tiger-haikou-u-boot.dtsi   |  59 ++
  arch/arm/dts/rk3588-tiger-haikou.dts   | 266 
  arch/arm/dts/rk3588-tiger.dtsi | 690 +
  arch/arm/mach-rockchip/rk3588/Kconfig  |  31 +
  board/theobroma-systems/tiger_rk3588/Kconfig   |  16 +
  board/theobroma-systems/tiger_rk3588/MAINTAINERS   |  13 +
  board/theobroma-systems/tiger_rk3588/Makefile  |  10 +
  .../theobroma-systems/tiger_rk3588/tiger_rk3588.c  |  53 ++
  configs/tiger-rk3588_defconfig | 114 
  doc/board/rockchip/rockchip.rst|   1 +
  doc/board/theobroma-systems/index.rst  |   1 +
  doc/board/theobroma-systems/tiger_rk3588.rst   | 102 +++
  include/configs/tiger_rk3588.h |  15 +
  14 files changed, 1372 insertions(+)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b1c9c6222e5..ef901642a0a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -180,6 +180,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-quartzpro64.dtb \
rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb \
+   rk3588-tiger-haikou.dtb \
rk3588-turing-rk1.dtb
  
  dtb-$(CONFIG_ROCKCHIP_RV1108) += \

diff --git a/arch/arm/dts/rk3588-tiger-haikou-u-boot.dtsi 
b/arch/arm/dts/rk3588-tiger-haikou-u-boot.dtsi
new file mode 100644
index 000..bfcefe256b0
--- /dev/null
+++ b/arch/arm/dts/rk3588-tiger-haikou-u-boot.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = "same-as-spl", , 
+   };
+};
+
+_pwrseq {
+   bootph-pre-ram;
+   bootph-some-ram;
+};
+
+_reset {
+   bootph-pre-ram;
+   bootph-some-ram;
+};
+
+ {
+   bootph-pre-ram;
+   bootph-some-ram;
+};
+
+ {
+   /* U-Boot currently cannot handle anything below HS200 for eMMC on 
RK3588 */
+   /delete-property/ mmc-ddr-1_8v;
+   /delete-property/ cap-mmc-highspeed;
+};
+
+/* Q7 USB P0 */
+ {
+   status = "okay";
+};
+
+_otg {
+   status = "okay";
+};
+
+_xfer {
+   bootph-all;
+};
+
+/* Q7 USB P0 */
+_phy1 {
+   status = "okay";
+};
+
+_phy1_u3 {
+   status = "okay";
+};
+
+_host1_xhci {
+   status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-tiger-haikou.dts 
b/arch/arm/dts/rk3588-tiger-haikou.dts
new file mode 100644
index 000..d672198c6b6
--- /dev/null
+++ b/arch/arm/dts/rk3588-tiger-haikou.dts
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
+ */
+
+/dts-v1/;
+#include 
+#include "rk3588-tiger.dtsi"
+
+/ {
+ 

Re: [PATCH v1 7/7] MAINTAINERS: Update Starfive visionfive2 maintain files.

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

Add USB related files to Starfive visionfive2 MAINTAINERS.

Signed-off-by: Minda Chen 
---
  board/starfive/visionfive2/MAINTAINERS | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/board/starfive/visionfive2/MAINTAINERS 
b/board/starfive/visionfive2/MAINTAINERS
index d7f638f9b4..1faf83f581 100644
--- a/board/starfive/visionfive2/MAINTAINERS
+++ b/board/starfive/visionfive2/MAINTAINERS
@@ -6,3 +6,5 @@ F:  board/starfive/visionfive2/
  F:include/configs/starfive-visionfive2.h
  F:configs/starfive_visionfive2_defconfig
  F:drivers/pci/pcie_starfive_jh7110.c
+F: drivers/phy/starfive/
+F: drivers/usb/cdns3/cdns3-starfive.c


Thanks !

Reviewed-by: Marek Vasut 

Re: [PATCH v1 4/7] usb: cdns: starfive: Add cdns USB driver

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

[...]


+static void cdns_mode_init(struct cdns_starfive *data, enum usb_dr_mode mode)
+{
+   regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
+  USB_MISC_CFG_MASK,
+  USB_SUSPENDM_BYPS | USB_PLL_EN | USB_REFCLK_MODE);
+
+   switch (mode) {
+   case USB_DR_MODE_HOST:
+   regmap_update_bits(data->stg_syscon,
+  data->stg_usb_mode,
+  USB_STRAP_MASK,
+  USB_STRAP_HOST);
+   regmap_update_bits(data->stg_syscon,
+  data->stg_usb_mode,
+  USB_SUSPENDM_MASK,
+  USB_SUSPENDM_HOST);


Can you deduplicate thse regmap_update_bits at the end of this function 
? Set a variable to USB_STRAP_HOST and another to USB_SUSPENDM_HOST 
here, set the same variables to USB_STRAP_DEVICE/0 below, and then call 
regmap_update_bits() with these variables at the end of this function once.



+   break;
+
+   case USB_DR_MODE_PERIPHERAL:
+   regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
+  USB_STRAP_MASK, USB_STRAP_DEVICE);
+   regmap_update_bits(data->stg_syscon, data->stg_usb_mode,
+  USB_SUSPENDM_MASK, 0);
+   break;
+   default:
+   break;
+   }
+}


[...]

Re: [PATCH v1 3/7] phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

Fix up the copyrights to year 2024 globally please.

[...]


+static int phy_usb3_mode_set(struct jh7110_pcie_phy *data)
+{


Can this phy_usb3_mode_set and phy_pcie_mode_set be unified into single 
function with parameter to select usb3/pcie mode instead ?



+   if (!data->stg_syscon || !data->sys_syscon) {
+   dev_err(data->phy->dev, "doesn't support usb3 mode\n");
+   return -EINVAL;
+   }
+
+   regmap_update_bits(data->stg_syscon, data->stg_pcie_mode,
+  PCIE_PHY_MODE_MASK, PCIE_PHY_MODE);
+   regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
+  PCIE_USB3_BUS_WIDTH_MASK, 0);
+   regmap_update_bits(data->stg_syscon, data->stg_pcie_usb,
+  PCIE_USB3_PHY_ENABLE, PCIE_USB3_PHY_ENABLE);
+
+   /* Connect usb 3.0 phy mode */
+   regmap_update_bits(data->sys_syscon, data->sys_phy_connect,
+  USB_PDRSTN_SPLIT, 0);
+
+   /* Configuare spread-spectrum mode: down-spread-spectrum */
+   writel(PCIE_USB3_PHY_ENABLE, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
+
+   return 0;
+}


[...]


+int jh7110_pcie_phy_probe(struct udevice *dev)
+{
+   struct jh7110_pcie_phy *phy = dev_get_priv(dev);
+   int rc;
+
+   phy->regs = dev_read_addr_ptr(dev);
+


Drop extra newline here.


+   if (!phy->regs)
+   return -EINVAL;


[...]

Re: [PATCH v1 2/7] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

[...]


diff --git a/drivers/phy/starfive/Makefile b/drivers/phy/starfive/Makefile
new file mode 100644
index 00..a405a75e34
--- /dev/null
+++ b/drivers/phy/starfive/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Starfive


2024 instead of 2023, please fix globally.


+#
+
+obj-$(CONFIG_PHY_STARFIVE_JH7110_USB2) += phy-jh7110-usb2.o
diff --git a/drivers/phy/starfive/phy-jh7110-usb2.c 
b/drivers/phy/starfive/phy-jh7110-usb2.c
new file mode 100644
index 00..ffbd96d721
--- /dev/null
+++ b/drivers/phy/starfive/phy-jh7110-usb2.c


[...]


+static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set)
+{
+   unsigned int val;
+
+   /* Host mode enable the LS speed keep-alive signal */
+   val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
+   if (set)
+   val |= USB_LS_KEEPALIVE_ENABLE;
+   else
+   val &= ~USB_LS_KEEPALIVE_ENABLE;
+
+   writel(val, phy->regs + USB_LS_KEEPALIVE_OFF);


This is clrsetbits_le32(), use it.


+}
+
+static int usb2_phy_set_mode(struct phy *_phy,
+enum phy_mode mode, int submode)
+{
+   struct udevice *dev = _phy->dev;
+   struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+   switch (mode) {
+   case PHY_MODE_USB_HOST:
+   case PHY_MODE_USB_DEVICE:
+   case PHY_MODE_USB_OTG:
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   if (mode != phy->mode) {


Reduce indent this way:

if (mode == phy->mode)
  return 0;

... do mode switch stuff ...
return 0;


+   dev_dbg(dev, "Changing phy to %d\n", mode);
+   phy->mode = mode;
+   usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
+   }
+
+   return 0;
+}
+
+static int jh7110_usb2_phy_init(struct phy *_phy)
+{
+   struct udevice *dev = _phy->dev;
+   struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+   int ret;
+
+   ret = clk_prepare_enable(phy->app_125m);


return clk_prepare_...(); is just fine


+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+static int jh7110_usb2_phy_exit(struct phy *_phy)
+{
+   struct udevice *dev = _phy->dev;
+   struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+   clk_disable_unprepare(phy->app_125m);
+
+   return 0;
+}
+
+struct phy_ops jh7110_usb2_phy_ops = {
+   .init = jh7110_usb2_phy_init,
+   .exit = jh7110_usb2_phy_exit,
+   .set_mode = usb2_phy_set_mode,
+};
+
+int jh7110_usb2_phy_probe(struct udevice *dev)
+{
+   struct jh7110_usb2_phy *phy = dev_get_priv(dev);
+
+   phy->regs = dev_read_addr_ptr(dev);
+


Drop extra newline.


+   if (!phy->regs)
+   return -EINVAL;


[...]

Re: [PATCH v1 1/7] usb: cdns3: Set USB PHY mode in cdns3_probe()

[Marek Vasut]

On 5/4/24 5:03 PM, Minda Chen wrote:

USB PHY maybe need to set PHY mode in different USB
dr mode. So translate to generic PHY mode and call
generic_phy_set_mode().

Signed-off-by: Minda Chen 
---
  drivers/usb/cdns3/core.c | 17 +
  1 file changed, 17 insertions(+)

diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 12a741c6ea..c1a61471f9 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -321,6 +321,7 @@ static int cdns3_probe(struct cdns3 *cdns)
  {
struct udevice *dev = cdns->dev;
int ret;
+   int mode = PHY_MODE_INVALID;


Please swap ret and mode to keep this list sorted.


cdns->xhci_regs = dev_remap_addr_name(dev, "xhci");
if (!cdns->xhci_regs)
@@ -372,6 +373,22 @@ static int cdns3_probe(struct cdns3 *cdns)
if (ret)
return ret;
  
+	if (cdns->dr_mode == USB_DR_MODE_HOST)

+   mode = PHY_MODE_USB_HOST;
+   else if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
+   mode = PHY_MODE_USB_DEVICE;
+   else if (cdns->dr_mode == USB_DR_MODE_OTG)
+   mode = PHY_MODE_USB_OTG;
+
+   if (mode != PHY_MODE_INVALID) {


Better invert the condition this way to reduce indent:

if (mode == PHY_MODE_INVALID) {
  dev_err(...report the error...);
  return ret;
}

ret = generic_phy_set...


+   ret = generic_phy_set_mode(>usb2_phy, mode, 0);
+   if (ret)
+   return ret;
+   ret = generic_phy_set_mode(>usb3_phy, mode, 0);
+   if (ret)
+   return ret;
+   }
+
dev_dbg(dev, "Cadence USB3 core: probe succeed\n");
  
  	return 0;

Re: [PATCH v2 05/28] image: remove redundant hash includes

[Igor Opaniuk]

On Tue, May 7, 2024 at 7:54 PM Raymond Mao  wrote:
>
> Remove the redundant includes of u-boot/md5.h, u-boot/sha1.h,
> u-boot/sha256.h and u-boot/sha512.h
>
> Signed-off-by: Raymond Mao 
> ---
> Changes in v2
> - None.
>
>  boot/image-fit.c | 4 
>  boot/image.c | 2 --
>  2 files changed, 6 deletions(-)
>
> diff --git a/boot/image-fit.c b/boot/image-fit.c
> index 89e377563ce..1efc39f4408 100644
> --- a/boot/image-fit.c
> +++ b/boot/image-fit.c
> @@ -38,10 +38,6 @@ DECLARE_GLOBAL_DATA_PTR;
>  #include 
>  #include 
>  #include 
> -#include 
> -#include 
> -#include 
> -#include 
>
>  
> /*/
>  /* New uImage format routines */
> diff --git a/boot/image.c b/boot/image.c
> index 073931cd7a3..e57d6eae52d 100644
> --- a/boot/image.c
> +++ b/boot/image.c
> @@ -26,8 +26,6 @@
>  #endif
>
>  #include 
> -#include 
> -#include 
>  #include 
>  #include 
>
> --
> 2.25.1
>
Reviewed-by: Igor Opaniuk 

-- 
Best regards - Atentamente - Meilleures salutations

Igor Opaniuk

mailto: igor.opan...@gmail.com
skype: igor.opanyuk
https://www.linkedin.com/in/iopaniuk

Re: [PATCH v2 08/28] md5: Adapt to the changes of md5 header

[Tom Rini]

On Tue, May 07, 2024 at 10:50:50AM -0700, Raymond Mao wrote:

> The md5 header is updated to adapt to both original lib and MbedTLS.
> Now we need to change the API callers accordingly.
> 
> Signed-off-by: Raymond Mao 
> ---
> Changes in v2
> - Initial patch.
> 
>  drivers/crypto/hash/hash_sw.c |  8 
>  lib/md5.c | 10 +-
>  2 files changed, 9 insertions(+), 9 deletions(-)

As this brings md5 in to a consistent state with the rest of the
algorithms, going against the normal coding style of not adding typedefs
makes sense.

Reviewed-by: Tom Rini 

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v2 06/28] efi_loader: remove redundant hash includes

[Tom Rini]

On Tue, May 07, 2024 at 10:50:48AM -0700, Raymond Mao wrote:

> Remove the redundant includes of u-boot/sha1.h, u-boot/sha256.h
> and u-boot/sha512.h
> 
> Signed-off-by: Raymond Mao 

Reviewed-by: Tom Rini 

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v2 05/28] image: remove redundant hash includes

[Tom Rini]

On Tue, May 07, 2024 at 10:50:47AM -0700, Raymond Mao wrote:

> Remove the redundant includes of u-boot/md5.h, u-boot/sha1.h,
> u-boot/sha256.h and u-boot/sha512.h
> 
> Signed-off-by: Raymond Mao 

Reviewed-by: Tom Rini 

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v2 01/28] CI: Exclude MbedTLS subtree for CONFIG checks

[Tom Rini]

On Tue, May 07, 2024 at 10:50:43AM -0700, Raymond Mao wrote:

> Since MbedTLS is an external repo with its own coding style,
> exclude it from Azure and gitlab CI CONFIG checks.
> 
> Signed-off-by: Raymond Mao 

Reviewed-by: Tom Rini 

-- 
Tom


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Description: PGP signature

Re: [PATCH v2 03/28] mbedtls: add mbedtls into the build system

[Tom Rini]

On Tue, May 07, 2024 at 10:50:45AM -0700, Raymond Mao wrote:

> Port mbedtls with dummy libc header files.
> Add mbedtls default config header file.
> Optimize mbedtls default config by disabling unused features to
> reduce the target size.
> Add mbedtls kbuild makefile.
> Add Kconfig and mbedtls config submenu.
[snip]
> diff --git a/include/stdio.h b/include/stdio.h
> index 3241e2d493f..874279c60dd 100644
> --- a/include/stdio.h
> +++ b/include/stdio.h
> @@ -3,6 +3,7 @@
>  
>  #include 
>  #include 
> +#include 
>  
>  /* stdin */
>  int getchar(void);

Is this really needed? I know our include structure is a bit odd. Should
we perhaps look at moving a prototype or two around to be more broadly
compatible?

-- 
Tom


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Description: PGP signature

Re: [PATCH V2 1/4] arm: davinci: Migrate da850-evm to OF_UPSTREAM

[Tom Rini]

On Wed, 01 May 2024 04:57:50 -0500, Adam Ford wrote:

> The da850-evm can remove the U-Boot device trees if migrated
> to OF_UPSTREAM.  This means pointing the device trees to the
> ti/davinci directory.
> 
> Signed-off-by: Adam Ford 
> 
> 
> [...]

Applied to u-boot/master, thanks!

-- 
Tom

[PATCH] qcom_defconfig: enable msm8916 and msm8996

[Sam Day]

From: Caleb Connolly 

Enable the clock/pinctrl drivers for these two SoCs. Previously left out
due to only being used on the db410c and db820c respectively which both
have their own board code. We can still boot these with most features
working without that board code.

Signed-off-by: Caleb Connolly 
---
I nabbed this commit from one of Caleb's work trees. Along with the
carveout patch I just sent, this gets U-Boot to successfully boot when
chained from lk2nd on msm8916 devices supported by that bootloader.

A similar plea on this patch as with the "mach-snapdragon: do carveouts
for qcs404 only" patch: if we could scrape these changes into the
2024.07 release that would be positively sublime.

Signed-off-by: Sam Day 
---
 configs/qcom_defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 80ad3b32e1..c438aeef8e 100644
--- a/configs/qcom_defconfig
+++ b/configs/qcom_defconfig
@@ -37,6 +37,8 @@ CONFIG_OF_LIVE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_BUTTON_QCOM_PMIC=y
 CONFIG_CLK=y
+CONFIG_CLK_QCOM_APQ8016=y
+CONFIG_CLK_QCOM_APQ8096=y
 CONFIG_CLK_QCOM_QCM2290=y
 CONFIG_CLK_QCOM_QCS404=y
 CONFIG_CLK_QCOM_SDM845=y
@@ -73,6 +75,8 @@ CONFIG_PHY_QCOM_QUSB2=y
 CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y
 CONFIG_PHY_QCOM_SNPS_EUSB2=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_QCOM_APQ8016=y
+CONFIG_PINCTRL_QCOM_APQ8096=y
 CONFIG_PINCTRL_QCOM_QCM2290=y
 CONFIG_PINCTRL_QCOM_QCS404=y
 CONFIG_PINCTRL_QCOM_SDM845=y

---
base-commit: 1c40dda60f5f7e83a6d6f541cf5a57eb7e8ec43c
change-id: 20240507-qcom-defconfig-msm8916-61c8437a0b2e

Best regards,
-- 
Sam Day 

[PATCH] mach-snapdragon: do carveouts for qcs404 only

[Sam Day]

The newly introduced carve_out_reserved_memory causes issues when
U-Boot is chained from the lk2nd bootloader. lk2nd provides a
simple-framebuffer device and marks the framebuffer region as no-map in
the supplied /reserved-memory. Consequently, the simple_video driver
triggers a page fault when it tries to write to this region.

As per Caleb's advice, this simple patch only does the carveouts for the
qcs404 SoC for which it was originally designed. The intent is to do the
carveouts for more Qualcomm SoCs in future.

---
I'm not sure if it's feasible to get this in for the 2024.07 release,
but it'd be great if we could - it's the only thing that breaks U-Boot
master on msm8916 devices that chain from lk2nd.

Signed-off-by: Sam Day 
---
 arch/arm/mach-snapdragon/board.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index 3d5994c878..b439a19ec7 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -467,10 +467,12 @@ void enable_caches(void)
gd->arch.tlb_addr = tlb_addr;
gd->arch.tlb_size = tlb_size;
 
-   carveout_start = get_timer(0);
-   /* Takes ~20-50ms on SDM845 */
-   carve_out_reserved_memory();
-   debug("carveout time: %lums\n", get_timer(carveout_start));
-
+   /* We do the carveouts only for QCS404, for now. */
+   if (fdt_node_check_compatible(gd->fdt_blob, 0, "qcom,qcs404") == 0) {
+   carveout_start = get_timer(0);
+   /* Takes ~20-50ms on SDM845 */
+   carve_out_reserved_memory();
+   debug("carveout time: %lums\n", get_timer(carveout_start));
+   }
dcache_enable();
 }

---
base-commit: 1c40dda60f5f7e83a6d6f541cf5a57eb7e8ec43c
change-id: 20240507-qcs404-carveout-only-7a15bbf3fd89

Best regards,
-- 
Sam Day 

[PATCH v2 28/28] configs: enable MbedTLS as default setting

[Raymond Mao]

Enable MbedTLS as default setting for qemu arm64

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 configs/qemu_arm64_defconfig | 5 +
 configs/sandbox_defconfig| 4 
 2 files changed, 9 insertions(+)

diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index 7e166f43908..587a3fb9123 100644
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -67,4 +67,9 @@ CONFIG_TPM2_MMIO=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_PCI=y
 CONFIG_SEMIHOSTING=y
+CONFIG_MBEDTLS_LIB=y
+CONFIG_MBEDTLS_LIB_CRYPTO=y
+CONFIG_MBEDTLS_LIB_X509=y
+# CONFIG_MBEDTLS_LIB_TLS is not set
 CONFIG_TPM=y
+CONFIG_EFI_SECURE_BOOT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 93b52f2de5c..6f36fa0ac86 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -343,6 +343,10 @@ CONFIG_FS_CBFS=y
 CONFIG_FS_CRAMFS=y
 CONFIG_ADDR_MAP=y
 CONFIG_CMD_DHRYSTONE=y
+CONFIG_MBEDTLS_LIB=y
+CONFIG_MBEDTLS_LIB_CRYPTO=y
+CONFIG_MBEDTLS_LIB_X509=y
+# CONFIG_MBEDTLS_LIB_TLS is not set
 CONFIG_ECDSA=y
 CONFIG_ECDSA_VERIFY=y
 CONFIG_TPM=y
-- 
2.25.1

[PATCH v2 27/28] test: Remove ASN1 library test

[Raymond Mao]

With MBEDTLS_LIB_X509 enabled, we don't build the original ASN1 lib,
So remove it from test.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 test/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/Kconfig b/test/Kconfig
index e2ec0994a2e..558a9cd49b4 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -32,7 +32,7 @@ if UT_LIB
 
 config UT_LIB_ASN1
bool "Unit test for asn1 compiler and decoder function"
-   depends on SANDBOX
+   depends on SANDBOX && !MBEDTLS_LIB_X509
default y
imply ASYMMETRIC_KEY_TYPE
imply ASYMMETRIC_PUBLIC_KEY_SUBTYPE
-- 
2.25.1

[PATCH v2 26/28] asn1_decoder: remove ASN1 decoder when using MbedTLS

[Raymond Mao]

When building with MbedTLS, we are using MbedTLS to decode ASN1 data
for x509, pkcs7 and mscode. So we can remove asn1_decoder when
MBEDTLS_LIB_X509 is enabled.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 lib/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/Makefile b/lib/Makefile
index 3534b3301ae..7e3dc1084fb 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -82,7 +82,9 @@ obj-$(CONFIG_$(SPL_)SHA512) += sha512.o
 endif
 
 obj-$(CONFIG_CRYPT_PW) += crypt/
+ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 obj-$(CONFIG_$(SPL_)ASN1_DECODER) += asn1_decoder.o
+endif
 
 obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
 obj-$(CONFIG_$(SPL_)ZSTD) += zstd/
-- 
2.25.1

[PATCH v2 25/28] lib/rypto: Adapt rsa_helper to MbedTLS

[Raymond Mao]

Adapt rsa_helper to build with MbedTLS

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 lib/crypto/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index e3232019df2..866a9a3f059 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -11,6 +11,7 @@ ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 obj-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
 endif
 
+ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 #
 # RSA public key parser
 #
@@ -28,6 +29,7 @@ $(obj)/rsa_helper.o: $(obj)/rsapubkey.asn1.h
 ifdef CONFIG_SPL_BUILD
 CFLAGS_rsa_helper.o += -I$(obj)
 endif
+endif
 
 ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 #
-- 
2.25.1

[PATCH v2 24/28] mbedtls: add RSA helper layer on MbedTLS

[Raymond Mao]

Add RSA helper layer on top on MbedTLS PK and RSA library.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 lib/mbedtls/Makefile |  1 +
 lib/mbedtls/rsa_helper.c | 99 
 2 files changed, 100 insertions(+)
 create mode 100644 lib/mbedtls/rsa_helper.c

diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index f0b8a1c4003..dab110891af 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -27,6 +27,7 @@ x509_mbedtls-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) 
+= public_key.o
 x509_mbedtls-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER) += x509_cert_parser.o
 x509_mbedtls-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER) += pkcs7_parser.o
 x509_mbedtls-$(CONFIG_$(SPL_)MSCODE_PARSER) += mscode_parser.o
+x509_mbedtls-$(CONFIG_$(SPL_)RSA_PUBLIC_KEY_PARSER) += rsa_helper.o
 
 obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += mbedtls_lib_crypto.o
 mbedtls_lib_crypto-y := \
diff --git a/lib/mbedtls/rsa_helper.c b/lib/mbedtls/rsa_helper.c
new file mode 100644
index 000..956e550c856
--- /dev/null
+++ b/lib/mbedtls/rsa_helper.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RSA helper functions using MbedTLS
+ *
+ * Copyright (c) 2024 Linaro Limited
+ * Author: Raymond Mao 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * rsa_parse_pub_key() - decodes the BER encoded buffer and stores in the
+ *   provided struct rsa_key, pointers to the raw key as 
is,
+ *   so that the caller can copy it or MPI parse it, etc.
+ *
+ * @rsa_key:   struct rsa_key key representation
+ * @key:   key in BER format
+ * @key_len:   length of key
+ *
+ * Return: 0 on success or error code in case of error
+ */
+int rsa_parse_pub_key(struct rsa_key *rsa_key, const void *key,
+ unsigned int key_len)
+{
+   int ret = 0;
+   mbedtls_pk_context pk;
+   mbedtls_rsa_context *rsa;
+
+   mbedtls_pk_init();
+
+   ret = mbedtls_pk_parse_public_key(, (const unsigned char *)key,
+ key_len);
+   if (ret) {
+   pr_err("Failed to parse public key, ret:-0x%04x\n",
+  (unsigned int)-ret);
+   ret = -EINVAL;
+   goto clean_pubkey;
+   }
+
+   /* Ensure that it is a RSA key */
+   if (mbedtls_pk_get_type() != MBEDTLS_PK_RSA) {
+   pr_err("Non-RSA keys are not supported\n");
+   ret = -EKEYREJECTED;
+   goto clean_pubkey;
+   }
+
+   /* Get RSA key context */
+   rsa = mbedtls_pk_rsa(pk);
+   if (!rsa) {
+   pr_err("Failed to get RSA key context, ret:-0x%04x\n",
+  (unsigned int)-ret);
+   ret = -EINVAL;
+   goto clean_pubkey;
+   }
+
+   /* Parse modulus (n) */
+   rsa_key->n_sz = mbedtls_mpi_size(>N);
+   rsa_key->n = kzalloc(rsa_key->n_sz, GFP_KERNEL);
+   if (!rsa_key->n) {
+   ret = -ENOMEM;
+   goto clean_pubkey;
+   }
+   ret = mbedtls_mpi_write_binary(>N, (unsigned char *)rsa_key->n,
+  rsa_key->n_sz);
+   if (ret) {
+   pr_err("Failed to parse modulus (n), ret:-0x%04x\n",
+  (unsigned int)-ret);
+   ret = -EINVAL;
+   goto clean_modulus;
+   }
+
+   /* Parse public exponent (e) */
+   rsa_key->e_sz = mbedtls_mpi_size(>E);
+   rsa_key->e = kzalloc(rsa_key->e_sz, GFP_KERNEL);
+   if (!rsa_key->e) {
+   ret = -ENOMEM;
+   goto clean_modulus;
+   }
+   ret = mbedtls_mpi_write_binary(>E, (unsigned char *)rsa_key->e,
+  rsa_key->e_sz);
+   if (!ret)
+   return 0;
+
+   pr_err("Failed to parse public exponent (e), ret:-0x%04x\n",
+  (unsigned int)-ret);
+   ret = -EINVAL;
+
+   kfree(rsa_key->e);
+clean_modulus:
+   kfree(rsa_key->n);
+clean_pubkey:
+   mbedtls_pk_free();
+   return ret;
+}
-- 
2.25.1

[PATCH v2 23/28] lib/crypto: Adapt mscode_parser to MbedTLS

[Raymond Mao]

Adapt mscode_parser to build with MbedTLS

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 include/crypto/mscode.h | 4 
 lib/crypto/Makefile | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/include/crypto/mscode.h b/include/crypto/mscode.h
index 551058b96e6..c214fc87e40 100644
--- a/include/crypto/mscode.h
+++ b/include/crypto/mscode.h
@@ -9,6 +9,10 @@
 #ifndef __UBOOT__
 #include 
 #endif
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+#include 
+#include 
+#endif
 
 struct pefile_context {
 #ifndef __UBOOT__
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index c3fe9c9d2c0..e3232019df2 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -62,6 +62,7 @@ $(obj)/pkcs7.asn1.o: $(obj)/pkcs7.asn1.c $(obj)/pkcs7.asn1.h
 endif
 obj-$(CONFIG_$(SPL_)PKCS7_VERIFY) += pkcs7_verify.o
 
+ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 #
 # Signed PE binary-wrapped key handling
 #
@@ -73,3 +74,4 @@ mscode-y := \
 
 $(obj)/mscode_parser.o: $(obj)/mscode.asn1.h $(obj)/mscode.asn1.h
 $(obj)/mscode.asn1.o: $(obj)/mscode.asn1.c $(obj)/mscode.asn1.h
+endif
-- 
2.25.1

[PATCH v2 22/28] mbedtls: add MSCode parser porting layer

[Raymond Mao]

Add porting layer for MSCode on top of MbedTLS ASN1 library.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 lib/mbedtls/Makefile|   1 +
 lib/mbedtls/mscode_parser.c | 111 
 2 files changed, 112 insertions(+)
 create mode 100644 lib/mbedtls/mscode_parser.c

diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index 005b8a25320..f0b8a1c4003 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_MBEDTLS_LIB_X509) += x509_mbedtls.o
 x509_mbedtls-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
 x509_mbedtls-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER) += x509_cert_parser.o
 x509_mbedtls-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER) += pkcs7_parser.o
+x509_mbedtls-$(CONFIG_$(SPL_)MSCODE_PARSER) += mscode_parser.o
 
 obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += mbedtls_lib_crypto.o
 mbedtls_lib_crypto-y := \
diff --git a/lib/mbedtls/mscode_parser.c b/lib/mbedtls/mscode_parser.c
new file mode 100644
index 000..34715f3a137
--- /dev/null
+++ b/lib/mbedtls/mscode_parser.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MSCode parser using MbedTLS ASN1 library
+ *
+ * Copyright (c) 2024 Linaro Limited
+ * Author: Raymond Mao 
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Parse a Microsoft Individual Code Signing blob
+ *
+ * U.P.SEQUENCE {
+ *U.P.OBJECTIDENTIFIER 1.3.6.1.4.1.311.2.1.15 (SPC_PE_IMAGE_DATA_OBJID)
+ *U.P.SEQUENCE {
+ *   U.P.BITSTRING NaN : 0 unused bit(s);
+ *   [C.P.0] {
+ *  [C.P.2] {
+ * [C.P.0] 
+ *  }
+ *   }
+ *}
+ * }
+ * U.P.SEQUENCE {
+ *U.P.SEQUENCE {
+ *   U.P.OBJECTIDENTIFIER 
+ *   U.P.NULL
+ *}
+ *U.P.OCTETSTRING 
+ * }
+ *
+ */
+int mscode_parse(void *_ctx, const void *content_data, size_t data_len,
+size_t asn1hdrlen)
+{
+   struct pefile_context *ctx = _ctx;
+   unsigned char *p = (unsigned char *)content_data;
+   unsigned char *end = (unsigned char *)content_data + data_len;
+   size_t len = 0;
+   int ret;
+   unsigned char *inner_p;
+   size_t seq_len = 0;
+
+   ret = mbedtls_asn1_get_tag(, end, _len,
+  MBEDTLS_ASN1_CONSTRUCTED |
+  MBEDTLS_ASN1_SEQUENCE);
+   if (ret)
+   return ret;
+
+   inner_p = p;
+   ret = mbedtls_asn1_get_tag(_p, inner_p + seq_len, , 
MBEDTLS_ASN1_OID);
+   if (ret)
+   return ret;
+
+   /* Sanity check on the PE Image Data OID (1.3.6.1.4.1.311.2.1.15) */
+   if (MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_MICROSOFT_PEIMAGEDATA, inner_p, 
len))
+   return -EINVAL;
+
+   p += seq_len;
+   ret = mbedtls_asn1_get_tag(, end, _len,
+  MBEDTLS_ASN1_CONSTRUCTED |
+  MBEDTLS_ASN1_SEQUENCE);
+   if (ret)
+   return ret;
+
+   ret = mbedtls_asn1_get_tag(, p + seq_len, _len,
+  MBEDTLS_ASN1_CONSTRUCTED |
+  MBEDTLS_ASN1_SEQUENCE);
+   if (ret)
+   return ret;
+
+   inner_p = p;
+
+   /*
+* Check if the inner sequence contains a supported hash
+* algorithm OID
+*/
+   ret = mbedtls_asn1_get_tag(_p, inner_p + seq_len, , 
MBEDTLS_ASN1_OID);
+   if (ret)
+   return ret;
+
+   if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_DIGEST_ALG_MD5, inner_p, len))
+   ctx->digest_algo = "md5";
+   else if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_DIGEST_ALG_SHA1, inner_p, 
len))
+   ctx->digest_algo = "sha1";
+   else if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_DIGEST_ALG_SHA224, inner_p, 
len))
+   ctx->digest_algo = "sha224";
+   else if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_DIGEST_ALG_SHA256, inner_p, 
len))
+   ctx->digest_algo = "sha256";
+   else if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_DIGEST_ALG_SHA384, inner_p, 
len))
+   ctx->digest_algo = "sha384";
+   else if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_DIGEST_ALG_SHA512, inner_p, 
len))
+   ctx->digest_algo = "sha512";
+
+   if (!ctx->digest_algo)
+   return -EINVAL;
+
+   p += seq_len;
+   ret = mbedtls_asn1_get_tag(, end, , MBEDTLS_ASN1_OCTET_STRING);
+   if (ret)
+   return ret;
+
+   ctx->digest = p;
+   ctx->digest_len = len;
+
+   return 0;
+}
-- 
2.25.1

[PATCH v2 21/28] lib/crypto: Adapt PKCS7 parser to MbedTLS

[Raymond Mao]

Adapt PKCS7 parser to build with MbedTLS

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 include/crypto/pkcs7_parser.h | 56 +++
 lib/crypto/Makefile   |  4 ++-
 2 files changed, 59 insertions(+), 1 deletion(-)

diff --git a/include/crypto/pkcs7_parser.h b/include/crypto/pkcs7_parser.h
index 2c45cce5234..9f4549871f3 100644
--- a/include/crypto/pkcs7_parser.h
+++ b/include/crypto/pkcs7_parser.h
@@ -11,6 +11,12 @@
 #include 
 #include 
 #include 
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+#include 
+#include 
+#include 
+#include 
+#endif
 #include 
 
 #define kenter(FMT, ...) \
@@ -18,7 +24,54 @@
 #define kleave(FMT, ...) \
pr_devel("<== %s()"FMT"\n", __func__, ##__VA_ARGS__)
 
+/* Backup the parsed MedTLS context that we need */
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+struct pkcs7_mbedtls_ctx {
+   void *content_data;
+};
+
+struct pkcs7_sinfo_mbedtls_ctx {
+   void *authattrs_data;
+   void *content_data_digest;
+};
+#endif
+
+/*
+ * MbedTLS integration Notes:
+ *
+ * MbedTLS PKCS#7 library does not originally support parsing MicroSoft
+ * Authentication Code which is used for verifying the PE image digest.
+ *
+ * 1.  Authenticated Attributes (authenticatedAttributes)
+ * MbedTLS assumes unauthenticatedAttributes and authenticatedAttributes
+ * fields not exist.
+ * See MbedTLS function 'pkcs7_get_signer_info' for details.
+ *
+ * 2.  MicroSoft Authentication Code (mscode)
+ * MbedTLS only supports Content Data type defined as 1.2.840.113549.1.7.1
+ * (MBEDTLS_OID_PKCS7_DATA, aka OID_data).
+ * 1.3.6.1.4.1.311.2.1.4 (MicroSoft Authentication Code, aka
+ * OID_msIndirectData) is not supported.
+ * See MbedTLS function 'pkcs7_get_content_info_type' for details.
+ *
+ * But the EFI loader assumes that a PKCS#7 message with an EFI image always
+ * contains MicroSoft Authentication Code as Content Data (msg->data is NOT
+ * NULL), see function 'efi_signature_verify'.
+ *
+ * MbedTLS patch 
"0002-support-MicroSoft-authentication-code-in-PKCS7-lib.patch"
+ * is to support both above features by parsing the Content Data and
+ * Authenticate Attributes from a given PKCS#7 message.
+ *
+ * Other fields we don't need to populate from MbedTLS, which are used
+ * internally by pkcs7_verify:
+ * 'signer', 'unsupported_crypto', 'blacklisted'
+ * 'sig->digest' is used internally by pkcs7_digest to calculate the hash of
+ * Content Data or Authenticate Attributes.
+ */
 struct pkcs7_signed_info {
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+   struct pkcs7_sinfo_mbedtls_ctx *mbedtls_ctx;
+#endif
struct pkcs7_signed_info *next;
struct x509_certificate *signer; /* Signing certificate (in msg->certs) 
*/
unsignedindex;
@@ -55,6 +108,9 @@ struct pkcs7_signed_info {
 };
 
 struct pkcs7_message {
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+   struct pkcs7_mbedtls_ctx *mbedtls_ctx;
+#endif
struct x509_certificate *certs; /* Certificate list */
struct x509_certificate *crl;   /* Revocation list */
struct pkcs7_signed_info *signed_infos;
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index c89cef5685c..c3fe9c9d2c0 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -48,6 +48,7 @@ $(obj)/x509.asn1.o: $(obj)/x509.asn1.c $(obj)/x509.asn1.h
 $(obj)/x509_akid.asn1.o: $(obj)/x509_akid.asn1.c $(obj)/x509_akid.asn1.h
 endif
 
+ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 #
 # PKCS#7 message handling
 #
@@ -55,10 +56,11 @@ obj-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER) += pkcs7_message.o
 pkcs7_message-y := \
pkcs7.asn1.o \
pkcs7_parser.o
-obj-$(CONFIG_$(SPL_)PKCS7_VERIFY) += pkcs7_verify.o
 
 $(obj)/pkcs7_parser.o: $(obj)/pkcs7.asn1.h
 $(obj)/pkcs7.asn1.o: $(obj)/pkcs7.asn1.c $(obj)/pkcs7.asn1.h
+endif
+obj-$(CONFIG_$(SPL_)PKCS7_VERIFY) += pkcs7_verify.o
 
 #
 # Signed PE binary-wrapped key handling
-- 
2.25.1

[PATCH v2 20/28] mbedtls: add PKCS7 parser porting layer

[Raymond Mao]

Add porting layer for PKCS7 parser on top of MbedTLS PKCS7 library.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.
- Fix EFI Capsule CI test failures.

 lib/mbedtls/Makefile   |   1 +
 lib/mbedtls/pkcs7_parser.c | 533 +
 2 files changed, 534 insertions(+)
 create mode 100644 lib/mbedtls/pkcs7_parser.c

diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index e7cba1ad17c..005b8a25320 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -25,6 +25,7 @@ hash_mbedtls-$(CONFIG_$(SPL_)SHA512) += sha512.o
 obj-$(CONFIG_MBEDTLS_LIB_X509) += x509_mbedtls.o
 x509_mbedtls-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
 x509_mbedtls-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER) += x509_cert_parser.o
+x509_mbedtls-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER) += pkcs7_parser.o
 
 obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += mbedtls_lib_crypto.o
 mbedtls_lib_crypto-y := \
diff --git a/lib/mbedtls/pkcs7_parser.c b/lib/mbedtls/pkcs7_parser.c
new file mode 100644
index 000..a581224b469
--- /dev/null
+++ b/lib/mbedtls/pkcs7_parser.c
@@ -0,0 +1,533 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * PKCS#7 parser using MbedTLS PKCS#7 library
+ *
+ * Copyright (c) 2024 Linaro Limited
+ * Author: Raymond Mao 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static void pkcs7_free_mbedtls_ctx(struct pkcs7_mbedtls_ctx *ctx)
+{
+   if (ctx) {
+   kfree(ctx->content_data);
+   kfree(ctx);
+   }
+}
+
+static void pkcs7_free_sinfo_mbedtls_ctx(struct pkcs7_sinfo_mbedtls_ctx *ctx)
+{
+   if (ctx) {
+   kfree(ctx->authattrs_data);
+   kfree(ctx->content_data_digest);
+   kfree(ctx);
+   }
+}
+
+/*
+ * Parse Authenticate Attributes
+ * TODO: Shall we consider to integrate decoding of authenticate attribute into
+ *  MbedTLS library?
+ *
+ * There are two kinds of structure for the Authenticate Attributes being used
+ * in U-Boot.
+ *
+ * Type 1 - contains in a PE/COFF EFI image:
+ *
+ * [C.P.0] {
+ *   U.P.SEQUENCE {
+ * U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.3 (OID_contentType)
+ * U.P.SET {
+ *U.P.OBJECTIDENTIFIER 1.3.6.1.4.1.311.2.1.4 (OID_msIndirectData)
+ * }
+ *  }
+ *  U.P.SEQUENCE {
+ * U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.5 (OID_signingTime)
+ * U.P.SET {
+ *U.P.UTCTime ''
+ * }
+ *  }
+ *  U.P.SEQUENCE {
+ * U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.4 (OID_messageDigest)
+ * U.P.SET {
+ *U.P.OCTETSTRING 
+ * }
+ *  }
+ *U.P.SEQUENCE {
+ *U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.15 (OID_smimeCapabilites)
+ *   U.P.SET {
+ *  U.P.SEQUENCE {
+ * <...>
+ *  }
+ *   }
+ *}
+ * }
+ *
+ * Type 2 - contains in an EFI Capsule:
+ *
+ * [C.P.0] {
+ *   U.P.SEQUENCE {
+ *  U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.3 (OID_contentType)
+ *  U.P.SET {
+ * U.P.OBJECTIDENTIFIER 1.2.840.113549.1.7.1 (OID_data)
+ *  }
+ *   }
+ *   U.P.SEQUENCE {
+ *  U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.5 (OID_signingTime)
+ *  U.P.SET {
+ * U.P.UTCTime ''
+ *  }
+ *   }
+ *   U.P.SEQUENCE {
+ *  U.P.OBJECTIDENTIFIER 1.2.840.113549.1.9.4 (OID_messageDigest)
+ *  U.P.SET {
+ * U.P.OCTETSTRING 
+ *  }
+ *  }
+ *}
+ *
+ * Note:
+ * They have different Content Type (OID_msIndirectData or OID_data).
+ * OID_smimeCapabilites only exists in a PE/COFF EFI image.
+ */
+static int authattrs_parse(struct pkcs7_message *msg, void *aa, size_t aa_len,
+  struct pkcs7_signed_info *sinfo)
+{
+   unsigned char *p = (unsigned char *)aa;
+   unsigned char *end = (unsigned char *)aa + aa_len;
+   size_t len = 0;
+   int ret;
+   unsigned char *inner_p;
+   size_t seq_len = 0;
+
+   ret = mbedtls_asn1_get_tag(, end, _len,
+  MBEDTLS_ASN1_CONTEXT_SPECIFIC |
+  MBEDTLS_ASN1_CONSTRUCTED);
+   if (ret)
+   return ret;
+
+   while (!mbedtls_asn1_get_tag(, end, _len,
+MBEDTLS_ASN1_CONSTRUCTED |
+MBEDTLS_ASN1_SEQUENCE)) {
+   inner_p = p;
+   ret = mbedtls_asn1_get_tag(_p, p + seq_len, ,
+  MBEDTLS_ASN1_OID);
+   if (ret)
+   return ret;
+
+   if (!MBEDTLS_OID_CMP_RAW(MBEDTLS_OID_PKCS9_CONTENTTYPE, 
inner_p, len)) {
+   inner_p += len;
+   ret = mbedtls_asn1_get_tag(_p, p + seq_len, ,
+  MBEDTLS_ASN1_CONSTRUCTED |
+  MBEDTLS_ASN1_SET);
+   if (ret)
+   return ret;
+
+   ret = mbedtls_asn1_get_tag(_p, p + seq_len, ,
+   

[PATCH v2 19/28] lib/crypto: Adapt x509_cert_parser to MbedTLS

[Raymond Mao]

Adapt x509_cert_parser and x509_public_key for building with MbedTLS

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 include/crypto/x509_parser.h | 36 
 lib/crypto/Makefile  |  2 ++
 lib/crypto/x509_public_key.c |  4 
 3 files changed, 42 insertions(+)

diff --git a/include/crypto/x509_parser.h b/include/crypto/x509_parser.h
index 4cbdc1d6612..32ca9d5db79 100644
--- a/include/crypto/x509_parser.h
+++ b/include/crypto/x509_parser.h
@@ -11,8 +11,36 @@
 #include 
 #include 
 #include 
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+#include 
+#include 
+#include 
+#endif
 
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+/* Backup of part of the parsing context */
+struct x509_cert_mbedtls_ctx {
+   void*tbs;   /* Signed data */
+   void*raw_serial;/* Raw serial number in ASN.1 */
+   void*raw_issuer;/* Raw issuer name in ASN.1 */
+   void*raw_subject;   /* Raw subject name in ASN.1 */
+   void*raw_skid;  /* Raw subjectKeyId in ASN.1 */
+};
+#endif
+
+/*
+ * MbedTLS integration Notes:
+ *
+ * Fields we don't need to populate from MbedTLS:
+ * 'raw_sig' and 'raw_sig_size' are buffer for x509_parse_context,
+ * not needed for MbedTLS.
+ * 'signer' and 'seen' are used internally by pkcs7_verify.
+ * 'verified' is not inuse.
+ */
 struct x509_certificate {
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+   struct x509_cert_mbedtls_ctx *mbedtls_ctx;
+#endif
struct x509_certificate *next;
struct x509_certificate *signer;/* Certificate that signed this 
one */
struct public_key *pub; /* Public key details */
@@ -48,6 +76,12 @@ struct x509_certificate {
  * x509_cert_parser.c
  */
 extern void x509_free_certificate(struct x509_certificate *cert);
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+int x509_populate_pubkey(mbedtls_x509_crt *cert, struct public_key **pub_key);
+int x509_populate_cert(mbedtls_x509_crt *mbedtls_cert,
+  struct x509_certificate **pcert);
+time64_t x509_get_timestamp(const mbedtls_x509_time *x509_time);
+#endif
 extern struct x509_certificate *x509_cert_parse(const void *data, size_t 
datalen);
 extern int x509_decode_time(time64_t *_t,  size_t hdrlen,
unsigned char tag,
@@ -56,6 +90,8 @@ extern int x509_decode_time(time64_t *_t,  size_t hdrlen,
 /*
  * x509_public_key.c
  */
+#if !CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
 extern int x509_get_sig_params(struct x509_certificate *cert);
+#endif
 extern int x509_check_for_self_signed(struct x509_certificate *cert);
 #endif /* _X509_PARSER_H */
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index 8f7d9811f03..c89cef5685c 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -29,6 +29,7 @@ ifdef CONFIG_SPL_BUILD
 CFLAGS_rsa_helper.o += -I$(obj)
 endif
 
+ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 #
 # X.509 Certificate handling
 #
@@ -45,6 +46,7 @@ $(obj)/x509_cert_parser.o: \
 
 $(obj)/x509.asn1.o: $(obj)/x509.asn1.c $(obj)/x509.asn1.h
 $(obj)/x509_akid.asn1.o: $(obj)/x509_akid.asn1.c $(obj)/x509_akid.asn1.h
+endif
 
 #
 # PKCS#7 message handling
diff --git a/lib/crypto/x509_public_key.c b/lib/crypto/x509_public_key.c
index a10145a7cdc..962611f3fee 100644
--- a/lib/crypto/x509_public_key.c
+++ b/lib/crypto/x509_public_key.c
@@ -30,6 +30,8 @@
 #include "x509_parser.h"
 #endif
 
+#if !CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+
 /*
  * Set up the signature parameters in an X.509 certificate.  This involves
  * digesting the signed data and extracting the signature.
@@ -139,6 +141,8 @@ error:
return ret;
 }
 
+#endif /* !CONFIG_IS_ENABLED(MBEDTLS_LIB_X509) */
+
 /*
  * Check for self-signedness in an X.509 cert and if found, check the signature
  * immediately if we can.
-- 
2.25.1

[PATCH v2 18/28] mbedtls: add X509 cert parser porting layer

[Raymond Mao]

Add porting layer for X509 cert parser on top of MbedTLS X509
library.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 lib/mbedtls/Makefile   |   1 +
 lib/mbedtls/x509_cert_parser.c | 497 +
 2 files changed, 498 insertions(+)
 create mode 100644 lib/mbedtls/x509_cert_parser.c

diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index cd0144eac1c..e7cba1ad17c 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -24,6 +24,7 @@ hash_mbedtls-$(CONFIG_$(SPL_)SHA512) += sha512.o
 # x509 libraries
 obj-$(CONFIG_MBEDTLS_LIB_X509) += x509_mbedtls.o
 x509_mbedtls-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
+x509_mbedtls-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER) += x509_cert_parser.o
 
 obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += mbedtls_lib_crypto.o
 mbedtls_lib_crypto-y := \
diff --git a/lib/mbedtls/x509_cert_parser.c b/lib/mbedtls/x509_cert_parser.c
new file mode 100644
index 000..b0867d31047
--- /dev/null
+++ b/lib/mbedtls/x509_cert_parser.c
@@ -0,0 +1,497 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * X509 cert parser using MbedTLS X509 library
+ *
+ * Copyright (c) 2024 Linaro Limited
+ * Author: Raymond Mao 
+ */
+
+#include 
+#include 
+#include 
+
+static void x509_free_mbedtls_ctx(struct x509_cert_mbedtls_ctx *ctx)
+{
+   if (ctx) {
+   kfree(ctx->tbs);
+   kfree(ctx->raw_serial);
+   kfree(ctx->raw_issuer);
+   kfree(ctx->raw_subject);
+   kfree(ctx->raw_skid);
+   kfree(ctx);
+   }
+}
+
+static int x509_set_cert_flags(struct x509_certificate *cert)
+{
+   struct public_key_signature *sig = cert->sig;
+
+   if (!sig || !cert->pub) {
+   pr_err("Signature or public key is not initialized\n");
+   return -ENOPKG;
+   }
+
+   if (!cert->pub->pkey_algo)
+   cert->unsupported_key = true;
+
+   if (!sig->pkey_algo)
+   cert->unsupported_sig = true;
+
+   if (!sig->hash_algo)
+   cert->unsupported_sig = true;
+
+   /* TODO: is_hash_blacklisted()? */
+
+   /* Detect self-signed certificates and set self_signed flag */
+   return x509_check_for_self_signed(cert);
+}
+
+/*
+ * Check for self-signedness in an X.509 cert and if found, check the signature
+ * immediately if we can.
+ */
+int x509_check_for_self_signed(struct x509_certificate *cert)
+{
+   int ret = 0;
+
+   if (cert->raw_subject_size != cert->raw_issuer_size ||
+   memcmp(cert->raw_subject, cert->raw_issuer,
+  cert->raw_issuer_size) != 0)
+   goto not_self_signed;
+
+   if (cert->sig->auth_ids[0] || cert->sig->auth_ids[1]) {
+   /* If the AKID is present it may have one or two parts.  If
+* both are supplied, both must match.
+*/
+   bool a = asymmetric_key_id_same(cert->skid, 
cert->sig->auth_ids[1]);
+   bool b = asymmetric_key_id_same(cert->id, 
cert->sig->auth_ids[0]);
+
+   if (!a && !b)
+   goto not_self_signed;
+
+   ret = -EKEYREJECTED;
+   if (((a && !b) || (b && !a)) &&
+   cert->sig->auth_ids[0] && cert->sig->auth_ids[1])
+   goto out;
+   }
+
+   ret = -EKEYREJECTED;
+   if (strcmp(cert->pub->pkey_algo, cert->sig->pkey_algo) != 0)
+   goto out;
+
+   ret = public_key_verify_signature(cert->pub, cert->sig);
+   if (ret < 0) {
+   if (ret == -ENOPKG) {
+   cert->unsupported_sig = true;
+   ret = 0;
+   }
+   goto out;
+   }
+
+   pr_devel("Cert Self-signature verified");
+   cert->self_signed = true;
+
+out:
+   return ret;
+
+not_self_signed:
+   return 0;
+}
+
+time64_t x509_get_timestamp(const mbedtls_x509_time *x509_time)
+{
+   unsigned int year, mon, day, hour, min, sec;
+
+   /* Adjust for year since 1900 */
+   year = x509_time->year - 1900;
+   /* Adjust for 0-based month */
+   mon = x509_time->mon - 1;
+   day = x509_time->day;
+   hour = x509_time->hour;
+   min = x509_time->min;
+   sec = x509_time->sec;
+
+   return (time64_t)mktime64(year, mon, day, hour, min, sec);
+}
+
+static char *x509_populate_dn_name_string(const mbedtls_x509_name *name)
+{
+   size_t len = 256;
+   size_t wb;
+   char *name_str;
+
+   do {
+   name_str = kzalloc(len, GFP_KERNEL);
+   if (!name_str)
+   return NULL;
+
+   wb = mbedtls_x509_dn_gets(name_str, len, name);
+   if (wb < 0) {
+   pr_err("Get DN string failed, ret:-0x%04x\n",
+  (unsigned int)-wb);
+   kfree(name_str);
+   len = len * 2; /* Try with a bigger buffer */

[PATCH v2 17/28] lib/crypto: Adapt public_key header with MbedTLS

[Raymond Mao]

Adapt the public_key header file with MbedTLS

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 include/crypto/public_key.h  | 6 ++
 lib/crypto/Makefile  | 2 ++
 lib/crypto/asymmetric_type.c | 2 +-
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/include/crypto/public_key.h b/include/crypto/public_key.h
index 3ba90fcc348..55cd4c2b012 100644
--- a/include/crypto/public_key.h
+++ b/include/crypto/public_key.h
@@ -12,6 +12,12 @@
 
 #ifdef __UBOOT__
 #include 
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509)
+#include 
+#include 
+#include 
+#include 
+#endif
 #else
 #include 
 #endif
diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
index bec1bc95a65..8f7d9811f03 100644
--- a/lib/crypto/Makefile
+++ b/lib/crypto/Makefile
@@ -7,7 +7,9 @@ obj-$(CONFIG_$(SPL_)ASYMMETRIC_KEY_TYPE) += asymmetric_keys.o
 
 asymmetric_keys-y := asymmetric_type.o
 
+ifneq ($(CONFIG_MBEDTLS_LIB_X509), y)
 obj-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
+endif
 
 #
 # RSA public key parser
diff --git a/lib/crypto/asymmetric_type.c b/lib/crypto/asymmetric_type.c
index 24c2d15ef97..95b82cd8e84 100644
--- a/lib/crypto/asymmetric_type.c
+++ b/lib/crypto/asymmetric_type.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #endif
-#include 
 #ifdef __UBOOT__
 #include 
 #include 
@@ -26,6 +25,7 @@
 #include 
 #include 
 #endif
+#include 
 #ifdef __UBOOT__
 #include 
 #else
-- 
2.25.1

[PATCH v2 16/28] mbedtls: add public key porting layer

[Raymond Mao]

Add porting layer for public key on top of MbedTLS X509 library.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Move the porting layer to MbedTLS dir.

 lib/mbedtls/Makefile |   4 ++
 lib/mbedtls/public_key.c | 105 +++
 2 files changed, 109 insertions(+)
 create mode 100644 lib/mbedtls/public_key.c

diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index b8eda9638f4..cd0144eac1c 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -21,6 +21,10 @@ hash_mbedtls-$(CONFIG_$(SPL_)SHA1) += sha1.o
 hash_mbedtls-$(CONFIG_$(SPL_)SHA256) += sha256.o
 hash_mbedtls-$(CONFIG_$(SPL_)SHA512) += sha512.o
 
+# x509 libraries
+obj-$(CONFIG_MBEDTLS_LIB_X509) += x509_mbedtls.o
+x509_mbedtls-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
+
 obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += mbedtls_lib_crypto.o
 mbedtls_lib_crypto-y := \
$(MBEDTLS_LIB_DIR)/aes.o \
diff --git a/lib/mbedtls/public_key.c b/lib/mbedtls/public_key.c
new file mode 100644
index 000..2297b4397ba
--- /dev/null
+++ b/lib/mbedtls/public_key.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Public key helper functions using MbedTLS X509 library
+ *
+ * Copyright (c) 2024 Linaro Limited
+ * Author: Raymond Mao 
+ */
+
+#include 
+#include 
+
+void public_key_free(struct public_key *key)
+{
+   if (key) {
+   kfree(key->key);
+   kfree(key->params);
+   kfree(key);
+   }
+}
+
+void public_key_signature_free(struct public_key_signature *sig)
+{
+   int i;
+
+   if (sig) {
+   for (i = 0; i < ARRAY_SIZE(sig->auth_ids); i++)
+   kfree(sig->auth_ids[i]);
+   kfree(sig->s);
+   kfree(sig->digest);
+   kfree(sig);
+   }
+}
+
+int public_key_verify_signature(const struct public_key *pkey,
+   const struct public_key_signature *sig)
+{
+   mbedtls_md_type_t mb_hash_algo;
+   mbedtls_pk_context pk_ctx;
+   int ret;
+
+   if (!pkey || !sig || pkey->key_is_private)
+   return -EINVAL;
+
+   /*
+* ECRDSA (Elliptic Curve RedDSA) from Red Hat is not supported by
+* MbedTLS
+*/
+   if (strcmp(pkey->pkey_algo, "rsa")) {
+   pr_err("Encryption is not RSA: %s\n", sig->pkey_algo);
+   return -EINVAL;
+   }
+
+   /*
+* Can be pkcs1 or raw, but pkcs1 is expected.
+* This is just for argument checking, not necessarily passed to 
MbedTLS,
+* For RSA signatures, MbedTLS typically supports the PKCS#1 v1.5
+* (aka. pkcs1) encoding by default.
+* The library internally handles the details of decoding and verifying
+* the signature according to the expected encoding for the specified 
algorithm.
+*/
+   if (strcmp(sig->encoding, "pkcs1")) {
+   pr_err("Encoding %s is not supported, only supports pkcs1\n",
+  sig->encoding);
+   return -EINVAL;
+   }
+
+   if (!strcmp(sig->hash_algo, "sha1"))
+   mb_hash_algo = MBEDTLS_MD_SHA1;
+   else if (!strcmp(sig->hash_algo, "sha224"))
+   mb_hash_algo = MBEDTLS_MD_SHA224;
+   else if (!strcmp(sig->hash_algo, "sha256"))
+   mb_hash_algo = MBEDTLS_MD_SHA256;
+   else if (!strcmp(sig->hash_algo, "sha384"))
+   mb_hash_algo = MBEDTLS_MD_SHA384;
+   else if (!strcmp(sig->hash_algo, "sha512"))
+   mb_hash_algo = MBEDTLS_MD_SHA512;
+   else/* Unknown or unsupported hash algorithm */
+   return -EINVAL;
+   /* Initialize the mbedtls_pk_context with RSA key type */
+   mbedtls_pk_init(_ctx);
+
+   /* Parse the DER-encoded public key */
+   ret = mbedtls_pk_parse_public_key(_ctx, pkey->key, pkey->keylen);
+   if (ret) {
+   pr_err("Failed to parse public key, ret:-0x%04x\n",
+  (unsigned int)-ret);
+   ret = -EINVAL;
+   goto err_key;
+   }
+
+   /* Ensure that it is a RSA key */
+   if (mbedtls_pk_get_type(_ctx) != MBEDTLS_PK_RSA) {
+   pr_err("Only RSA keys are supported\n");
+   ret = -EKEYREJECTED;
+   goto err_key;
+   }
+
+   /* Verify the hash */
+   ret = mbedtls_pk_verify(_ctx, mb_hash_algo, sig->digest,
+   sig->digest_size, sig->s, sig->s_size);
+
+err_key:
+   mbedtls_pk_free(_ctx);
+   return ret;
+}
-- 
2.25.1

[PATCH v2 15/28] mbedtls/external: update MbedTLS PKCS7 test suites

[Raymond Mao]

Update the PKCS7 test suites for multiple certs.

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 .../external/mbedtls/tests/suites/test_suite_pkcs7.data   | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/mbedtls/external/mbedtls/tests/suites/test_suite_pkcs7.data 
b/lib/mbedtls/external/mbedtls/tests/suites/test_suite_pkcs7.data
index d3b83cdf0aa..2dd1c56109f 100644
--- a/lib/mbedtls/external/mbedtls/tests/suites/test_suite_pkcs7.data
+++ b/lib/mbedtls/external/mbedtls/tests/suites/test_suite_pkcs7.data
@@ -14,9 +14,9 @@ PKCS7 Signed Data Parse with zero signers
 depends_on:MBEDTLS_MD_CAN_SHA256
 pkcs7_parse:"data_files/pkcs7_data_no_signers.der":MBEDTLS_PKCS7_SIGNED_DATA
 
-PKCS7 Signed Data Parse Fail with multiple certs #4
+PKCS7 Signed Data Parse Pass with multiple certs #4
 depends_on:MBEDTLS_MD_CAN_SHA256:MBEDTLS_RSA_C
-pkcs7_parse:"data_files/pkcs7_data_multiple_certs_signed.der":MBEDTLS_ERR_PKCS7_FEATURE_UNAVAILABLE
+pkcs7_parse:"data_files/pkcs7_data_multiple_certs_signed.der":MBEDTLS_PKCS7_SIGNED_DATA
 
 PKCS7 Signed Data Parse Fail with corrupted cert #5.0
 depends_on:MBEDTLS_MD_CAN_SHA256:MBEDTLS_RSA_C
-- 
2.25.1

[PATCH v2 14/28] mbedtls/external: support decoding multiple signer's cert

[Raymond Mao]

Support decoding multiple signer's cert in the signed data within
a PKCS7 message.

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 lib/mbedtls/external/mbedtls/library/pkcs7.c | 75 
 1 file changed, 47 insertions(+), 28 deletions(-)

diff --git a/lib/mbedtls/external/mbedtls/library/pkcs7.c 
b/lib/mbedtls/external/mbedtls/library/pkcs7.c
index da73fb341d6..01105227d7a 100644
--- a/lib/mbedtls/external/mbedtls/library/pkcs7.c
+++ b/lib/mbedtls/external/mbedtls/library/pkcs7.c
@@ -61,6 +61,36 @@ static int pkcs7_get_next_content_len(unsigned char **p, 
unsigned char *end,
 return ret;
 }
 
+/**
+ * Get and decode one cert from a sequence.
+ * Return 0 for success,
+ * Return negative error code for failure.
+ **/
+static int pkcs7_get_one_cert(unsigned char **p, unsigned char *end,
+  mbedtls_x509_crt *certs)
+{
+int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
+size_t len = 0;
+unsigned char *start = *p;
+unsigned char *end_cert;
+
+ret = mbedtls_asn1_get_tag(p, end, , MBEDTLS_ASN1_CONSTRUCTED
+   | MBEDTLS_ASN1_SEQUENCE);
+if (ret != 0) {
+return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_PKCS7_INVALID_CERT, ret);
+}
+
+end_cert = *p + len;
+
+if ((ret = mbedtls_x509_crt_parse_der(certs, start, end_cert - start)) < 
0) {
+return MBEDTLS_ERR_PKCS7_INVALID_CERT;
+}
+
+*p = end_cert;
+
+return 0;
+}
+
 /**
  * version Version
  * Version ::= INTEGER
@@ -178,11 +208,12 @@ static int pkcs7_get_certificates(unsigned char **p, 
unsigned char *end,
   mbedtls_x509_crt *certs)
 {
 int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
-size_t len1 = 0;
-size_t len2 = 0;
-unsigned char *end_set, *end_cert, *start;
+size_t len = 0;
+unsigned char *end_set;
+int num_of_certs = 0;
 
-ret = mbedtls_asn1_get_tag(p, end, , MBEDTLS_ASN1_CONSTRUCTED
+/* Get the set of certs */
+ret = mbedtls_asn1_get_tag(p, end, , MBEDTLS_ASN1_CONSTRUCTED
| MBEDTLS_ASN1_CONTEXT_SPECIFIC);
 if (ret == MBEDTLS_ERR_ASN1_UNEXPECTED_TAG) {
 return 0;
@@ -190,38 +221,26 @@ static int pkcs7_get_certificates(unsigned char **p, 
unsigned char *end,
 if (ret != 0) {
 return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_PKCS7_INVALID_FORMAT, ret);
 }
-start = *p;
-end_set = *p + len1;
+end_set = *p + len;
 
-ret = mbedtls_asn1_get_tag(p, end_set, , MBEDTLS_ASN1_CONSTRUCTED
-   | MBEDTLS_ASN1_SEQUENCE);
+ret = pkcs7_get_one_cert(p, end_set, certs);
 if (ret != 0) {
-return MBEDTLS_ERROR_ADD(MBEDTLS_ERR_PKCS7_INVALID_CERT, ret);
+return ret;
 }
 
-end_cert = *p + len2;
+num_of_certs++;
 
-/*
- * This is to verify that there is only one signer certificate. It seems 
it is
- * not easy to differentiate between the chain vs different signer's 
certificate.
- * So, we support only the root certificate and the single signer.
- * The behaviour would be improved with addition of multiple signer 
support.
- */
-if (end_cert != end_set) {
-return MBEDTLS_ERR_PKCS7_FEATURE_UNAVAILABLE;
-}
-
-if ((ret = mbedtls_x509_crt_parse_der(certs, start, len1)) < 0) {
-return MBEDTLS_ERR_PKCS7_INVALID_CERT;
+while (*p != end_set) {
+ret = pkcs7_get_one_cert(p, end_set, certs);
+if (ret != 0) {
+return ret;
+}
+num_of_certs++;
 }
 
-*p = end_cert;
+*p = end_set;
 
-/*
- * Since in this version we strictly support single certificate, and 
reaching
- * here implies we have parsed successfully, we return 1.
- */
-return 1;
+return num_of_certs;
 }
 
 /**
-- 
2.25.1

[PATCH v2 13/28] mbedtls/external: support PKCS9 Authenticate Attributes

[Raymond Mao]

Populate PKCS9 Authenticate Attributes from signer info if it exists
in a PKCS7 message.
Add OIDs for describing objects using for Authenticate Attributes.

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 .../external/mbedtls/include/mbedtls/oid.h|  5 +
 .../external/mbedtls/include/mbedtls/pkcs7.h  | 11 +++
 lib/mbedtls/external/mbedtls/library/pkcs7.c  | 19 ++-
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h 
b/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h
index 2ee982808fa..43cef99f1e3 100644
--- a/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h
+++ b/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h
@@ -238,6 +238,11 @@
 #define MBEDTLS_OID_RSA_SHA_OBS "\x2B\x0E\x03\x02\x1D"
 
 #define MBEDTLS_OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9 "\x01" /**< 
emailAddress AttributeType ::= { pkcs-9 1 } */
+#define MBEDTLS_OID_PKCS9_CONTENTTYPE   MBEDTLS_OID_PKCS9 "\x03" /**< 
contentType AttributeType ::= { pkcs-9 3 } */
+#define MBEDTLS_OID_PKCS9_MESSAGEDIGEST MBEDTLS_OID_PKCS9 "\x04" /**< 
messageDigest AttributeType ::= { pkcs-9 4 } */
+#define MBEDTLS_OID_PKCS9_SIGNINGTIME   MBEDTLS_OID_PKCS9 "\x05" /**< 
signingTime AttributeType ::= { pkcs-9 5 } */
+#define MBEDTLS_OID_PKCS9_SMIMECAP  MBEDTLS_OID_PKCS9 "\x0f" /**< 
smimeCapabilites AttributeType ::= { pkcs-9 15 } */
+#define MBEDTLS_OID_PKCS9_SMIMEAA   MBEDTLS_OID_PKCS9 "\x10\x02\x0b" /**< 
smimeCapabilites AttributeType ::= { pkcs-9 16 2 11} */
 
 /* RFC 4055 */
 #define MBEDTLS_OID_RSASSA_PSS  MBEDTLS_OID_PKCS1 "\x0a" /**< 
id-RSASSA-PSS ::= { pkcs-1 10 } */
diff --git a/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h 
b/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h
index 9e29b74af70..a88a5e858fc 100644
--- a/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h
+++ b/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h
@@ -102,6 +102,16 @@ typedef enum {
 }
 mbedtls_pkcs7_type;
 
+/*
+ * Authenticate Attributes for MicroSoft Authentication Code using in U-Boot
+ * Secure Boot
+ */
+typedef struct mbedtls_pkcs7_authattrs {
+size_t data_len;
+void *data;
+}
+mbedtls_pkcs7_authattrs;
+
 /**
  * Structure holding PKCS #7 signer info
  */
@@ -113,6 +123,7 @@ typedef struct mbedtls_pkcs7_signer_info {
 mbedtls_x509_buf MBEDTLS_PRIVATE(alg_identifier);
 mbedtls_x509_buf MBEDTLS_PRIVATE(sig_alg_identifier);
 mbedtls_x509_buf MBEDTLS_PRIVATE(sig);
+mbedtls_pkcs7_authattrs authattrs;
 struct mbedtls_pkcs7_signer_info *MBEDTLS_PRIVATE(next);
 }
 mbedtls_pkcs7_signer_info;
diff --git a/lib/mbedtls/external/mbedtls/library/pkcs7.c 
b/lib/mbedtls/external/mbedtls/library/pkcs7.c
index 0c2436b56b7..da73fb341d6 100644
--- a/lib/mbedtls/external/mbedtls/library/pkcs7.c
+++ b/lib/mbedtls/external/mbedtls/library/pkcs7.c
@@ -288,6 +288,7 @@ static int pkcs7_get_signer_info(unsigned char **p, 
unsigned char *end,
 unsigned char *end_signer, *end_issuer_and_sn;
 int asn1_ret = 0, ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
 size_t len = 0;
+unsigned char *tmp_p;
 
 asn1_ret = mbedtls_asn1_get_tag(p, end, , MBEDTLS_ASN1_CONSTRUCTED
 | MBEDTLS_ASN1_SEQUENCE);
@@ -349,7 +350,23 @@ static int pkcs7_get_signer_info(unsigned char **p, 
unsigned char *end,
 goto out;
 }
 
-/* Assume authenticatedAttributes is nonexistent */
+/* Save authenticatedAttributes if present */
+if (*p < end_signer &&
+**p == (MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | 0)) 
{
+tmp_p = *p;
+
+ret = mbedtls_asn1_get_tag(p, end_signer, ,
+   MBEDTLS_ASN1_CONTEXT_SPECIFIC |
+   MBEDTLS_ASN1_CONSTRUCTED | 0);
+if (ret != 0) {
+goto out;
+}
+
+signer->authattrs.data = tmp_p;
+signer->authattrs.data_len = len + *p - tmp_p;
+*p += len;
+}
+
 ret = pkcs7_get_digest_algorithm(p, end_signer, 
>sig_alg_identifier);
 if (ret != 0) {
 goto out;
-- 
2.25.1

[PATCH v2 12/28] mbedtls/external: support MicroSoft Authentication Code

[Raymond Mao]

Populate MicroSoft Authentication Code from the content data
into PKCS7 decoding context if it exists in a PKCS7 message.
Add OIDs for describing objects using for MicroSoft Authentication
Code.

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 .../external/mbedtls/include/mbedtls/oid.h| 30 ++
 .../external/mbedtls/include/mbedtls/pkcs7.h  | 10 
 lib/mbedtls/external/mbedtls/library/pkcs7.c  | 60 +++
 3 files changed, 90 insertions(+), 10 deletions(-)

diff --git a/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h 
b/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h
index fdc25ebf885..2ee982808fa 100644
--- a/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h
+++ b/lib/mbedtls/external/mbedtls/include/mbedtls/oid.h
@@ -352,6 +352,36 @@
 #define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE 
"\x05" /**< pbeWithSHAAnd128BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 5} 
*/
 #define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC  MBEDTLS_OID_PKCS12_PBE 
"\x06" /**< pbeWithSHAAnd40BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 6} */
 
+/*
+ * MicroSoft Authenticate Code OIDs
+ */
+#define MBEDTLS_OID_PRIVATE_ENTERPRISE  MBEDTLS_OID_INTERNET 
"\x04\x01" /* {iso(1) identified-organization(3) dod(6) internet(1) private(4) 
enterprise(1) */
+#define MBEDTLS_OID_MICROSOFT   "\x82\x37"  /* 
{microsoft(311)} */
+/*
+ * OID_msIndirectData: (1.3.6.1.4.1.311.2.1.4)
+ * {iso(1) identified-organization(3) dod(6) internet(1) private(4) 
enterprise(1) microsoft(311) 2(2) 1(1) 4(4)}
+ */
+#define MBEDTLS_OID_MICROSOFT_INDIRECTDATA  MBEDTLS_OID_PRIVATE_ENTERPRISE 
MBEDTLS_OID_MICROSOFT \
+"\x02\x01\x04"
+/*
+ * OID_msStatementType: (1.3.6.1.4.1.311.2.1.11)
+ * {iso(1) identified-organization(3) dod(6) internet(1) private(4) 
enterprise(1) microsoft(311) 2(2) 1(1) 11(11)}
+ */
+#define MBEDTLS_OID_MICROSOFT_STATETYPE  MBEDTLS_OID_PRIVATE_ENTERPRISE 
MBEDTLS_OID_MICROSOFT \
+"\x02\x01\x0b"
+/*
+ * OID_msSpOpusInfo: (1.3.6.1.4.1.311.2.1.12)
+ * {iso(1) identified-organization(3) dod(6) internet(1) private(4) 
enterprise(1) microsoft(311) 2(2) 1(1) 12(12)}
+ */
+#define MBEDTLS_OID_MICROSOFT_SPOPUSINFO  MBEDTLS_OID_PRIVATE_ENTERPRISE 
MBEDTLS_OID_MICROSOFT \
+"\x02\x01\x0b"
+/*
+ * OID_msPeImageDataObjId: (1.3.6.1.4.1.311.2.1.15)
+ * {iso(1) identified-organization(3) dod(6) internet(1) private(4) 
enterprise(1) microsoft(311) 2(2) 1(1) 15(15)}
+ */
+#define MBEDTLS_OID_MICROSOFT_PEIMAGEDATA  MBEDTLS_OID_PRIVATE_ENTERPRISE 
MBEDTLS_OID_MICROSOFT \
+"\x02\x01\x0f"
+
 /*
  * EC key algorithms from RFC 5480
  */
diff --git a/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h 
b/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h
index e9b482208e6..9e29b74af70 100644
--- a/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h
+++ b/lib/mbedtls/external/mbedtls/include/mbedtls/pkcs7.h
@@ -132,12 +132,22 @@ typedef struct mbedtls_pkcs7_signed_data {
 }
 mbedtls_pkcs7_signed_data;
 
+/* Content Data for MicroSoft Authentication Code using in U-Boot Secure Boot 
*/
+typedef struct mbedtls_pkcs7_conten_data {
+int data_type;  /* Type of Data */
+size_t data_len;/* Length of Data */
+size_t data_hdrlen; /* Length of Data ASN.1 header */
+void *data; /* Content Data */
+}
+mbedtls_pkcs7_conten_data;
+
 /**
  * Structure holding PKCS #7 structure, only signed data for now
  */
 typedef struct mbedtls_pkcs7 {
 mbedtls_pkcs7_buf MBEDTLS_PRIVATE(raw);
 mbedtls_pkcs7_signed_data MBEDTLS_PRIVATE(signed_data);
+mbedtls_pkcs7_conten_data content_data;
 }
 mbedtls_pkcs7;
 
diff --git a/lib/mbedtls/external/mbedtls/library/pkcs7.c 
b/lib/mbedtls/external/mbedtls/library/pkcs7.c
index 3aac662ba69..0c2436b56b7 100644
--- a/lib/mbedtls/external/mbedtls/library/pkcs7.c
+++ b/lib/mbedtls/external/mbedtls/library/pkcs7.c
@@ -29,6 +29,13 @@
 #include 
 #endif
 
+enum OID {
+/* PKCS#7 {iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) pkcs-7(7)} 
*/
+MBEDTLS_OID_DATA = 13,  /* 1.2.840.113549.1.7.1 */
+/* Microsoft Authenticode & Software Publishing */
+MBEDTLS_OID_MS_INDIRECTDATA = 24,/* 1.3.6.1.4.1.311.2.1.4 */
+};
+
 /**
  * Initializes the mbedtls_pkcs7 structure.
  */
@@ -449,7 +456,7 @@ cleanup:
  *  signerInfos SignerInfos }
  */
 static int pkcs7_get_signed_data(unsigned char *buf, size_t buflen,
- mbedtls_pkcs7_signed_data *signed_data)
+ mbedtls_pkcs7 *pkcs7)
 {
 unsigned char *p = buf;
 unsigned char *end = buf + buflen;
@@ -457,6 +464,7 @@ static int pkcs7_get_signed_data(unsigned char *buf, size_t 
buflen,
 size_t len = 0;
 int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
 mbedtls_md_type_t md_alg;
+mbedtls_pkcs7_signed_data *signed_data = >signed_data;
 
 ret = mbedtls_asn1_get_tag(, end, , MBEDTLS_ASN1_CONSTRUCTED
| MBEDTLS_ASN1_SEQUENCE);

[PATCH v2 11/28] makefile: add mbedtls include directories

[Raymond Mao]

Add the mbedtls include directories into the build system.

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 Makefile | 13 +
 1 file changed, 13 insertions(+)

diff --git a/Makefile b/Makefile
index 7321fe1499e..80db1dfd8ec 100644
--- a/Makefile
+++ b/Makefile
@@ -829,6 +829,12 @@ KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g)
 UBOOTINCLUDE:= \
-Iinclude \
$(if $(KBUILD_SRC), -I$(srctree)/include) \
+   $(if $(KBUILD_SRC), \
+   $(if $(CONFIG_MBEDTLS_LIB), \
+   "-DMBEDTLS_CONFIG_FILE=\"mbedtls_def_config.h\"" \
+   -I$(srctree)/lib/mbedtls \
+   -I$(srctree)/lib/mbedtls/port \
+   -I$(srctree)/lib/mbedtls/external/mbedtls/include)) \
$(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
$(if $(CONFIG_CPU_V7M), \
@@ -840,6 +846,13 @@ UBOOTINCLUDE:= \
 
 NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
 
+ifeq ($(CONFIG_MBEDTLS_LIB),y)
+PLATFORM_CPPFLAGS += "-DMBEDTLS_CONFIG_FILE=\"mbedtls_def_config.h\"" \
+   -I$(srctree)/lib/mbedtls \
+   -I$(srctree)/lib/mbedtls/port \
+   -I$(srctree)/lib/mbedtls/external/mbedtls/include
+endif
+
 # FIX ME
 cpp_flags := $(KBUILD_CPPFLAGS) $(PLATFORM_CPPFLAGS) $(UBOOTINCLUDE) \
$(NOSTDINC_FLAGS)
-- 
2.25.1

[PATCH v2 10/28] hash: integrate hash on mbedtls

[Raymond Mao]

Integrate common/hash.c on the hash shim layer so that hash APIs
from mbedtls can be leveraged by boot/image and efi_loader.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Use the original head files instead of creating new ones.

 common/hash.c | 134 ++
 1 file changed, 134 insertions(+)

diff --git a/common/hash.c b/common/hash.c
index 3d6b84de473..6b8815da237 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -36,6 +36,132 @@
 #include 
 #include 
 
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO)
+
+static int hash_init_sha1(struct hash_algo *algo, void **ctxp)
+{
+   int ret;
+   mbedtls_sha1_context *ctx = malloc(sizeof(mbedtls_sha1_context));
+
+   mbedtls_sha1_init(ctx);
+   ret = mbedtls_sha1_starts(ctx);
+   if (!ret) {
+   *ctxp = ctx;
+   } else {
+   mbedtls_sha1_free(ctx);
+   free(ctx);
+   }
+
+   return ret;
+}
+
+static int hash_update_sha1(struct hash_algo *algo, void *ctx, const void *buf,
+   unsigned int size, int is_last)
+{
+   return mbedtls_sha1_update((mbedtls_sha1_context *)ctx, buf, size);
+}
+
+static int
+hash_finish_sha1(struct hash_algo *algo, void *ctx, void *dest_buf, int size)
+{
+   int ret;
+
+   if (size < algo->digest_size)
+   return -1;
+
+   ret = mbedtls_sha1_finish((mbedtls_sha1_context *)ctx, dest_buf);
+   if (!ret) {
+   mbedtls_sha1_free((mbedtls_sha1_context *)ctx);
+   free(ctx);
+   }
+
+   return ret;
+}
+
+static int hash_init_sha256(struct hash_algo *algo, void **ctxp)
+{
+   int ret;
+   int is224 = algo->digest_size == SHA224_SUM_LEN ? 1 : 0;
+   mbedtls_sha256_context *ctx = malloc(sizeof(mbedtls_sha256_context));
+
+   mbedtls_sha256_init(ctx);
+   ret = mbedtls_sha256_starts(ctx, is224);
+   if (!ret) {
+   *ctxp = ctx;
+   } else {
+   mbedtls_sha256_free(ctx);
+   free(ctx);
+   }
+
+   return ret;
+}
+
+static int hash_update_sha256(struct hash_algo *algo, void *ctx, const void 
*buf,
+ uint size, int is_last)
+{
+   return mbedtls_sha256_update((mbedtls_sha256_context *)ctx, buf, size);
+}
+
+static int
+hash_finish_sha256(struct hash_algo *algo, void *ctx, void *dest_buf, int size)
+{
+   int ret;
+
+   if (size < algo->digest_size)
+   return -1;
+
+   ret = mbedtls_sha256_finish((mbedtls_sha256_context *)ctx, dest_buf);
+   if (!ret) {
+   mbedtls_sha256_free((mbedtls_sha256_context *)ctx);
+   free(ctx);
+   }
+
+   return ret;
+}
+
+static int hash_init_sha512(struct hash_algo *algo, void **ctxp)
+{
+   int ret;
+   int is384 = algo->digest_size == SHA384_SUM_LEN ? 1 : 0;
+   mbedtls_sha512_context *ctx = malloc(sizeof(mbedtls_sha512_context));
+
+   mbedtls_sha512_init(ctx);
+   ret = mbedtls_sha512_starts(ctx, is384);
+   if (!ret) {
+   *ctxp = ctx;
+   } else {
+   mbedtls_sha512_free(ctx);
+   free(ctx);
+   }
+
+   return ret;
+}
+
+static int hash_update_sha512(struct hash_algo *algo, void *ctx, const void 
*buf,
+ uint size, int is_last)
+{
+   return mbedtls_sha512_update((mbedtls_sha512_context *)ctx, buf, size);
+}
+
+static int
+hash_finish_sha512(struct hash_algo *algo, void *ctx, void *dest_buf, int size)
+{
+   int ret;
+
+   if (size < algo->digest_size)
+   return -1;
+
+   ret = mbedtls_sha512_finish((mbedtls_sha512_context *)ctx, dest_buf);
+   if (!ret) {
+   mbedtls_sha512_free((mbedtls_sha512_context *)ctx);
+   free(ctx);
+   }
+
+   return ret;
+}
+
+#else /* CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) */
+
 static int __maybe_unused hash_init_sha1(struct hash_algo *algo, void **ctxp)
 {
sha1_context *ctx = malloc(sizeof(sha1_context));
@@ -144,6 +270,8 @@ static int __maybe_unused hash_finish_sha512(struct 
hash_algo *algo, void *ctx,
return 0;
 }
 
+#endif /* CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) */
+
 static int hash_init_crc16_ccitt(struct hash_algo *algo, void **ctxp)
 {
uint16_t *ctx = malloc(sizeof(uint16_t));
@@ -268,10 +396,16 @@ static struct hash_algo hash_algo[] = {
.hash_init  = hw_sha_init,
.hash_update= hw_sha_update,
.hash_finish= hw_sha_finish,
+#else
+#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO)
+   .hash_init  = hash_init_sha512,
+   .hash_update= hash_update_sha512,
+   .hash_finish= hash_finish_sha512,
 #else
.hash_init  = hash_init_sha384,
.hash_update= hash_update_sha384,
.hash_finish= hash_finish_sha384,
+#endif
 #endif
},
 #endif
-- 
2.25.1

[PATCH v2 09/28] mbedtls: add digest shim layer for MbedTLS

[Raymond Mao]

Implement digest shim layer on top of MbedTLS crypto library.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Split the shim layer into separated files and use the original head
  files instead of creating new ones.

 lib/mbedtls/Makefile |   7 +++
 lib/mbedtls/md5.c|  68 ++
 lib/mbedtls/sha1.c   | 111 +++
 lib/mbedtls/sha256.c |  65 +
 lib/mbedtls/sha512.c |  96 +
 5 files changed, 347 insertions(+)
 create mode 100644 lib/mbedtls/md5.c
 create mode 100644 lib/mbedtls/sha1.c
 create mode 100644 lib/mbedtls/sha256.c
 create mode 100644 lib/mbedtls/sha512.c

diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile
index 85f0a3cfd07..b8eda9638f4 100644
--- a/lib/mbedtls/Makefile
+++ b/lib/mbedtls/Makefile
@@ -14,6 +14,13 @@ ccflags-y += \
-I$(src)/external/mbedtls/library \
# This line is intentionally left blank
 
+# shim layer for hash
+obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += hash_mbedtls.o
+hash_mbedtls-$(CONFIG_$(SPL_)MD5) += md5.o
+hash_mbedtls-$(CONFIG_$(SPL_)SHA1) += sha1.o
+hash_mbedtls-$(CONFIG_$(SPL_)SHA256) += sha256.o
+hash_mbedtls-$(CONFIG_$(SPL_)SHA512) += sha512.o
+
 obj-$(CONFIG_MBEDTLS_LIB_CRYPTO) += mbedtls_lib_crypto.o
 mbedtls_lib_crypto-y := \
$(MBEDTLS_LIB_DIR)/aes.o \
diff --git a/lib/mbedtls/md5.c b/lib/mbedtls/md5.c
new file mode 100644
index 000..2488d4f5603
--- /dev/null
+++ b/lib/mbedtls/md5.c
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Hash shim layer on MbedTLS Crypto library
+ *
+ * Copyright (c) 2023 Linaro Limited
+ * Author: Raymond Mao 
+ */
+#include "compiler.h"
+
+#ifndef USE_HOSTCC
+#include 
+#endif /* USE_HOSTCC */
+#include 
+
+void MD5Init(MD5Context *ctx)
+{
+   mbedtls_md5_init(ctx);
+   mbedtls_md5_starts(ctx);
+}
+
+void MD5Update(MD5Context *ctx, unsigned char const *buf, unsigned int len)
+{
+   mbedtls_md5_update(ctx, buf, len);
+}
+
+void MD5Final(unsigned char digest[16], MD5Context *ctx)
+{
+   mbedtls_md5_finish(ctx, digest);
+   mbedtls_md5_free(ctx);
+}
+
+void md5(unsigned char *input, int len, unsigned char output[16])
+{
+   MD5Context context;
+
+   MD5Init();
+   MD5Update(, input, len);
+   MD5Final(output, );
+}
+
+void md5_wd(const unsigned char *input, unsigned int len,
+   unsigned char output[16], unsigned int chunk_sz)
+{
+   MD5Context context;
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+   const unsigned char *end, *curr;
+   int chunk;
+#endif
+
+   MD5Init();
+
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+   curr = input;
+   end = input + len;
+   while (curr < end) {
+   chunk = end - curr;
+   if (chunk > chunk_sz)
+   chunk = chunk_sz;
+   MD5Update(, curr, chunk);
+   curr += chunk;
+   schedule();
+   }
+#else
+   MD5Update(, input, len);
+#endif
+
+   MD5Final(output, );
+}
diff --git a/lib/mbedtls/sha1.c b/lib/mbedtls/sha1.c
new file mode 100644
index 000..84a13f5c63b
--- /dev/null
+++ b/lib/mbedtls/sha1.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Hash shim layer on MbedTLS Crypto library
+ *
+ * Copyright (c) 2023 Linaro Limited
+ * Author: Raymond Mao 
+ */
+#ifndef USE_HOSTCC
+#include 
+#endif /* USE_HOSTCC */
+#include 
+#include 
+
+const u8 sha1_der_prefix[SHA1_DER_LEN] = {
+   0x30, 0x21, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e,
+   0x03, 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14
+};
+
+void sha1_starts(sha1_context *ctx)
+{
+   mbedtls_sha1_init(ctx);
+   mbedtls_sha1_starts(ctx);
+}
+
+void sha1_update(sha1_context *ctx, const unsigned char *input,
+unsigned int length)
+{
+   mbedtls_sha1_update(ctx, input, length);
+}
+
+void sha1_finish(sha1_context *ctx, unsigned char output[SHA1_SUM_LEN])
+{
+   mbedtls_sha1_finish(ctx, output);
+   mbedtls_sha1_free(ctx);
+}
+
+void sha1_csum(const unsigned char *input, unsigned int ilen,
+  unsigned char *output)
+{
+   sha1_context ctx;
+
+   sha1_starts();
+   sha1_update(, input, ilen);
+   sha1_finish(, output);
+}
+
+void sha1_csum_wd(const unsigned char *input, unsigned int ilen,
+ unsigned char *output, unsigned int chunk_sz)
+{
+   sha1_context ctx;
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+   const unsigned char *end, *curr;
+   int chunk;
+#endif
+
+   sha1_starts();
+
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+   curr = input;
+   end = input + ilen;
+   while (curr < end) {
+   chunk = end - curr;
+   if (chunk > chunk_sz)
+   chunk = chunk_sz;
+   sha1_update(, curr, chunk);
+   curr += chunk;
+   schedule();
+   }
+#else
+   sha1_update(, 

[PATCH v2 08/28] md5: Adapt to the changes of md5 header

[Raymond Mao]

The md5 header is updated to adapt to both original lib and MbedTLS.
Now we need to change the API callers accordingly.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 drivers/crypto/hash/hash_sw.c |  8 
 lib/md5.c | 10 +-
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c
index d8065d68ea4..a5033677930 100644
--- a/drivers/crypto/hash/hash_sw.c
+++ b/drivers/crypto/hash/hash_sw.c
@@ -51,17 +51,17 @@ static void hash_finish_crc32(void *ctx, void *obuf)
 /* MD5 */
 static void hash_init_md5(void *ctx)
 {
-   MD5Init((struct MD5Context *)ctx);
+   MD5Init((MD5Context *)ctx);
 }
 
 static void hash_update_md5(void *ctx, const void *ibuf, uint32_t ilen)
 {
-   MD5Update((struct MD5Context *)ctx, ibuf, ilen);
+   MD5Update((MD5Context *)ctx, ibuf, ilen);
 }
 
 static void hash_finish_md5(void *ctx, void *obuf)
 {
-   MD5Final(obuf, (struct MD5Context *)ctx);
+   MD5Final(obuf, (MD5Context *)ctx);
 }
 
 /* SHA1 */
@@ -159,7 +159,7 @@ static struct sw_hash_impl sw_hash_impl[HASH_ALGO_NUM] = {
.init = hash_init_md5,
.update = hash_update_md5,
.finish = hash_finish_md5,
-   .ctx_alloc_sz = sizeof(struct MD5Context),
+   .ctx_alloc_sz = sizeof(MD5Context),
},
 
[HASH_ALGO_SHA1] = {
diff --git a/lib/md5.c b/lib/md5.c
index faf3f78ab1e..34343cf8e23 100644
--- a/lib/md5.c
+++ b/lib/md5.c
@@ -55,7 +55,7 @@ byteReverse(unsigned char *buf, unsigned longs)
  * initialization constants.
  */
 void
-MD5Init(struct MD5Context *ctx)
+MD5Init(MD5Context *ctx)
 {
ctx->buf[0] = 0x67452301;
ctx->buf[1] = 0xefcdab89;
@@ -71,7 +71,7 @@ MD5Init(struct MD5Context *ctx)
  * of bytes.
  */
 void
-MD5Update(struct MD5Context *ctx, unsigned char const *buf, unsigned len)
+MD5Update(MD5Context *ctx, unsigned char const *buf, unsigned int len)
 {
register __u32 t;
 
@@ -120,7 +120,7 @@ MD5Update(struct MD5Context *ctx, unsigned char const *buf, 
unsigned len)
  * 1 0* (64-bit count of bits processed, MSB-first)
  */
 void
-MD5Final(unsigned char digest[16], struct MD5Context *ctx)
+MD5Final(unsigned char digest[16], MD5Context *ctx)
 {
unsigned int count;
unsigned char *p;
@@ -269,7 +269,7 @@ MD5Transform(__u32 buf[4], __u32 const in[16])
 void
 md5 (unsigned char *input, int len, unsigned char output[16])
 {
-   struct MD5Context context;
+   MD5Context context;
 
MD5Init();
MD5Update(, input, len);
@@ -286,7 +286,7 @@ void
 md5_wd(const unsigned char *input, unsigned int len, unsigned char output[16],
unsigned int chunk_sz)
 {
-   struct MD5Context context;
+   MD5Context context;
 #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
const unsigned char *end, *curr;
int chunk;
-- 
2.25.1

[PATCH v2 07/28] lib: Adapt digest header files to MbedTLS

[Raymond Mao]

Adapt digest header files to support both original libs and MbedTLS
by switching on/off MBEDTLS_LIB_CRYPTO

FIXME:
`IS_ENABLED` or `CONFIG_IS_ENABLED` is not applicable here, since
including  causes undefined reference on schedule()
with sandbox build.
As  includes  which enables
`CONFIG_HW_WATCHDOG` and `CONFIG_WATCHDOG` but no schedule() are
defined in sandbox build.
`#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)` is a workaround.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 include/u-boot/md5.h| 17 -
 include/u-boot/sha1.h   | 21 -
 include/u-boot/sha256.h | 20 
 include/u-boot/sha512.h | 22 +++---
 lib/Makefile|  6 +-
 5 files changed, 76 insertions(+), 10 deletions(-)

diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h
index d61364c0ae3..3cfd33a8e56 100644
--- a/include/u-boot/md5.h
+++ b/include/u-boot/md5.h
@@ -6,22 +6,29 @@
 #ifndef _MD5_H
 #define _MD5_H
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+#include 
+#endif
 #include "compiler.h"
 
 #define MD5_SUM_LEN16
 
-struct MD5Context {
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+typedef mbedtls_md5_context MD5Context;
+#else
+typedef struct MD5Context {
__u32 buf[4];
__u32 bits[2];
union {
unsigned char in[64];
__u32 in32[16];
};
-};
+} MD5Context;
+#endif
 
-void MD5Init(struct MD5Context *ctx);
-void MD5Update(struct MD5Context *ctx, unsigned char const *buf, unsigned len);
-void MD5Final(unsigned char digest[16], struct MD5Context *ctx);
+void MD5Init(MD5Context *ctx);
+void MD5Update(MD5Context *ctx, unsigned char const *buf, unsigned int len);
+void MD5Final(unsigned char digest[16], MD5Context *ctx);
 
 /*
  * Calculate and store in 'output' the MD5 digest of 'len' bytes at
diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h
index 09fee594d26..ee46fe947a0 100644
--- a/include/u-boot/sha1.h
+++ b/include/u-boot/sha1.h
@@ -14,6 +14,21 @@
 #ifndef _SHA1_H
 #define _SHA1_H
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+/*
+ * FIXME:
+ * MbedTLS define the members of "mbedtls_sha256_context" as private,
+ * but "state" needs to be access by arch/arm/cpu/armv8/sha1_ce_glue.
+ * MBEDTLS_ALLOW_PRIVATE_ACCESS needs to be enabled to allow the external
+ * access.
+ * Directly including  is not allowed,
+ * since this will include  and break the sandbox test.
+ */
+#define MBEDTLS_ALLOW_PRIVATE_ACCESS
+
+#include 
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -24,6 +39,9 @@ extern "C" {
 
 extern const uint8_t sha1_der_prefix[];
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+typedef mbedtls_sha1_context sha1_context;
+#else
 /**
  * \brief SHA-1 context structure
  */
@@ -34,13 +52,14 @@ typedef struct
 unsigned char buffer[64];  /*!< data block being processed */
 }
 sha1_context;
+#endif
 
 /**
  * \brief SHA-1 context setup
  *
  * \param ctx SHA-1 context to be initialized
  */
-void sha1_starts( sha1_context *ctx );
+void sha1_starts(sha1_context *ctx);
 
 /**
  * \brief SHA-1 process buffer
diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h
index 9aa1251789a..e2b7fdd41c8 100644
--- a/include/u-boot/sha256.h
+++ b/include/u-boot/sha256.h
@@ -1,6 +1,22 @@
 #ifndef _SHA256_H
 #define _SHA256_H
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+/*
+ * FIXME:
+ * MbedTLS define the members of "mbedtls_sha256_context" as private,
+ * but "state" needs to be access by arch/arm/cpu/armv8/sha256_ce_glue.
+ * MBEDTLS_ALLOW_PRIVATE_ACCESS needs to be enabled to allow the external
+ * access.
+ * Directly including  is not allowed,
+ * since this will include  and break the sandbox test.
+ */
+#define MBEDTLS_ALLOW_PRIVATE_ACCESS
+
+#include 
+#endif
+
+#define SHA224_SUM_LEN 28
 #define SHA256_SUM_LEN 32
 #define SHA256_DER_LEN 19
 
@@ -9,11 +25,15 @@ extern const uint8_t sha256_der_prefix[];
 /* Reset watchdog each time we process this many bytes */
 #define CHUNKSZ_SHA256 (64 * 1024)
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+typedef mbedtls_sha256_context sha256_context;
+#else
 typedef struct {
uint32_t total[2];
uint32_t state[8];
uint8_t buffer[64];
 } sha256_context;
+#endif
 
 void sha256_starts(sha256_context * ctx);
 void sha256_update(sha256_context *ctx, const uint8_t *input, uint32_t length);
diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h
index 516729d7750..a0c0de89d60 100644
--- a/include/u-boot/sha512.h
+++ b/include/u-boot/sha512.h
@@ -1,6 +1,10 @@
 #ifndef _SHA512_H
 #define _SHA512_H
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+#include 
+#endif
+
 #define SHA384_SUM_LEN  48
 #define SHA384_DER_LEN  19
 #define SHA512_SUM_LEN  64
@@ -10,11 +14,16 @@
 #define CHUNKSZ_SHA384 (16 * 1024)
 #define CHUNKSZ_SHA512 (16 * 1024)
 
+#if defined(CONFIG_MBEDTLS_LIB_CRYPTO)
+typedef mbedtls_sha512_context sha384_context;
+typedef mbedtls_sha512_context sha512_context;
+#else
 

[PATCH v2 06/28] efi_loader: remove redundant hash includes

[Raymond Mao]

Remove the redundant includes of u-boot/sha1.h, u-boot/sha256.h
and u-boot/sha512.h

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 lib/efi_loader/efi_signature.c | 1 -
 lib/efi_loader/efi_tcg2.c  | 3 ---
 2 files changed, 4 deletions(-)

diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index f338e732759..184eac8cddb 100644
--- a/lib/efi_loader/efi_signature.c
+++ b/lib/efi_loader/efi_signature.c
@@ -17,7 +17,6 @@
 #include 
 #include 
 #include 
-#include 
 
 const efi_guid_t efi_guid_sha256 = EFI_CERT_SHA256_GUID;
 const efi_guid_t efi_guid_cert_rsa2048 = EFI_CERT_RSA2048_GUID;
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index b07e0099c27..ac056dcfc55 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -19,9 +19,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
 #include 
 #include 
 #include 
-- 
2.25.1

[PATCH v2 05/28] image: remove redundant hash includes

[Raymond Mao]

Remove the redundant includes of u-boot/md5.h, u-boot/sha1.h,
u-boot/sha256.h and u-boot/sha512.h

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 boot/image-fit.c | 4 
 boot/image.c | 2 --
 2 files changed, 6 deletions(-)

diff --git a/boot/image-fit.c b/boot/image-fit.c
index 89e377563ce..1efc39f4408 100644
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -38,10 +38,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
 
 /*/
 /* New uImage format routines */
diff --git a/boot/image.c b/boot/image.c
index 073931cd7a3..e57d6eae52d 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -26,8 +26,6 @@
 #endif
 
 #include 
-#include 
-#include 
 #include 
 #include 
 
-- 
2.25.1

[PATCH v2 04/28] arm: EFI linker script text section alignment

[Raymond Mao]

Add text section alignment to fix sbsign signing warning
'gaps in the section table may result in different checksums'
which causes a failure of efi_image_verify_diges()

Signed-off-by: Raymond Mao 
---
Changes in v2
- None.

 arch/arm/lib/elf_aarch64_efi.lds | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/lib/elf_aarch64_efi.lds b/arch/arm/lib/elf_aarch64_efi.lds
index 5dd98091698..bffd9a0447a 100644
--- a/arch/arm/lib/elf_aarch64_efi.lds
+++ b/arch/arm/lib/elf_aarch64_efi.lds
@@ -28,6 +28,7 @@ SECTIONS
*(.dynamic);
. = ALIGN(512);
}
+   . = ALIGN(4096);
.rela.dyn : { *(.rela.dyn) }
.rela.plt : { *(.rela.plt) }
.rela.got : { *(.rela.got) }
-- 
2.25.1

[PATCH v2 02/28] mbedtls: Add script to update MbedTLS subtree

[Raymond Mao]

lib/mbedtls/update-mbedtls-subtree.sh is a wrapper of git subtree
commands.
Usage from U-Boot top directory, run:

$ ./lib/mbedtls/update-mbedtls-subtree.sh pull 
$ ./lib/mbedtls/update-mbedtls-subtree.sh pick 

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 lib/mbedtls/update-mbedtls-subtree.sh | 50 +++
 1 file changed, 50 insertions(+)
 create mode 100755 lib/mbedtls/update-mbedtls-subtree.sh

diff --git a/lib/mbedtls/update-mbedtls-subtree.sh 
b/lib/mbedtls/update-mbedtls-subtree.sh
new file mode 100755
index 000..f208e54a5af
--- /dev/null
+++ b/lib/mbedtls/update-mbedtls-subtree.sh
@@ -0,0 +1,50 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2024 Linaro Ltd.
+#
+# Usage: from the top level U-Boot source tree, run:
+# $ ./lib/mbedtls/update-mbedtls-subtree.sh pull 
+# $ ./lib/mbedtls/update-mbedtls-subtree.sh pick 
+#
+# The script will pull changes from MbedTLS repo into U-Boot
+# as a subtree located as /lib/mbedtls/external/mbedtls sub-directory.
+# It will automatically create a squash/merge commit listing the commits
+# imported.
+
+set -e
+
+merge_commit_msg=$(cat << EOF
+Subtree merge tag '$2' of MbedTLS repo [1] into lib/mbedtls/external/mbedtls
+
+[1] https://github.com/Mbed-TLS/mbedtls.git
+EOF
+)
+
+remote_add_and_fetch() {
+if ! git remote get-url mbedtls_upstream 2>/dev/null
+then
+echo "Warning: Script automatically adds new git remote via:"
+echo "git remote add mbedtls_upstream \\"
+echo "https://github.com/Mbed-TLS/mbedtls.git;
+git remote add mbedtls_upstream \
+https://github.com/Mbed-TLS/mbedtls.git
+fi
+git fetch mbedtls_upstream master
+}
+
+if [ "$1" = "pull" ]
+then
+remote_add_and_fetch
+git subtree pull --prefix lib/mbedtls/external/mbedtls mbedtls_upstream \
+"$2" --squash -m "${merge_commit_msg}"
+elif [ "$1" = "pick" ]
+then
+remote_add_and_fetch
+git cherry-pick -x --strategy=subtree \
+-Xsubtree=lib/mbedtls/external/mbedtls/ "$2"
+else
+echo "usage: $0  "
+echo "   pull or pick"
+echo "  release tag [pull] or commit id [pick]"
+fi
-- 
2.25.1

[PATCH v2 01/28] CI: Exclude MbedTLS subtree for CONFIG checks

[Raymond Mao]

Since MbedTLS is an external repo with its own coding style,
exclude it from Azure and gitlab CI CONFIG checks.

Signed-off-by: Raymond Mao 
---
Changes in v2
- Initial patch.

 .azure-pipelines.yml | 3 ++-
 .gitlab-ci.yml   | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 27f69583c65..c8052771fa8 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -65,7 +65,8 @@ stages:
   # have no matches.
   - script: git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_'
   :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
-  :^include/linux/kconfig.h :^tools/ :^dts/upstream/ &&
+  :^include/linux/kconfig.h :^tools/ :^dts/upstream/
+  :^lib/mbedtls/external :^lib/mbedtls/mbedtls_def_config.h &&
   exit 1 || exit 0
 
   - job: docs
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 165f765a833..a8f7f1940f3 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -156,7 +156,8 @@ check for new CONFIG symbols outside Kconfig:
 # have no matches.
 - git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_'
 :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
-:^include/linux/kconfig.h :^tools/ :^dts/upstream/ &&
+:^include/linux/kconfig.h :^tools/ :^dts/upstream/
+:^lib/mbedtls/external :^lib/mbedtls/mbedtls_def_config.h &&
 exit 1 || exit 0
 
 # build documentation
-- 
2.25.1

[PATCH v2 00/28] [RFC] Integrate MbedTLS v3.6 LTS with U-Boot

[Raymond Mao]

Integrate MbedTLS v3.6 LTS (currently v3.6.0-RC1) with U-Boot.

Motivations:

1. MbedTLS is well maintained with LTS versions.
2. LWIP is integrated with MbedTLS and easily to enable HTTPS.
3. MbedTLS recently switched license back to GPLv2.

Prerequisite:
-
This patch series requires mbedtls git repo to be added as a
subtree to the main U-Boot repo via:
$ git subtree add --prefix lib/mbedtls/external/mbedtls \
  https://github.com/Mbed-TLS/mbedtls.git \
  v3.6.0 --squash
Moreover, due to the Windows-style files from mbedtls git repo,
we need to convert the CRLF endings to LF and do a commit manually:
$ git add --renormalize .
$ git commit

New Kconfig options:

`MBEDTLS_LIB` is for MbedTLS general switch.
`MBEDTLS_LIB_CRYPTO` is for replacing original digest and crypto libs with
MbedTLS.
`MBEDTLS_LIB_X509` is for replacing original X509, PKCS7, MSCode, ASN1,
and Pubkey parser with MbedTLS.
`MBEDTLS_LIB_TLS` is for SSL/TLS (Disabled until LWIP port for MbedTLS is
ready)
In this patch set, MBEDTLS_LIB, MBEDTLS_LIB_CRYPTO and MBEDTLS_LIB_X509
are by default enabled in qemu_arm64_defconfig for testing purpose.

Patches for external MbedTLS project:
-
Since U-Boot uses Microsoft Authentication Code to verify PE/COFFs
executables which is not supported by MbedTLS at the moment,
addtional patches for MbedTLS are created to adapt with the EFI loader: 
1. Decoding of Microsoft Authentication Code.
2. Decoding of PKCS#9 Authenticate Attributes.
3. Extending MbedTLS PKCS#7 lib to support multiple signer's certificates.
4. MbedTLS native test suites for PKCS#7 signer's info.
All above 4 patches (tagged with `mbedtls/external`) are submitted to
MbedTLS project and being reviewed, eventually they should be part of
MbedTLS release.
See below PR for the reference:
https://github.com/Mbed-TLS/mbedtls/pull/9001

Miscellaneous:
--
Minor fixes for arm EFI linker script for testing EFI secure boot.

Optimized MbedTLS library size by tailoring the config file.
After disabling all unnecessary features for EFI loader, enabling MbedTLS
increases U-Boot size by 6.03% (V1).
For V2, this figure drops to about 4.66% by completely replacing
original libs (rsa, asn1_decoder, rsa_helper, md5, sha1, sha256, sha512)
with MbedTLS when related Kconfig options are enabled.
Please see the output of bloat-o-meter for the reference of the size-growth
on QEMU arm64 target [1].

Tests done:
---
EFI Secure Boot test (EFI variables loading and verifying, EFI signed image
verifying and booting) via U-Boot console.
EFI Secure Boot and Capsule sandbox test passed.

Known issues:
-
None.

[1]: bloat-o-meter output between disabling/enabling MbedTLS (QEMU arm64)
```
add/remove: 212/81 grow/shrink: 20/17 up/down: 56376/-17495 (38881)
Function old new   delta
mbedtls_internal_sha1_process  -4540   +4540
mbedtls_x509_crt_parse_der_internal-3072   +3072
mbedtls_internal_md5_process   -2928   +2928
mbedtls_internal_sha256_process-2052   +2052
mbedtls_pkcs7_parse_der-1608   +1608
mbedtls_rsa_private-1468   +1468
pkcs7_parse_message  3721648   +1276
mbedtls_mpi_div_mpi-1168   +1168
mbedtls_internal_sha512_process-1056   +1056
mbedtls_mpi_inv_mod-1000   +1000
mbedtls_x509_dn_gets   - 996+996
x509_populate_cert - 948+948
K  - 896+896
oid_x520_attr_type - 840+840
__udivti3  - 832+832
mbedtls_x509_parse_subject_alt_name- 724+724
mbedtls_rsa_deduce_primes  - 720+720
mbedtls_mpi_exp_mod- 668+668
mbedtls_rsa_rsaes_pkcs1_v15_decrypt- 652+652
pkcs7_get_signer_info  - 632+632
mbedtls_rsa_complete   - 624+624
mbedtls_rsa_validate_params- 608+608
mbedtls_mpi_core_exp_mod   - 560+560
mbedtls_sha512_finish  - 556+556
mscode_parse  28 580+552
mbedtls_x509_get_time  - 552+552
mbedtls_x509_get_name  - 516+516
mbedtls_sha256_finish  - 484+484
mbedtls_rsa_validate_crt   - 464+464
mbedtls_mpi_core_mla   - 460+460
rsa_rsassa_pkcs1_v15_encode- 420+420
mbedtls_sha1_finish 

Re: [PATCH] kconfig: default to zero if int/hex symbol lacks default property

[Tom Rini]

On Tue, May 07, 2024 at 09:17:46AM +0200, Yoann Congal wrote:
> Le 06/05/2024 à 19:43, Tom Rini a écrit :
> > On Sun, May 05, 2024 at 03:53:53PM +0200, Yoann Congal wrote:
> > 
> >> From: Masahiro Yamada 
> >>
> >> This is a cherry-pick from the kernel commit:
> >> 6262afa10ef7c (kconfig: default to zero if int/hex symbol lacks default 
> >> property, 2023-11-26)
> >>
> >> When a default property is missing in an int or hex symbol, it defaults
> >> to an empty string, which is not a valid symbol value.
> >>
> >> It results in an incorrect .config, and can also lead to an infinite
> >> loop in scripting.
> >>
> >> Use "0" for int and "0x0" for hex as a default value.
> >>
> >> Signed-off-by: Masahiro Yamada 
> >> Reviewed-by: Yoann Congal 
> >>
> >> Signed-off-by: Yoann Congal 
> >> ---
> >> Added context that was not in the upstream commit:
> >> The infinite loop case happens with a configuration defined like this
> >> (a hex config without a valid default value):
> >>   config HEX_TEST
> >>hex "Hex config without default"
> >>
> >> And using:
> >>   $ make oldconfig < /dev/null
> >>   scripts/kconfig/conf  --oldconfig Kconfig
> >>   *
> >>   * General setup
> >>   *
> >>
> >>   Error in reading or end of file.
> >>
> >>   Error in reading or end of file.
> >>   Hex config without default (HEX_TEST) [] (NEW)
> >>
> >>   Error in reading or end of file.
> >>   Hex config without default (HEX_TEST) [] (NEW)
> >>   # This loops forever
> >>
> >> NB: Scripted config manipulation often call make with /dev/null as
> >> stdin (Yocto recipe, CI build, ...)
> >>
> >> This was discovered when working on Yocto bug:
> >> https://bugzilla.yoctoproject.org/show_bug.cgi?id=14136
> 
> Hi Tom,
> 
> > I'm surprised this was accepted. In the past I've wanted to avoid this
> > kind of change in Kconfig because while the empty string can be easily
> > be checked in the code as "user didn't really configure this, do
> > nothing" a value of zero is a valid option in these cases and so then in
> > the code we need a bool symbol to decide if the hex/int symbol is set or
> > not.
> 
> For context (and what it's worth), before this patch was merged, I've tried 
> to fix this problem with a patch of my own which only exited the config 
> process when the infinite loop would start:
> "[PATCH v4] kconfig: avoid an infinite loop in oldconfig/syncconfig" [0]
> ... the v5 version was a bit more severe and exited as soon as an error was 
> hit, it was then removed from -next because it triggered a build failure [1].
> 
> > Today this is less of an issue than it used to be in U-Boot with
> > everything CONFIG-related migrated to Kconfig and so there's no longer
> > the question of if we missed migrating a file that defined the value but
> > there's still places we have in the code where hex symbol is undefined
> > is not the same thing as hex symbol is 0x0.
> > 
> > Is there a specific use case you have for this in U-Boot? It's been a
> > while, but it's also been cases of newly introduced symbols in Kconfig
> > files with incorrect dependencies, where the infinite loop in kconfig
> > happened, CI failed and we caught the problem.
> 
> For a specific example, one can trigger this with CMD_PSTORE_MEM_ADDR like 
> this (tested on today's master):
>   make qemu_arm64_defconfig
>   make menuconfig
># activate CONFIG_CMD_PSTORE=y but forget to fill CMD_PSTORE_MEM_ADDR
>   make < /dev/null # This emulates a Yocto/scripted/CI build and loops 
> infinitely
> 
> But, my more general use case is the Yocto dev trying to change the U-Boot 
> (or any kconfig based software) config and accidentally trigger this.
> In Yocto, what they will see is a do_configure task taking a very long time 
> but they won't see the looping logs the detect the problem (This is caught 
> later by filing the RAM and the build process is killed by OOM, or the disk 
> run out of space filed multi-GB log files).
> 
> I'm sadly aware that defining a default value for this kind of config (fixed 
> addresses) is not really sensible but the build time infinite loop is not 
> good either.

Exactly, but to me it's worse to cover up the build issue and introduce
a runtime issue instead. Something builds but then crashes at run time
is worse to me than builds fail / get stuck. Using your example,
CMD_PSTORE_MEM_ADDR depends on CMD_PSTORE and so if someone enables
CMD_PSTORE in a config fragment but doesn't define the address, the
build should not complete. Using 0x0 means that oops, now it fails to
work and might not be obvious why either.

I won't revert this change when in the future we're able to sync up with
the kernel again, but I'm not eager to bring this in by itself as it
feels like the wrong way to deal with the problem. Thanks for explaining
the history here.

-- 
Tom


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Description: PGP signature

Re: Pull request: u-boot-rockchip-20240507

[Tom Rini]

On Tue, May 07, 2024 at 04:51:39PM +0800, Kever Yang wrote:

> Hi Tom,
> 
> Please pull the updates for rockchip platform, this PR is mainly for:
> - migrate to use OF_UPSTREAM for rv1108, rk3308, rk3328, rk356x, rk3588;
> 
> CI:
> https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/20628
> 
> Thanks,
> - Kever
> 
> The following changes since commit 52835266d3e933656a217233eaf672dd9ccd7352:
> 
>   Prepare v2024.07-rc2 (2024-05-06 13:54:17 -0600)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-rockchip.git 
> tags/u-boot-rockchip-20240507
> 
> for you to fetch changes up to bc7cb4b67a4070129bbfc5bffb2f5e9fd206991e:
> 
>   configs: rk3588-turing-rk1: disable SPI flash by default (2024-05-07 
> 15:56:10 +0800)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 5/5] board: phytec: am62x: Add support for 1 & 4 GB RAM variants

[Daniel Schultz]

Hey Wadim,

On 07.05.24 17:17, Wadim Egorov wrote:

Use content of EEPROM to detect the actual RAM size and adjust
DDR timings, size and banks accordingly.
Also enable the SoM detection per default in the defconfigs.

Signed-off-by: Wadim Egorov 
---
  board/phytec/common/am6_som_detection.h   |   8 +
  board/phytec/phycore_am62x/phycore-am62x.c| 152 -
  board/phytec/phycore_am62x/phycore-ddr-data.h | 206 ++
  configs/phycore_am62x_a53_defconfig   |   4 +
  configs/phycore_am62x_r5_defconfig|   4 +
  5 files changed, 372 insertions(+), 2 deletions(-)
  create mode 100644 board/phytec/phycore_am62x/phycore-ddr-data.h

diff --git a/board/phytec/common/am6_som_detection.h 
b/board/phytec/common/am6_som_detection.h
index 032f9da3aab..c5c6e179da6 100644
--- a/board/phytec/common/am6_som_detection.h
+++ b/board/phytec/common/am6_som_detection.h
@@ -9,11 +9,19 @@
  
  #include "phytec_som_detection.h"
  
+#define EEPROM_ADDR0x50

  #define PHYTEC_AM62X_SOM  71
  #define PHYTEC_AM64X_SOM  72
  #define PHYTEC_EEPROM_VALUE_X 0x21
  #define PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI 0xC
  
+enum {

+   EEPROM_RAM_SIZE_512MB = 0,
+   EEPROM_RAM_SIZE_1GB = 1,
+   EEPROM_RAM_SIZE_2GB = 2,
+   EEPROM_RAM_SIZE_4GB = 4
+};
+
  int __maybe_unused phytec_am6_detect(struct phytec_eeprom_data *data);
  u8 __maybe_unused phytec_get_am6_ddr_size(struct phytec_eeprom_data *data);
  u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data);
diff --git a/board/phytec/phycore_am62x/phycore-am62x.c 
b/board/phytec/phycore_am62x/phycore-am62x.c
index a082b886bda..4a76f1343d7 100644
--- a/board/phytec/phycore_am62x/phycore-am62x.c
+++ b/board/phytec/phycore_am62x/phycore-am62x.c
@@ -8,6 +8,13 @@
  #include 
  #include 
  
+#include "phycore-ddr-data.h"

+#include "../common/k3/k3_ddrss_patch.h"
+#include "../common/am6_som_detection.h"
+
+#define AM64_DDRSS_SS_BASE 0x0F30
+#define DDRSS_V2A_CTL_REG  0x0020
+
  DECLARE_GLOBAL_DATA_PTR;
  
  int board_init(void)

@@ -15,16 +22,157 @@ int board_init(void)
return 0;
  }
  
+static u8 phytec_get_am62_ddr_size_default(void)

+{
+   int ret;
+   struct phytec_eeprom_data data;
+
+   if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_FIX)) {
+   if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_1GB))
+   return EEPROM_RAM_SIZE_1GB;
+   else if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_2GB))
+   return EEPROM_RAM_SIZE_2GB;
+   else if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_4GB))
+   return EEPROM_RAM_SIZE_4GB;
+   }


Please define these configs in board/phytec/phycore_am62x/Kconfig.

- Daniel


+
+   ret = phytec_eeprom_data_setup(, 0, EEPROM_ADDR);
+   if (!ret && data.valid)
+   return phytec_get_am6_ddr_size();
+
+   /* Default DDR size is 2GB */
+   return EEPROM_RAM_SIZE_2GB;
+}
+
  int dram_init(void)
  {
-   return fdtdec_setup_mem_size_base();
+   u8 ram_size = phytec_get_am62_ddr_size_default();
+
+   /*
+* HACK: ddrss driver support 2GB RAM by default
+* V2A_CTL_REG should be updated to support other RAM size
+*/
+   if (IS_ENABLED(CONFIG_K3_AM64_DDRSS))
+   if (ram_size == EEPROM_RAM_SIZE_4GB)
+   writel(0x0210, AM64_DDRSS_SS_BASE + 
DDRSS_V2A_CTL_REG);
+
+   switch (ram_size) {
+   case EEPROM_RAM_SIZE_1GB:
+   gd->ram_size = 0x4000;
+   break;
+   case EEPROM_RAM_SIZE_2GB:
+   gd->ram_size = 0x8000;
+   break;
+   case EEPROM_RAM_SIZE_4GB:
+#ifdef CONFIG_PHYS_64BIT
+   gd->ram_size = 0x1;
+#else
+   gd->ram_size = 0x8000;
+#endif
+   break;
+   default:
+   gd->ram_size = 0x8000;
+   }
+
+   return 0;
+}
+
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+{
+#ifdef CONFIG_PHYS_64BIT
+   /* Limit RAM used by U-Boot to the DDR low region */
+   if (gd->ram_top > 0x1)
+   return 0x1;
+#endif
+   return gd->ram_top;
  }
  
  int dram_init_banksize(void)

  {
-   return fdtdec_setup_memory_banksize();
+   u8 ram_size;
+
+   ram_size = phytec_get_am62_ddr_size_default();
+   switch (ram_size) {
+   case EEPROM_RAM_SIZE_1GB:
+   gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+   gd->bd->bi_dram[0].size = 0x4000;
+   gd->ram_size = 0x4000;
+   break;
+
+   case EEPROM_RAM_SIZE_2GB:
+   gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+   gd->bd->bi_dram[0].size = 0x8000;
+   gd->ram_size = 0x8000;
+   break;
+
+   case EEPROM_RAM_SIZE_4GB:
+   /* Bank 0 declares the memory available 

Re: [PATCH v11 0/8] spi-nor: Add parallel and stacked memories support

[Tom Rini]

On Tue, May 07, 2024 at 04:15:14AM +, Abbarapu, Venkatesh wrote:

> + Tom Rini
> 
> Do you have any comments for this series?

Seems likely fine. Jagan, do you have time to put this in a PR for
-next? Thanks.

> 
> Thanks
> Venkatesh
> 
> > -Original Message-
> > From: Venkatesh Yadav Abbarapu 
> > Sent: Monday, March 4, 2024 8:41 AM
> > To: u-boot@lists.denx.de
> > Cc: Simek, Michal ; ja...@amarulasolutions.com;
> > git (AMD-Xilinx) 
> > Subject: [PATCH v11 0/8] spi-nor: Add parallel and stacked memories support
> > 
> > This series adds support for Xilinx qspi parallel and stacked memeories.
> > 
> > In parallel mode, the current implementation assumes that a maximum of
> > two flashes are connected. The QSPI controller splits the data evenly 
> > between
> > both the flashes so, both the flashes that are connected in parallel mode
> > should be identical.
> > During each operation SPI-NOR sets 0th bit for CS0 & 1st bit for CS1 in
> > nor->flags.
> > 
> > In stacked mode the current implementation assumes that a maximum of two
> > flashes are connected and both the flashes are of same make but can differ 
> > in
> > sizes. So, except the sizes all other flash parameters of both the flashes 
> > are
> > identical.
> > 
> > Spi-nor will pass on the appropriate flash select flag to low level driver, 
> > and it
> > will select pass all the data to that particular flash.
> > 
> > Write operation in parallel mode are performed in page size * 2 chunks as
> > each write operation results in writing both the flashes. For doubling the
> > address space each operation is performed at addr/2 flash offset, where addr
> > is the address specified by the user.
> > 
> > Similarly for read and erase operations it will read from both flashes, so 
> > size
> > and offset are divided by 2 and send to flash.
> > 
> > Changes in v2:
> > - Fixed the compilation issues.
> > Changes in v3:
> > - Fixed the CI issues.
> > Changes in v4:
> > - Removed the dio,dummy_bytes variables from zynq_qspi driver.
> > - Fix the compilation issue by including the DM_SPI config.
> > Changes in v5:
> > - Fixed the issue reported by buildman.
> > Changes in v6:
> > - Fixed the issues reported while running the sandbox test cases.
> > Changes in v7:
> > - Fixed the issues reported while running these da850evm_defconfig,
> >   imx28_xea_defconfig configs.
> > - Fixed the issue when DM_SPI config is disabled.
> > - Fixed the issue while running the sandbox_noinst_defconfig with spl
> >   ./spl/u-boot-spl -d arch/sandbox/dts/test.dtb
> >jedec_spi_nor spi.bin@0: has no valid 'reg' property (-12)
> >jedec_spi_nor spi.bin@1: has no valid 'reg' property (-12)
> >### ERROR ### Please RESET the board ### Changes in v8:
> > - Fixed the compilation issue with imx28_xea_defconfig.
> > - Fixed the SPL size issue with the axm and taurus defconfigs.
> > - Rebased the patches on top of next branch.
> > Changes in v9:
> > - Updated the commit log why SPL_FIT is being enabled.
> > Changes in v10:
> > - Added the new config SPI_ADVANCE to fix the issue while enabling
> > imx28_xea_defconfig.
> > Changes in v11:
> > - Removed the unused variable, corrected the type of variable and replaced
> > memcpy with memmove.
> > 
> > Ashok Reddy Soma (4):
> >   mtd: spi-nor: Add parallel and stacked memories support
> >   mtd: spi-nor: Add parallel memories support for read_sr and read_fsr
> >   mtd: spi-nor: Add parallel and stacked memories support in read_bar
> > and write_bar
> >   spi: spi-uclass: Read chipselect and restrict capabilities
> > 
> > Venkatesh Yadav Abbarapu (4):
> >   spi: zynqmp_gqspi: Add parallel memories support in GQSPI driver
> >   spi: zynq_qspi: Add parallel memories support in QSPI driver
> >   spi: Add the spi advance options for non SPL
> >   config: xea: Enable the SPI_ADVANCE config option
> > 
> >  configs/imx28_xea_defconfig|   1 +
> >  drivers/mtd/spi/sandbox.c  |   2 +-
> >  drivers/mtd/spi/spi-nor-core.c | 399 -
> >  drivers/spi/Kconfig|   7 +
> >  drivers/spi/altera_spi.c   |   4 +-
> >  drivers/spi/atcspi200_spi.c|   2 +-
> >  drivers/spi/ath79_spi.c|   2 +-
> >  drivers/spi/atmel_spi.c|   6 +-
> >  drivers/spi/bcm63xx_hsspi.c|  42 ++--
> >  drivers/spi/bcm63xx_spi.c  |   6 +-
> >  drivers/spi/bcmbca_hsspi.c |  34 +--
> >  drivers/spi/cf_spi.c   |   6 +-
> >  drivers/spi/davinci_spi.c  |   8 +-
> >  drivers/spi/fsl_dspi.c |  18 +-
> >  drivers/spi/fsl_espi.c |   4 +-
> >  drivers/spi/fsl_qspi.c |   4 +-
> >  drivers/spi/gxp_spi.c  |   2 +-
> >  drivers/spi/mpc8xx_spi.c   |   4 +-
> >  drivers/spi/mpc8xxx_spi.c  |  10 +-
> >  drivers/spi/mscc_bb_spi.c  |   4 +-
> >  drivers/spi/mxc_spi.c  |   6 +-
> >  drivers/spi/npcm_fiu_spi.c |  14 +-
> >  drivers/spi/nxp_fspi.c |   2 +-
> >  drivers/spi/octeon_spi.c   |   2 +-
> >  drivers/spi/omap3_spi.c

[PATCH 5/5] board: phytec: am62x: Add support for 1 & 4 GB RAM variants

[Wadim Egorov]

Use content of EEPROM to detect the actual RAM size and adjust
DDR timings, size and banks accordingly.
Also enable the SoM detection per default in the defconfigs.

Signed-off-by: Wadim Egorov 
---
 board/phytec/common/am6_som_detection.h   |   8 +
 board/phytec/phycore_am62x/phycore-am62x.c| 152 -
 board/phytec/phycore_am62x/phycore-ddr-data.h | 206 ++
 configs/phycore_am62x_a53_defconfig   |   4 +
 configs/phycore_am62x_r5_defconfig|   4 +
 5 files changed, 372 insertions(+), 2 deletions(-)
 create mode 100644 board/phytec/phycore_am62x/phycore-ddr-data.h

diff --git a/board/phytec/common/am6_som_detection.h 
b/board/phytec/common/am6_som_detection.h
index 032f9da3aab..c5c6e179da6 100644
--- a/board/phytec/common/am6_som_detection.h
+++ b/board/phytec/common/am6_som_detection.h
@@ -9,11 +9,19 @@
 
 #include "phytec_som_detection.h"
 
+#define EEPROM_ADDR0x50
 #define PHYTEC_AM62X_SOM   71
 #define PHYTEC_AM64X_SOM   72
 #define PHYTEC_EEPROM_VALUE_X  0x21
 #define PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI  0xC
 
+enum {
+   EEPROM_RAM_SIZE_512MB = 0,
+   EEPROM_RAM_SIZE_1GB = 1,
+   EEPROM_RAM_SIZE_2GB = 2,
+   EEPROM_RAM_SIZE_4GB = 4
+};
+
 int __maybe_unused phytec_am6_detect(struct phytec_eeprom_data *data);
 u8 __maybe_unused phytec_get_am6_ddr_size(struct phytec_eeprom_data *data);
 u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data);
diff --git a/board/phytec/phycore_am62x/phycore-am62x.c 
b/board/phytec/phycore_am62x/phycore-am62x.c
index a082b886bda..4a76f1343d7 100644
--- a/board/phytec/phycore_am62x/phycore-am62x.c
+++ b/board/phytec/phycore_am62x/phycore-am62x.c
@@ -8,6 +8,13 @@
 #include 
 #include 
 
+#include "phycore-ddr-data.h"
+#include "../common/k3/k3_ddrss_patch.h"
+#include "../common/am6_som_detection.h"
+
+#define AM64_DDRSS_SS_BASE 0x0F30
+#define DDRSS_V2A_CTL_REG  0x0020
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
@@ -15,16 +22,157 @@ int board_init(void)
return 0;
 }
 
+static u8 phytec_get_am62_ddr_size_default(void)
+{
+   int ret;
+   struct phytec_eeprom_data data;
+
+   if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_FIX)) {
+   if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_1GB))
+   return EEPROM_RAM_SIZE_1GB;
+   else if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_2GB))
+   return EEPROM_RAM_SIZE_2GB;
+   else if (IS_ENABLED(CONFIG_PHYCORE_AM62X_RAM_SIZE_4GB))
+   return EEPROM_RAM_SIZE_4GB;
+   }
+
+   ret = phytec_eeprom_data_setup(, 0, EEPROM_ADDR);
+   if (!ret && data.valid)
+   return phytec_get_am6_ddr_size();
+
+   /* Default DDR size is 2GB */
+   return EEPROM_RAM_SIZE_2GB;
+}
+
 int dram_init(void)
 {
-   return fdtdec_setup_mem_size_base();
+   u8 ram_size = phytec_get_am62_ddr_size_default();
+
+   /*
+* HACK: ddrss driver support 2GB RAM by default
+* V2A_CTL_REG should be updated to support other RAM size
+*/
+   if (IS_ENABLED(CONFIG_K3_AM64_DDRSS))
+   if (ram_size == EEPROM_RAM_SIZE_4GB)
+   writel(0x0210, AM64_DDRSS_SS_BASE + 
DDRSS_V2A_CTL_REG);
+
+   switch (ram_size) {
+   case EEPROM_RAM_SIZE_1GB:
+   gd->ram_size = 0x4000;
+   break;
+   case EEPROM_RAM_SIZE_2GB:
+   gd->ram_size = 0x8000;
+   break;
+   case EEPROM_RAM_SIZE_4GB:
+#ifdef CONFIG_PHYS_64BIT
+   gd->ram_size = 0x1;
+#else
+   gd->ram_size = 0x8000;
+#endif
+   break;
+   default:
+   gd->ram_size = 0x8000;
+   }
+
+   return 0;
+}
+
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+{
+#ifdef CONFIG_PHYS_64BIT
+   /* Limit RAM used by U-Boot to the DDR low region */
+   if (gd->ram_top > 0x1)
+   return 0x1;
+#endif
+   return gd->ram_top;
 }
 
 int dram_init_banksize(void)
 {
-   return fdtdec_setup_memory_banksize();
+   u8 ram_size;
+
+   ram_size = phytec_get_am62_ddr_size_default();
+   switch (ram_size) {
+   case EEPROM_RAM_SIZE_1GB:
+   gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+   gd->bd->bi_dram[0].size = 0x4000;
+   gd->ram_size = 0x4000;
+   break;
+
+   case EEPROM_RAM_SIZE_2GB:
+   gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+   gd->bd->bi_dram[0].size = 0x8000;
+   gd->ram_size = 0x8000;
+   break;
+
+   case EEPROM_RAM_SIZE_4GB:
+   /* Bank 0 declares the memory available in the DDR low region */
+   gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+   gd->bd->bi_dram[0].size = 0x8000;
+ 

[PATCH 4/5] board: phytec: common: Introduce a method to inject DDR timings deltas

[Wadim Egorov]

Introduce fdt_apply_ddrss_timings_patch() to allow board code to
override DDR settings in the device tree prior to DDRSS driver probing.

Signed-off-by: Wadim Egorov 
---
 board/phytec/common/k3/Makefile |  1 +
 board/phytec/common/k3/k3_ddrss_patch.c | 68 +
 board/phytec/common/k3/k3_ddrss_patch.h | 28 ++
 board/phytec/phycore_am62x/MAINTAINERS  |  1 +
 4 files changed, 98 insertions(+)
 create mode 100644 board/phytec/common/k3/k3_ddrss_patch.c
 create mode 100644 board/phytec/common/k3/k3_ddrss_patch.h

diff --git a/board/phytec/common/k3/Makefile b/board/phytec/common/k3/Makefile
index bcca1a9f846..40e91a43e99 100644
--- a/board/phytec/common/k3/Makefile
+++ b/board/phytec/common/k3/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0+
 obj-y += board.o
+obj-$(CONFIG_K3_DDRSS) += k3_ddrss_patch.o
diff --git a/board/phytec/common/k3/k3_ddrss_patch.c 
b/board/phytec/common/k3/k3_ddrss_patch.c
new file mode 100644
index 000..39f7be8dc92
--- /dev/null
+++ b/board/phytec/common/k3/k3_ddrss_patch.c
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov 
+ */
+
+#include "k3_ddrss_patch.h"
+
+#include 
+#include 
+
+#ifdef CONFIG_K3_AM64_DDRSS
+#define LPDDR4_INTR_CTL_REG_COUNT (423U)
+#define LPDDR4_INTR_PHY_INDEP_REG_COUNT (345U)
+#endif
+
+static int fdt_setprop_inplace_idx_u32(void *fdt, int nodeoffset,
+  const char *name, uint32_t idx, u32 val)
+{
+   val = cpu_to_be32(val);
+   return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
+  strlen(name),
+  idx * sizeof(val), ,
+  sizeof(val));
+}
+
+int fdt_apply_ddrss_timings_patch(void *fdt, struct ddrss *ddrss)
+{
+   int i, j;
+   int ret;
+   int mem_offset;
+
+   mem_offset = fdt_path_offset(fdt, "/memorycontroller@f30");
+   if (mem_offset < 0)
+   return -ENODEV;
+
+   for (i = 0; i < LPDDR4_INTR_CTL_REG_COUNT; i++)
+   for (j = 0; j < ddrss->ctl_regs_num; j++)
+   if (i == ddrss->ctl_regs[j].off) {
+   ret = fdt_setprop_inplace_idx_u32(fdt,
+   mem_offset, "ti,ctl-data", i,
+   ddrss->ctl_regs[j].val);
+   if (ret)
+   return ret;
+   }
+
+   for (i = 0; i < LPDDR4_INTR_PHY_INDEP_REG_COUNT; i++)
+   for (j = 0; j < ddrss->pi_regs_num; j++)
+   if (i == ddrss->pi_regs[j].off) {
+   ret = fdt_setprop_inplace_idx_u32(fdt,
+   mem_offset, "ti,pi-data", i,
+   ddrss->pi_regs[j].val);
+   if (ret)
+   return ret;
+   }
+
+   for (i = 0; i < LPDDR4_INTR_PHY_INDEP_REG_COUNT; i++)
+   for (j = 0; j < ddrss->phy_regs_num; j++)
+   if (i == ddrss->phy_regs[j].off) {
+   ret = fdt_setprop_inplace_idx_u32(fdt,
+   mem_offset, "ti,phy-data", i,
+   ddrss->phy_regs[j].val);
+   if (ret)
+   return ret;
+   }
+
+   return 0;
+}
diff --git a/board/phytec/common/k3/k3_ddrss_patch.h 
b/board/phytec/common/k3/k3_ddrss_patch.h
new file mode 100644
index 000..0a47c85116a
--- /dev/null
+++ b/board/phytec/common/k3/k3_ddrss_patch.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov 
+ */
+
+#ifndef K3_DDRSS_PATCH
+#define K3_DDRSS_PATCH
+
+#include 
+
+struct ddr_reg {
+   u32 off;
+   u32 val;
+};
+
+struct ddrss {
+   struct ddr_reg *ctl_regs;
+   u32 ctl_regs_num;
+   struct ddr_reg *pi_regs;
+   u32 pi_regs_num;
+   struct ddr_reg *phy_regs;
+   u32 phy_regs_num;
+};
+
+int fdt_apply_ddrss_timings_patch(void *fdt, struct ddrss *ddrss);
+
+#endif /* K3_DDRSS_PATCH */
diff --git a/board/phytec/phycore_am62x/MAINTAINERS 
b/board/phytec/phycore_am62x/MAINTAINERS
index 02ac88e58a4..42463ad054e 100644
--- a/board/phytec/phycore_am62x/MAINTAINERS
+++ b/board/phytec/phycore_am62x/MAINTAINERS
@@ -11,3 +11,4 @@ F:configs/phycore_am62x_a53_defconfig
 F: configs/phycore_am62x_r5_defconfig
 F: include/configs/phycore_am62x.h
 F: doc/board/phytec/phycore-am62x.rst
+F: board/phytec/common/k3
-- 
2.34.1

[PATCH 3/5] arm: mach-k3: am625: Call do_board_detect() before DDR probing

[Wadim Egorov]

Call do_board_detect() hook before the K3 DDRSS driver gets probed.
It will allow boards to adjust DDR timings in do_board_detect().

Signed-off-by: Wadim Egorov 
---
 arch/arm/mach-k3/am625_init.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 668f9a51ef4..672de1c03de 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -212,6 +212,8 @@ void board_init_f(ulong dummy)
 
preloader_console_init();
 
+   do_board_detect();
+
/*
 * Allow establishing an early console as required for example when
 * doing a UART-based boot. Note that this console may not "survive"
-- 
2.34.1

[PATCH 1/5] board: phytec: Make AM6 SoM detection depend on I2C

[Wadim Egorov]

SoM detection is using I2C driver model functions.
Let's depend on I2C.

Signed-off-by: Wadim Egorov 
---
 board/phytec/common/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig
index 1077f0f4b61..56c8290f641 100644
--- a/board/phytec/common/Kconfig
+++ b/board/phytec/common/Kconfig
@@ -16,6 +16,7 @@ config PHYTEC_AM62_SOM_DETECTION
bool "Support SoM detection for AM62x PHYTEC platforms"
depends on (TARGET_PHYCORE_AM62X_A53 || TARGET_PHYCORE_AM62X_R5) && \
   PHYTEC_SOM_DETECTION
+   depends on SPL_I2C && DM_I2C
default y
help
   Support of I2C EEPROM based SoM detection. Supported
@@ -25,6 +26,7 @@ config PHYTEC_AM64_SOM_DETECTION
bool "Support SoM detection for AM64x PHYTEC platforms"
depends on (TARGET_PHYCORE_AM64X_A53 || TARGET_PHYCORE_AM64X_R5) && \
   PHYTEC_SOM_DETECTION
+   depends on SPL_I2C && DM_I2C
default y
help
   Support of I2C EEPROM based SoM detection. Supported
-- 
2.34.1

[PATCH 2/5] board: phytec: Fix function definitions in AM6x SOM detection

[Wadim Egorov]

Functions are declared as phytec_am6* and not phytec_am62*.
Update the definitions to match the declarations.

Fixes: 9d152c23279c ("board: phytec: Add SOM detection for AM6x")

Signed-off-by: Wadim Egorov 
---
 board/phytec/common/am6_som_detection.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/board/phytec/common/am6_som_detection.c 
b/board/phytec/common/am6_som_detection.c
index 2e9884dab44..7930ab42d1c 100644
--- a/board/phytec/common/am6_som_detection.c
+++ b/board/phytec/common/am6_som_detection.c
@@ -73,7 +73,7 @@ static u8 phytec_check_opt(struct phytec_eeprom_data *data, 
u8 option)
  *  - The size
  *  - PHYTEC_EEPROM_INVAL when the data is invalid.
  */
-u8 __maybe_unused phytec_get_am62_ddr_size(struct phytec_eeprom_data *data)
+u8 __maybe_unused phytec_get_am6_ddr_size(struct phytec_eeprom_data *data)
 {
u8 ddr_id = phytec_check_opt(data, 3);
 
@@ -89,7 +89,7 @@ u8 __maybe_unused phytec_get_am62_ddr_size(struct 
phytec_eeprom_data *data)
  *  - Otherwise a board depended code for the size.
  *  - PHYTEC_EEPROM_INVAL when the data is invalid.
  */
-u8 __maybe_unused phytec_get_am62_spi(struct phytec_eeprom_data *data)
+u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data)
 {
u8 spi = phytec_check_opt(data, 5);
 
@@ -105,7 +105,7 @@ u8 __maybe_unused phytec_get_am62_spi(struct 
phytec_eeprom_data *data)
  *  - 0x1 if 10/100/1000 MBit Phy is populated.
  *  - PHYTEC_EEPROM_INVAL when the data is invalid.
  */
-u8 __maybe_unused phytec_get_am62_eth(struct phytec_eeprom_data *data)
+u8 __maybe_unused phytec_get_am6_eth(struct phytec_eeprom_data *data)
 {
u8 eth = phytec_check_opt(data, 6);
 
@@ -121,7 +121,7 @@ u8 __maybe_unused phytec_get_am62_eth(struct 
phytec_eeprom_data *data)
  *  - 1 if it is populated.
  *  - PHYTEC_EEPROM_INVAL when the data is invalid.
  */
-u8 __maybe_unused phytec_get_am62_rtc(struct phytec_eeprom_data *data)
+u8 __maybe_unused phytec_get_am6_rtc(struct phytec_eeprom_data *data)
 {
u8 rtc = phytec_check_opt(data, 7);
 
@@ -131,28 +131,28 @@ u8 __maybe_unused phytec_get_am62_rtc(struct 
phytec_eeprom_data *data)
 
 #else
 
-inline int __maybe_unused phytec_am62_detect(struct phytec_eeprom_data *data)
+inline int __maybe_unused phytec_am6_detect(struct phytec_eeprom_data *data)
 {
return -1;
 }
 
 inline u8 __maybe_unused
-phytec_get_am62_ddr_size(struct phytec_eeprom_data *data)
+phytec_get_am6_ddr_size(struct phytec_eeprom_data *data)
 {
return PHYTEC_EEPROM_INVAL;
 }
 
-inline u8 __maybe_unused phytec_get_am62_spi(struct phytec_eeprom_data *data)
+inline u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data)
 {
return PHYTEC_EEPROM_INVAL;
 }
 
-inline u8 __maybe_unused phytec_get_am62_eth(struct phytec_eeprom_data *data)
+inline u8 __maybe_unused phytec_get_am6_eth(struct phytec_eeprom_data *data)
 {
return PHYTEC_EEPROM_INVAL;
 }
 
-inline u8 __maybe_unused phytec_get_am62_rtc(struct phytec_eeprom_data *data)
+inline u8 __maybe_unused phytec_get_am6_rtc(struct phytec_eeprom_data *data)
 {
return PHYTEC_EEPROM_INVAL;
 }
-- 
2.34.1

[PATCH 0/5] *** phyCORE-AM62x: DDR detection / Inject DDR timing deltas ***

[Wadim Egorov]

PHYTEC stores details about the hardware in an EEPROM on the SoM. We can
utilize this information and chose the proper DDR timings accordingly.

Due to the limited SRAM memory on the AM62x, the concept was to store
only the DDR timings deltas and not their full set, see Patch 4 & 5.

The last patch adds support for a 1 GB and 4 GB RAM variant of the
phyCORE-AM62x.

Patch 4 & 5 are based on
https://patchwork.ozlabs.org/project/uboot/list/?series=404273

Wadim Egorov (5):
  board: phytec: Make AM6 SoM detection depend on I2C
  board: phytec: Fix function definitions in AM6x SOM detection
  arm: mach-k3: am625: Call do_board_detect() before DDR probing
  board: phytec: common: Introduce a method to inject DDR timings deltas
  board: phytec: am62x: Add support for 1 & 4 GB RAM variants

 arch/arm/mach-k3/am625_init.c |   2 +
 board/phytec/common/Kconfig   |   2 +
 board/phytec/common/am6_som_detection.c   |  18 +-
 board/phytec/common/am6_som_detection.h   |   8 +
 board/phytec/common/k3/Makefile   |   1 +
 board/phytec/common/k3/k3_ddrss_patch.c   |  68 ++
 board/phytec/common/k3/k3_ddrss_patch.h   |  28 +++
 board/phytec/phycore_am62x/MAINTAINERS|   1 +
 board/phytec/phycore_am62x/phycore-am62x.c| 152 -
 board/phytec/phycore_am62x/phycore-ddr-data.h | 206 ++
 configs/phycore_am62x_a53_defconfig   |   4 +
 configs/phycore_am62x_r5_defconfig|   4 +
 12 files changed, 483 insertions(+), 11 deletions(-)
 create mode 100644 board/phytec/common/k3/k3_ddrss_patch.c
 create mode 100644 board/phytec/common/k3/k3_ddrss_patch.h
 create mode 100644 board/phytec/phycore_am62x/phycore-ddr-data.h

-- 
2.34.1

Re: Distro Boot instructions with examples

[Mark Kettenis]

> From: Igor Opaniuk 
> Date: Tue, 7 May 2024 16:30:17 +0200
> 
> Hello Antoni,
> 
> On Tue, May 7, 2024 at 4:14 PM Antoni Jankowski
>  wrote:
> >
> > Hi,
> >
> > I've recently learned about the Distro Boot feature of u-boot. This sounds
> > interesting, however the official instructions are sparse and examples seem
> > to be non-existent.
> >
> > The platform I'm working with at the moment is a raspberry pi CM4, are
> > there any examples of how to implement this concept? Distro Boot seems to
> > be suitable for updating all the rootfs at once, including what usually is
> > a separate boot partition.
> >
> > Best regards,
> > Antoni
> 
> There is a nice manual from Toradex about Distro Boot integration [1].
> You can also find a bunch of examples of integration of existing boards
> just by grep-ing:
> 
> u-boot.git$ grep -ine "config_distro_bootcmd" -r ./include/configs/
> ./include/configs/pico-imx6ul.h:86:#include 
> ./include/configs/kp_imx6q_tpc.h:84:#include 
> ./include/configs/imx8mp_venice.h:21:#include 
> ./include/configs/stm32f746-disco.h:30:#include 
> ...
> 
> Hope this helps.
> 
> [1] https://developer.toradex.com/linux-bsp/os-development/boot/distro-boot/

However, "distro boot" is being superseded by "standard boot" in
recent versions of U-Boot and the raspberry pi boards have already
moved on.  See doc/develop/bootstd.rst for some documentation on
"standard boot".

Re: [PATCH v4] test/py: net_boot: Add test cases for net boot

[Tom Rini]

On Tue, May 07, 2024 at 03:26:18PM +0200, Michal Simek wrote:
> Hi Tom,
> 
> út 7. 5. 2024 v 15:20 odesílatel Tom Rini  napsal:
> 
> > On Tue, May 07, 2024 at 11:22:45AM +0530, Love Kumar wrote:
> > >
> > >
> > > On 04/05/24 1:48 am, Tom Rini wrote:
> > > > On Fri, May 03, 2024 at 05:39:46PM +0530, Love Kumar wrote:
> > > >
> > > > > Add tests for booting image using tftpboot/pxe boot commands,
> > tftpboot
> > > > > boot case loads the FIT image into DDR and boots using bootm command
> > > > > whereas pxe boot cases downloads the pxe configuration file from the
> > > > > TFTP server and interprets it to boot the images mentioned in the pxe
> > > > > configurations file.
> > > > > This test relies on boardenv_* containing configuration values
> > including
> > > > > the parameter 'pattern'. tftpboot/pxe boot cases boots the Linux
> > till the
> > > > > boot log pattern value is matched. For example, if the parameter
> > > > > 'pattern' is defined as 'login:', it will boot till login prompt.
> > > > >
> > > > > Signed-off-by: Love Kumar 
> > > >
> > > > I'm not quite sure where the problem is, next. After enabling FIT image
> > > > support in my build so I can use the image I have on hand:
> > > > U-Boot> tftpboot 20 v6.6/image.fit.nocomp
> > > > Waiting for Ethernet connection... done.
> > > > Using smsc95xx_eth device
> > > > TFTP from server 192.168.1.10; our IP address is 192.168.1.100
> > > > Filename 'v6.6/image.fit.nocomp'.
> > > > Load address: 0x20
> > > > Loading: ##  82 MiB
> > > >   3.2 MiB/s
> > > > done
> > > > Bytes transferred = 85984256 (5200400 hex)
> > > > U-Boot> U-Boot> crc32 20 $filesize
> > > > CRC32 for 0020 ... 054003ff ==> 754c839a
> > > > U-Boot> U-Boot> bootm 20
> > > > ## Loading kernel from FIT Image at 0020 ...
> > > > Could not find configuration node
> > > > ERROR -2: can't get kernel image!
> > > > U-Boot>
> > > >
> > > > And in u_boot_boardenv_rpi_arm64.py:
> > > > env__tftp_boot_test_skip = False
> > > >
> > > > env__net_tftp_bootable_file = {
> > > >  'fn': 'v6.6/image.fit.nocomp',
> > > >  'addr': 0x0020,
> > > >  'size': 85984256,
> > > >  'crc32': '754c839a',
> > > >  'pattern': 'Linux',
> > > >  'config': 'conf-852',
> > > > }
> > > >
> > > > But it's not trying to boot conf-852 but instead just passing the
> > > > address. This image lacks a default config, which your example has and
> > I
> > > > think is why the tests work in your case.
> > > >
> > >
> > > Hi,
> > >
> > > Yes, this case expects to have some default config in fit image as it
> > uses
> > > 'bootm ' command to boot, below change in fit image should work.
> > >
> > > configurations {
> > > default = "conf-852";
> > >
> > > test_net_tftpboot_boot_config - This case will boot from the given
> > config:
> > > 'bootm 20#conf-852'
> >
> > I wasn't clear, sorry. The problem is that since we define the config to
> > use, which is good, we need to then use it. I intentionally have a FIT
> > image that supports every aarch64 platform and I'd rather use it for
> > every platform and not a per-platform FIT image.
> >
> 
> What about putting those two tests together? I mean if config is not
> defined used default configuration,
> if config is defined use it.

So, I followed up with another email too about tests for FIT vs tests
for OS boot. If we update the exiting FIT tests to test that the default
config is used if present would that be a better way to cover the intent
here?

-- 
Tom


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Description: PGP signature

Re: [PATCH v5 4/6] configs: am62x_evm_*: Enable USB and DFU support

[Tom Rini]

On Tue, May 07, 2024 at 10:14:28AM +0200, Francesco Dolcini wrote:
> Hello Martyn,
> first thanks for your series, with this we might be able to drop some
> downstream branch.
> 
> On Mon, May 06, 2024 at 03:38:44PM +0100, Martyn Welch wrote:
> > From: Sjoerd Simons 
> > 
> > Provide config fragments to enable USB host as well as USB gadget and DFU
> > support for a53 and r5. This relevant fragment is included into the
> > am62x EVM a53 defconfig. For the r5, due to the smaller available size,
> > the config fragment also disables support for persistent storage to free
> > up space for USB support. This fragment needs to be included is DFU
> > booting is desired.
> > 
> > The CONFIG_DFU_SF option is placed in the defconfig rather than the
> > fragment as this is known not to be supported on all boards that can
> > support DFU.
> > 
> > Signed-off-by: Sjoerd Simons 
> > Signed-off-by: Martyn Welch 
> 
> ...
> 
> > diff --git a/configs/am62x_r5_usbdfu.config b/configs/am62x_r5_usbdfu.config
> > new file mode 100644
> > index 00..772bb2ab93
> > --- /dev/null
> > +++ b/configs/am62x_r5_usbdfu.config
> > @@ -0,0 +1,28 @@
> 
> ...
> 
> > +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> > +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> > +CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
> 
> This is making this fragment TI _board_ specific, while the file name seems
> to imply that this is generic for the TI SoC. Other vendors, using TI
> SoCs, will likely want to use their own USB IDs.
> 
> Not a big deal and no need to change it, we'll handle this in our own
> defconfig when we'll enable this, but I wanted to mention this.

One thing about fragments, at least so long as it's being processed
correctly, is that "make fooboard_config fragA.config fragB.config"
means that fragB.config will override fragA.config values. Not that it
shouldn't also possibly be re-done as either of:
1) am62x_r5_usbdfu.config + am62x_evm_r5_usbdfu.config
2) better use of imply keyword perhaps in the SoC stanza in one of the
K3 Kconfig files.

-- 
Tom


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Re: Distro Boot instructions with examples

[Igor Opaniuk]

Hello Antoni,

On Tue, May 7, 2024 at 4:14 PM Antoni Jankowski
 wrote:
>
> Hi,
>
> I've recently learned about the Distro Boot feature of u-boot. This sounds
> interesting, however the official instructions are sparse and examples seem
> to be non-existent.
>
> The platform I'm working with at the moment is a raspberry pi CM4, are
> there any examples of how to implement this concept? Distro Boot seems to
> be suitable for updating all the rootfs at once, including what usually is
> a separate boot partition.
>
> Best regards,
> Antoni

There is a nice manual from Toradex about Distro Boot integration [1].
You can also find a bunch of examples of integration of existing boards
just by grep-ing:

u-boot.git$ grep -ine "config_distro_bootcmd" -r ./include/configs/
./include/configs/pico-imx6ul.h:86:#include 
./include/configs/kp_imx6q_tpc.h:84:#include 
./include/configs/imx8mp_venice.h:21:#include 
./include/configs/stm32f746-disco.h:30:#include 
...

Hope this helps.

[1] https://developer.toradex.com/linux-bsp/os-development/boot/distro-boot/

-- 
Best regards - Atentamente - Meilleures salutations

Igor Opaniuk

mailto: igor.opan...@gmail.com
skype: igor.opanyuk
https://www.linkedin.com/in/iopaniuk

Re: [PATCH v2 1/1] net: dwc_eth_qos: mdio: Implement clause 45

[Marek Vasut]

On 5/7/24 11:42 AM, Philip Oberfichtner wrote:

Bevor this commit, only clause 22 access was possible. After this commit,
clause 45 direct access will available as well.

Note that there is a slight change of behavior: Before this commit, the
C45E bit was set to whatever value was left in the register from the
previous access. After this commit, we adopt the common practice of
discerning C45 from C22 using the devad argument.

Signed-off-by: Philip Oberfichtner 
---

Notes:
 Attention: There is a slight change of behavior introduced by this
 commit (see commit message). Please test and review if this works for
 everybody.
 
 My implementation is tested on an Intel Elkhart lake SOC, patch

 submitted here:
 
 https://patchwork.ozlabs.org/project/uboot/list/?series=405358
 
 Changes in V2:

- Use FIELD_PREP() instead of manual '<<' shifting
- Fix whitespace errors


Reviewed-by: Marek Vasut 

Re: [PATCH] imx: hab: add documentation about the required keys/certs

[Marek Vasut]

On 5/7/24 3:06 PM, Claudius Heine wrote:

For CST to find the certificates and keys for signing, some keys and
certs need to be copied into the u-boot build directory.


Make sure to CC "NXP i.MX U-Boot Team" , else NXP is not informed. Use 
scripts/get_maintainer to get the full list or just reuse the CC list 
from patches in this thread.



diff --git a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt 
b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
index ce1de659d8..42214df21a 100644
--- a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
+++ b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
@@ -144,6 +144,22 @@ The signing is activated by wrapping SPL and fitImage 
sections into nxp-imx8mcst
  etype, which is done automatically in arch/arm/dts/imx8m{m,n,p,q}-u-boot.dtsi
  in case CONFIG_IMX_HAB Kconfig symbol is enabled.
  
+Per default the HAB keys and certificates need to be located in the build

+directory, this means copying the following files from the HAB keys directory
+flat (e.g. removing the `keys` and `cert` subdirectory) into the u-boot build
+directory for the CST Code Signing Tool to locate them:


Do symlink(s) work too ?


+- `crts/SRK_1_2_3_4_table.bin`
+- `crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem`
+- `keys/CSF1_1_sha256_4096_65537_v3_usr_key.pem`
+- `crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem`
+- `keys/IMG1_1_sha256_4096_65537_v3_usr_key.pem`
+- `keys/key_pass.txt`
+
+The paths to the SRK table and the certificates can be modified via changes to
+the nxp_imx8mcst device tree node


"nodes", plural, there are two, one for SPL and one for fitImage.

It would be good to mention the DT properties which govern the crypto 
material paths -- nxp,srk-table, nxp,csf-crt, nxp,img-crt -- somewhere 
around this sentence.

Distro Boot instructions with examples

[Antoni Jankowski]

Hi,

I've recently learned about the Distro Boot feature of u-boot. This sounds
interesting, however the official instructions are sparse and examples seem
to be non-existent.

The platform I'm working with at the moment is a raspberry pi CM4, are
there any examples of how to implement this concept? Distro Boot seems to
be suitable for updating all the rootfs at once, including what usually is
a separate boot partition.

Best regards,
Antoni

Re: [PATCH 01/81] mmc: Migrate MMC_SUPPORTS_TUNING to Kconfig

[Tom Rini]

On Wed, 01 May 2024 19:30:18 -0600, Tom Rini wrote:

> The constraints on the MMC_SUPPORTS_TUNING symbol can easily be
> expressed in Kconfig (with the addition of SPL_MMC_SUPPORTS_TUNING).
> Furthermore, in order to remove  from the MMC subsystem, the
> way this symbol is used today needs to be changed in order to continue
> functioning.
> 
> 
> [...]

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH 01/33] arm: mach-versatile: Remove dead code

[Tom Rini]

On Tue, 30 Apr 2024 07:35:27 -0600, Tom Rini wrote:

> This platform is no longer supported in tree, remove.
> 
> 

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH 001/149] global: Make include

[Tom Rini]

On Tue, 30 Apr 2024 20:40:48 -0600, Tom Rini wrote:

> This follows the example of RISC-V where  includes
>  directly as "gd" includes a reference to bd_info already
> and so the first must include the second anyhow. We then remove
>  from all of the places which include references to "gd"
> an so have  already.
> 
> 
> [...]

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH 00/18] Remove from a number of places

[Tom Rini]

On Sat, 27 Apr 2024 08:10:48 -0600, Tom Rini wrote:

> Hey all,
> 
> This series is the next step in winding down usage of  in
> order to be able to then remove it. This covers not quite 25% of the
> remaining users of the file. Of what is left, it's either arch/arm/,
> board/ or drivers/ code. I am likely to start tackling arch/arm/ next,
> and depending on how exactly I break that down I may try and cover some
> board/ code as well (for example, tackle arch/arm/mach-omap/ and
> arch/arm/mach-k3 and board/ti/ (and then the other vendors too..) in one
> commit.
> 
> [...]

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH v4] test/py: net_boot: Add test cases for net boot

[Michal Simek]

Hi Tom,

út 7. 5. 2024 v 15:20 odesílatel Tom Rini  napsal:

> On Tue, May 07, 2024 at 11:22:45AM +0530, Love Kumar wrote:
> >
> >
> > On 04/05/24 1:48 am, Tom Rini wrote:
> > > On Fri, May 03, 2024 at 05:39:46PM +0530, Love Kumar wrote:
> > >
> > > > Add tests for booting image using tftpboot/pxe boot commands,
> tftpboot
> > > > boot case loads the FIT image into DDR and boots using bootm command
> > > > whereas pxe boot cases downloads the pxe configuration file from the
> > > > TFTP server and interprets it to boot the images mentioned in the pxe
> > > > configurations file.
> > > > This test relies on boardenv_* containing configuration values
> including
> > > > the parameter 'pattern'. tftpboot/pxe boot cases boots the Linux
> till the
> > > > boot log pattern value is matched. For example, if the parameter
> > > > 'pattern' is defined as 'login:', it will boot till login prompt.
> > > >
> > > > Signed-off-by: Love Kumar 
> > >
> > > I'm not quite sure where the problem is, next. After enabling FIT image
> > > support in my build so I can use the image I have on hand:
> > > U-Boot> tftpboot 20 v6.6/image.fit.nocomp
> > > Waiting for Ethernet connection... done.
> > > Using smsc95xx_eth device
> > > TFTP from server 192.168.1.10; our IP address is 192.168.1.100
> > > Filename 'v6.6/image.fit.nocomp'.
> > > Load address: 0x20
> > > Loading: ##  82 MiB
> > >   3.2 MiB/s
> > > done
> > > Bytes transferred = 85984256 (5200400 hex)
> > > U-Boot> U-Boot> crc32 20 $filesize
> > > CRC32 for 0020 ... 054003ff ==> 754c839a
> > > U-Boot> U-Boot> bootm 20
> > > ## Loading kernel from FIT Image at 0020 ...
> > > Could not find configuration node
> > > ERROR -2: can't get kernel image!
> > > U-Boot>
> > >
> > > And in u_boot_boardenv_rpi_arm64.py:
> > > env__tftp_boot_test_skip = False
> > >
> > > env__net_tftp_bootable_file = {
> > >  'fn': 'v6.6/image.fit.nocomp',
> > >  'addr': 0x0020,
> > >  'size': 85984256,
> > >  'crc32': '754c839a',
> > >  'pattern': 'Linux',
> > >  'config': 'conf-852',
> > > }
> > >
> > > But it's not trying to boot conf-852 but instead just passing the
> > > address. This image lacks a default config, which your example has and
> I
> > > think is why the tests work in your case.
> > >
> >
> > Hi,
> >
> > Yes, this case expects to have some default config in fit image as it
> uses
> > 'bootm ' command to boot, below change in fit image should work.
> >
> > configurations {
> > default = "conf-852";
> >
> > test_net_tftpboot_boot_config - This case will boot from the given
> config:
> > 'bootm 20#conf-852'
>
> I wasn't clear, sorry. The problem is that since we define the config to
> use, which is good, we need to then use it. I intentionally have a FIT
> image that supports every aarch64 platform and I'd rather use it for
> every platform and not a per-platform FIT image.
>

What about putting those two tests together? I mean if config is not
defined used default configuration,
if config is defined use it.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH v4] test/py: net_boot: Add test cases for net boot

[Tom Rini]

On Tue, May 07, 2024 at 11:22:45AM +0530, Love Kumar wrote:
> 
> 
> On 04/05/24 1:48 am, Tom Rini wrote:
> > On Fri, May 03, 2024 at 05:39:46PM +0530, Love Kumar wrote:
> > 
> > > Add tests for booting image using tftpboot/pxe boot commands, tftpboot
> > > boot case loads the FIT image into DDR and boots using bootm command
> > > whereas pxe boot cases downloads the pxe configuration file from the
> > > TFTP server and interprets it to boot the images mentioned in the pxe
> > > configurations file.
> > > This test relies on boardenv_* containing configuration values including
> > > the parameter 'pattern'. tftpboot/pxe boot cases boots the Linux till the
> > > boot log pattern value is matched. For example, if the parameter
> > > 'pattern' is defined as 'login:', it will boot till login prompt.
> > > 
> > > Signed-off-by: Love Kumar 
> > 
> > I'm not quite sure where the problem is, next. After enabling FIT image
> > support in my build so I can use the image I have on hand:
> > U-Boot> tftpboot 20 v6.6/image.fit.nocomp
> > Waiting for Ethernet connection... done.
> > Using smsc95xx_eth device
> > TFTP from server 192.168.1.10; our IP address is 192.168.1.100
> > Filename 'v6.6/image.fit.nocomp'.
> > Load address: 0x20
> > Loading: ##  82 MiB
> >   3.2 MiB/s
> > done
> > Bytes transferred = 85984256 (5200400 hex)
> > U-Boot> U-Boot> crc32 20 $filesize
> > CRC32 for 0020 ... 054003ff ==> 754c839a
> > U-Boot> U-Boot> bootm 20
> > ## Loading kernel from FIT Image at 0020 ...
> > Could not find configuration node
> > ERROR -2: can't get kernel image!
> > U-Boot>
> > 
> > And in u_boot_boardenv_rpi_arm64.py:
> > env__tftp_boot_test_skip = False
> > 
> > env__net_tftp_bootable_file = {
> >  'fn': 'v6.6/image.fit.nocomp',
> >  'addr': 0x0020,
> >  'size': 85984256,
> >  'crc32': '754c839a',
> >  'pattern': 'Linux',
> >  'config': 'conf-852',
> > }
> > 
> > But it's not trying to boot conf-852 but instead just passing the
> > address. This image lacks a default config, which your example has and I
> > think is why the tests work in your case.
> > 
> 
> Hi,
> 
> Yes, this case expects to have some default config in fit image as it uses
> 'bootm ' command to boot, below change in fit image should work.
> 
> configurations {
> default = "conf-852";
> 
> test_net_tftpboot_boot_config - This case will boot from the given config:
> 'bootm 20#conf-852'

I think perhaps a related issue is that you're wanting to test that a
FIT image with a default config works as expected. This should be added
to test/py/tests/test_fit.py where we already construct and test
assorted cases like that, and not handled in the "test OS boot" test I
believe.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v4] test/py: net_boot: Add test cases for net boot

[Tom Rini]

On Tue, May 07, 2024 at 11:22:45AM +0530, Love Kumar wrote:
> 
> 
> On 04/05/24 1:48 am, Tom Rini wrote:
> > On Fri, May 03, 2024 at 05:39:46PM +0530, Love Kumar wrote:
> > 
> > > Add tests for booting image using tftpboot/pxe boot commands, tftpboot
> > > boot case loads the FIT image into DDR and boots using bootm command
> > > whereas pxe boot cases downloads the pxe configuration file from the
> > > TFTP server and interprets it to boot the images mentioned in the pxe
> > > configurations file.
> > > This test relies on boardenv_* containing configuration values including
> > > the parameter 'pattern'. tftpboot/pxe boot cases boots the Linux till the
> > > boot log pattern value is matched. For example, if the parameter
> > > 'pattern' is defined as 'login:', it will boot till login prompt.
> > > 
> > > Signed-off-by: Love Kumar 
> > 
> > I'm not quite sure where the problem is, next. After enabling FIT image
> > support in my build so I can use the image I have on hand:
> > U-Boot> tftpboot 20 v6.6/image.fit.nocomp
> > Waiting for Ethernet connection... done.
> > Using smsc95xx_eth device
> > TFTP from server 192.168.1.10; our IP address is 192.168.1.100
> > Filename 'v6.6/image.fit.nocomp'.
> > Load address: 0x20
> > Loading: ##  82 MiB
> >   3.2 MiB/s
> > done
> > Bytes transferred = 85984256 (5200400 hex)
> > U-Boot> U-Boot> crc32 20 $filesize
> > CRC32 for 0020 ... 054003ff ==> 754c839a
> > U-Boot> U-Boot> bootm 20
> > ## Loading kernel from FIT Image at 0020 ...
> > Could not find configuration node
> > ERROR -2: can't get kernel image!
> > U-Boot>
> > 
> > And in u_boot_boardenv_rpi_arm64.py:
> > env__tftp_boot_test_skip = False
> > 
> > env__net_tftp_bootable_file = {
> >  'fn': 'v6.6/image.fit.nocomp',
> >  'addr': 0x0020,
> >  'size': 85984256,
> >  'crc32': '754c839a',
> >  'pattern': 'Linux',
> >  'config': 'conf-852',
> > }
> > 
> > But it's not trying to boot conf-852 but instead just passing the
> > address. This image lacks a default config, which your example has and I
> > think is why the tests work in your case.
> > 
> 
> Hi,
> 
> Yes, this case expects to have some default config in fit image as it uses
> 'bootm ' command to boot, below change in fit image should work.
> 
> configurations {
> default = "conf-852";
> 
> test_net_tftpboot_boot_config - This case will boot from the given config:
> 'bootm 20#conf-852'

I wasn't clear, sorry. The problem is that since we define the config to
use, which is good, we need to then use it. I intentionally have a FIT
image that supports every aarch64 platform and I'd rather use it for
every platform and not a per-platform FIT image.

-- 
Tom


signature.asc
Description: PGP signature

[PATCH] imx: hab: add documentation about the required keys/certs

[Claudius Heine]

For CST to find the certificates and keys for signing, some keys and
certs need to be copied into the u-boot build directory.

Signed-off-by: Claudius Heine 
---
 doc/imx/habv4/guides/mx8m_spl_secure_boot.txt | 16 
 1 file changed, 16 insertions(+)

diff --git a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt 
b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
index ce1de659d8..42214df21a 100644
--- a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
+++ b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
@@ -144,6 +144,22 @@ The signing is activated by wrapping SPL and fitImage 
sections into nxp-imx8mcst
 etype, which is done automatically in arch/arm/dts/imx8m{m,n,p,q}-u-boot.dtsi
 in case CONFIG_IMX_HAB Kconfig symbol is enabled.
 
+Per default the HAB keys and certificates need to be located in the build
+directory, this means copying the following files from the HAB keys directory
+flat (e.g. removing the `keys` and `cert` subdirectory) into the u-boot build
+directory for the CST Code Signing Tool to locate them:
+
+- `crts/SRK_1_2_3_4_table.bin`
+- `crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem`
+- `keys/CSF1_1_sha256_4096_65537_v3_usr_key.pem`
+- `crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem`
+- `keys/IMG1_1_sha256_4096_65537_v3_usr_key.pem`
+- `keys/key_pass.txt`
+
+The paths to the SRK table and the certificates can be modified via changes to
+the nxp_imx8mcst device tree node, however the other files are required by the
+CST tools as well, and will be searched for in relation to them.
+
 Build of flash.bin target then produces a signed flash.bin automatically.
 
 1.4 Closing the device
-- 
2.42.0

Re: [PATCH] configs: Make USB_GADGET_MANUFACTURER consistent over all PHYTEC boards

[Mattijs Korpershoek]

Hi Benjamin,

Thank you for the patch.

On ven., mai 03, 2024 at 09:00, Benjamin Hahn  wrote:

> Set CONFIG_USB_GADGET_MANUFACTURER to PHYTEC for all PHYTEC boards.
>
> Signed-off-by: Benjamin Hahn 

Reviewed-by: Mattijs Korpershoek 

This is assigned to me on patchwork. I can pick it up through
u-boot-dfu.

If someone else wants to pick it up, please let me know.

> ---
>  configs/phycore-imx8mp_defconfig | 2 +-
>  configs/phycore_am64x_a53_defconfig  | 2 +-
>  configs/phycore_am64x_r5_defconfig   | 2 +-
>  configs/phycore_pcl063_defconfig | 2 +-
>  configs/phycore_pcl063_ull_defconfig | 2 +-
>  5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/configs/phycore-imx8mp_defconfig 
> b/configs/phycore-imx8mp_defconfig
> index e9a287cb441f..9f42edd72324 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -147,7 +147,7 @@ CONFIG_USB_DWC3=y
>  CONFIG_USB_DWC3_GENERIC=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="FSL"
> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0525
>  CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
>  CONFIG_IMX_WATCHDOG=y
> diff --git a/configs/phycore_am64x_a53_defconfig 
> b/configs/phycore_am64x_a53_defconfig
> index 1a9359773b45..9b52f8ad0644 100644
> --- a/configs/phycore_am64x_a53_defconfig
> +++ b/configs/phycore_am64x_a53_defconfig
> @@ -159,7 +159,7 @@ CONFIG_USB_CDNS3=y
>  CONFIG_USB_CDNS3_GADGET=y
>  CONFIG_USB_CDNS3_HOST=y
>  CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0451
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
>  CONFIG_USB_GADGET_DOWNLOAD=y
> diff --git a/configs/phycore_am64x_r5_defconfig 
> b/configs/phycore_am64x_r5_defconfig
> index 61d784fa17f6..15a7e7089e73 100644
> --- a/configs/phycore_am64x_r5_defconfig
> +++ b/configs/phycore_am64x_r5_defconfig
> @@ -171,7 +171,7 @@ CONFIG_USB_STORAGE=y
>  CONFIG_SPL_USB_STORAGE=y
>  CONFIG_USB_GADGET=y
>  CONFIG_SPL_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0451
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
>  CONFIG_USB_GADGET_DOWNLOAD=y
> diff --git a/configs/phycore_pcl063_defconfig 
> b/configs/phycore_pcl063_defconfig
> index 017054a8e12b..2f6b158a6772 100644
> --- a/configs/phycore_pcl063_defconfig
> +++ b/configs/phycore_pcl063_defconfig
> @@ -62,7 +62,7 @@ CONFIG_IMX_THERMAL=y
>  CONFIG_USB=y
>  CONFIG_SPL_USB_HOST=y
>  CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Phytec"
> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x4fff
>  CONFIG_CI_UDC=y
> diff --git a/configs/phycore_pcl063_ull_defconfig 
> b/configs/phycore_pcl063_ull_defconfig
> index b3da43a5bf1e..b42a410da69c 100644
> --- a/configs/phycore_pcl063_ull_defconfig
> +++ b/configs/phycore_pcl063_ull_defconfig
> @@ -53,7 +53,7 @@ CONFIG_IMX_THERMAL=y
>  CONFIG_USB=y
>  CONFIG_SPL_USB_HOST=y
>  CONFIG_USB_GADGET=y
> -CONFIG_USB_GADGET_MANUFACTURER="Phytec"
> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x4fff
>  CONFIG_CI_UDC=y
>
> ---
> base-commit: 6fdb021f148f598a67eb3cac5e3eb4a569cdaacd
> change-id: 20240503-wip-bhahn-bspimx8m-3196-c1ebd0bab6ac
>
> Best regards,
> -- 
> Benjamin Hahn 

Re: [PATCH] kconfig: default to zero if int/hex symbol lacks default property

[Yoann Congal]

Le 06/05/2024 à 19:43, Tom Rini a écrit :
> On Sun, May 05, 2024 at 03:53:53PM +0200, Yoann Congal wrote:
> 
>> From: Masahiro Yamada 
>>
>> This is a cherry-pick from the kernel commit:
>> 6262afa10ef7c (kconfig: default to zero if int/hex symbol lacks default 
>> property, 2023-11-26)
>>
>> When a default property is missing in an int or hex symbol, it defaults
>> to an empty string, which is not a valid symbol value.
>>
>> It results in an incorrect .config, and can also lead to an infinite
>> loop in scripting.
>>
>> Use "0" for int and "0x0" for hex as a default value.
>>
>> Signed-off-by: Masahiro Yamada 
>> Reviewed-by: Yoann Congal 
>>
>> Signed-off-by: Yoann Congal 
>> ---
>> Added context that was not in the upstream commit:
>> The infinite loop case happens with a configuration defined like this
>> (a hex config without a valid default value):
>>   config HEX_TEST
>>  hex "Hex config without default"
>>
>> And using:
>>   $ make oldconfig < /dev/null
>>   scripts/kconfig/conf  --oldconfig Kconfig
>>   *
>>   * General setup
>>   *
>>
>>   Error in reading or end of file.
>>
>>   Error in reading or end of file.
>>   Hex config without default (HEX_TEST) [] (NEW)
>>
>>   Error in reading or end of file.
>>   Hex config without default (HEX_TEST) [] (NEW)
>>   # This loops forever
>>
>> NB: Scripted config manipulation often call make with /dev/null as
>> stdin (Yocto recipe, CI build, ...)
>>
>> This was discovered when working on Yocto bug:
>> https://bugzilla.yoctoproject.org/show_bug.cgi?id=14136

Hi Tom,

> I'm surprised this was accepted. In the past I've wanted to avoid this
> kind of change in Kconfig because while the empty string can be easily
> be checked in the code as "user didn't really configure this, do
> nothing" a value of zero is a valid option in these cases and so then in
> the code we need a bool symbol to decide if the hex/int symbol is set or
> not.

For context (and what it's worth), before this patch was merged, I've tried to 
fix this problem with a patch of my own which only exited the config process 
when the infinite loop would start:
"[PATCH v4] kconfig: avoid an infinite loop in oldconfig/syncconfig" [0]
... the v5 version was a bit more severe and exited as soon as an error was 
hit, it was then removed from -next because it triggered a build failure [1].

> Today this is less of an issue than it used to be in U-Boot with
> everything CONFIG-related migrated to Kconfig and so there's no longer
> the question of if we missed migrating a file that defined the value but
> there's still places we have in the code where hex symbol is undefined
> is not the same thing as hex symbol is 0x0.
> 
> Is there a specific use case you have for this in U-Boot? It's been a
> while, but it's also been cases of newly introduced symbols in Kconfig
> files with incorrect dependencies, where the infinite loop in kconfig
> happened, CI failed and we caught the problem.

For a specific example, one can trigger this with CMD_PSTORE_MEM_ADDR like this 
(tested on today's master):
  make qemu_arm64_defconfig
  make menuconfig
   # activate CONFIG_CMD_PSTORE=y but forget to fill CMD_PSTORE_MEM_ADDR
  make < /dev/null # This emulates a Yocto/scripted/CI build and loops 
infinitely

But, my more general use case is the Yocto dev trying to change the U-Boot (or 
any kconfig based software) config and accidentally trigger this.
In Yocto, what they will see is a do_configure task taking a very long time but 
they won't see the looping logs the detect the problem (This is caught later by 
filing the RAM and the build process is killed by OOM, or the disk run out of 
space filed multi-GB log files).

I'm sadly aware that defining a default value for this kind of config (fixed 
addresses) is not really sensible but the build time infinite loop is not good 
either.

Thanks!

Regards,

[0]: https://lore.kernel.org/lkml/2023103647.111093-1-yoann.con...@smile.fr/
[1]: 
https://lore.kernel.org/lkml/20231107210004.GA2065849@dev-arch.thelio-3990X/
-- 
Yoann Congal
Smile ECS - Tech Expert

Re: [PATCH] configs: Make USB_GADGET_MANUFACTURER consistent over all PHYTEC boards

[Fabio Estevam]

Hi Benjamin,

On Mon, May 6, 2024 at 7:52 AM Benjamin Hahn  wrote:

> We are not registered at USB-IF and therefore don't have a valid
> VENDOR_NUM and PRODUCT_NUM, so we rely on the VENDOR_NUM and PRODUCT_NUM
> of the SoC Vendor, so the correct features get enabled by the driver.

Ok, understood.

Reviewed-by: Fabio Estevam 

Re: [PATCH v2 2/2] armv8: generic_timer: Use event stream for udelay

[Andre Przywara]

On Wed,  1 May 2024 09:16:33 +0100
Peter Hoyes  wrote:

Hi Peter,

thanks for the change!

> From: Peter Hoyes 
> 
> Polling cntpct_el0 in a tight loop for delays is inefficient.
> This is particularly apparent on Arm FVPs, which do not simulate
> real time, meaning that a 1s sleep can take a couple of orders
> of magnitude longer to execute in wall time.
> 
> If running at EL2 or above (where CNTHCTL_EL2 is available), enable
> the cntpct_el0 event stream temporarily and use wfe to implement
> the delay more efficiently. The event period is chosen as a
> trade-off between efficiency and the fact that Arm FVPs do not
> typically simulate real time.
> 
> This is only implemented for Armv8 boards, where an architectural
> timer exists, and only enabled by default for the ARCH_VEXPRESS64
> board family.

I think total_compute would benefit from this change as well, but this
needs some testing and can easily be a separate patch.

> Signed-off-by: Peter Hoyes 

Reviewed-by: Andre Przywara 

Cheers,
Andre

> ---
>  arch/arm/cpu/armv8/Kconfig |  8 
>  arch/arm/cpu/armv8/generic_timer.c | 27 +++
>  arch/arm/include/asm/system.h  |  6 --
>  3 files changed, 39 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
> index 9f0fb369f7..199335cd60 100644
> --- a/arch/arm/cpu/armv8/Kconfig
> +++ b/arch/arm/cpu/armv8/Kconfig
> @@ -191,6 +191,14 @@ config ARMV8_EA_EL3_FIRST
> Exception handling at all exception levels for External Abort
> and SError interrupt exception are taken in EL3.
>  
> +config ARMV8_UDELAY_EVENT_STREAM
> + bool "Use the event stream for udelay"
> + default y if ARCH_VEXPRESS64
> + help
> +   Use the event stream provided by the AArch64 architectural
> timer for
> +   delays. This is more efficient than the default polling
> +   implementation.
> +
>  menuconfig ARMV8_CRYPTO
>   bool "ARM64 Accelerated Cryptographic Algorithms"
>  
> diff --git a/arch/arm/cpu/armv8/generic_timer.c
> b/arch/arm/cpu/armv8/generic_timer.c index 8f83372cbc..e18b5c8187 100644
> --- a/arch/arm/cpu/armv8/generic_timer.c
> +++ b/arch/arm/cpu/armv8/generic_timer.c
> @@ -115,3 +115,30 @@ ulong timer_get_boot_us(void)
>  
>   return val / get_tbclk();
>  }
> +
> +#if CONFIG_IS_ENABLED(ARMV8_UDELAY_EVENT_STREAM)
> +void __udelay(unsigned long usec)
> +{
> + u64 target = get_ticks() + usec_to_tick(usec);
> +
> + /* At EL2 or above, use the event stream to avoid polling
> CNTPCT_EL0 so often */
> + if (current_el() >= 2) {
> + u32 cnthctl_val;
> + const u8 event_period = 0x7;
> +
> + asm volatile("mrs %0, cnthctl_el2" : "=r"
> (cnthctl_val));
> + asm volatile("msr cnthctl_el2, %0" : : "r"
> + (cnthctl_val | CNTHCTL_EL2_EVNT_EN |
> CNTHCTL_EL2_EVNT_I(event_period))); +
> + while (get_ticks() + (1ULL << event_period) <= target)
> + wfe();
> +
> + /* Reset the event stream */
> + asm volatile("msr cnthctl_el2, %0" : : "r"
> (cnthctl_val));
> + }
> +
> + /* Fall back to polling CNTPCT_EL0 */
> + while (get_ticks() <= target)
> + ;
> +}
> +#endif
> diff --git a/arch/arm/include/asm/system.h
> b/arch/arm/include/asm/system.h index 51123c2968..7e30cac32a 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -69,8 +69,10 @@
>  /*
>   * CNTHCTL_EL2 bits definitions
>   */
> -#define CNTHCTL_EL2_EL1PCEN_EN   (1 << 1)  /* Physical timer regs
> accessible   */ -#define CNTHCTL_EL2_EL1PCTEN_EN  (1 << 0)  /*
> Physical counter accessible  */ +#define CNTHCTL_EL2_EVNT_EN
> BIT(2) /* Enable the event stream   */ +#define
> CNTHCTL_EL2_EVNT_I(val)   ((val) << 4) /* Event stream trigger bits
> */ +#define CNTHCTL_EL2_EL1PCEN_EN(1 << 1) /* Physical
> timer regs accessible */ +#define CNTHCTL_EL2_EL1PCTEN_EN (1 <<
> 0) /* Physical counter accessible   */ /*
>   * HCR_EL2 bits definitions

[RFC PATCH 5/5] sysreset: call .on_reset for UCLASS_SPI_FLASH before reset request

[Robert Marko]

Call .on_reset method for UCLASS_SPI_FLASH devices before requesting
reset.

This fixes the issue with 4-byte adressing mode being left enabled on
board reset.
That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash
to be in 3-byte adressing mode and will just hang otherwise.

Note that this does not fix a case where you remove the power while U-Boot
is still running and in that case it will still be stuck in 4-byte mode.

Signed-off-by: Robert Marko 
---
 drivers/sysreset/sysreset-uclass.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/sysreset/sysreset-uclass.c 
b/drivers/sysreset/sysreset-uclass.c
index 6151b5fe03..8321cc4230 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -30,6 +30,13 @@ int sysreset_request(struct udevice *dev, enum sysreset_t 
type)
if (!ops->request)
return -ENOSYS;
 
+   /*
+* Call the .on_reset op for SPI flash devices.
+* This is required for most devices in order to exit the
+* 4-byte adressing mode.
+*/
+   uclass_id_on_reset(UCLASS_SPI_FLASH);
+
return ops->request(dev, type);
 }
 
-- 
2.45.0

[RFC PATCH 4/5] mtd: spi: sf: implement .on_reset method

[Robert Marko]

Implement .on_reset method for SPI flash, by extending the remove method
to exit 4-byte adressing mode in case it was entered before.

This fixes the issue with 4-byte adressing mode being left enabled on
board reset.
That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash
to be in 3-byte adressing mode and will just hang otherwise.

Note that this does not fix a case where you remove the power while U-Boot
is still running and in that case it will still be stuck in 4-byte mode.

Signed-off-by: Robert Marko 
---
 drivers/mtd/spi/sf_probe.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index de6516f106..31dae17ba0 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -225,6 +225,15 @@ static int spi_flash_std_remove(struct udevice *dev)
struct spi_flash *flash = dev_get_uclass_priv(dev);
int ret;
 
+   if (flash->addr_width == 4 &&
+   !(flash->info->flags & SPI_NOR_OCTAL_DTR_READ) &&
+   (JEDEC_MFR(flash->info) != SNOR_MFR_SPANSION) &&
+   !(flash->flags & SNOR_F_4B_OPCODES)) {
+   ret = spi_nor_set_4byte(flash, flash->info, 0);
+   if (ret)
+   return ret;
+   }
+
if (CONFIG_IS_ENABLED(SPI_DIRMAP)) {
spi_mem_dirmap_destroy(flash->dirmap.wdesc);
spi_mem_dirmap_destroy(flash->dirmap.rdesc);
@@ -258,6 +267,7 @@ U_BOOT_DRIVER(jedec_spi_nor) = {
.of_match   = spi_flash_std_ids,
.probe  = spi_flash_std_probe,
.remove = spi_flash_std_remove,
+   .on_reset   = spi_flash_std_remove,
.priv_auto  = sizeof(struct spi_nor),
.ops= _flash_std_ops,
.flags  = DM_FLAG_OS_PREPARE,
-- 
2.45.0

[RFC PATCH 3/5] mtd: spi-nor: rename and export 4-byte adressing mode function

[Robert Marko]

Currently 4-byte adressing mode function is not exported, but since we plan
to use it outside of the SPI NOR core we need to export it.

While we are here, rename it to align the naming with the rest of exported
functions.

Signed-off-by: Robert Marko 
---
 drivers/mtd/spi/spi-nor-core.c |  7 +++
 include/linux/mtd/spi-nor.h| 10 ++
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 8882b045ce..8a64ee40c3 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -682,8 +682,7 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
 #endif /* !CONFIG_SPI_FLASH_BAR */
 
 /* Enable/disable 4-byte addressing mode. */
-static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
-int enable)
+int spi_nor_set_4byte(struct spi_nor *nor, const struct flash_info *info, int 
enable)
 {
int status;
bool need_wren = false;
@@ -3481,7 +3480,7 @@ static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
 */
if (params->size > SZ_128M) {
if (bfpt->dwords[BFPT_DWORD(16)] & BFPT_DWORD16_EX4B_PWRCYC) {
-   ret = set_4byte(nor, nor->info, 1);
+   ret = spi_nor_set_4byte(nor, nor->info, 1);
if (ret)
return ret;
}
@@ -3915,7 +3914,7 @@ static int spi_nor_init(struct spi_nor *nor)
 */
if (nor->flags & SNOR_F_BROKEN_RESET)
debug("enabling reset hack; may not recover from 
unexpected reboots\n");
-   set_4byte(nor, nor->info, 1);
+   spi_nor_set_4byte(nor, nor->info, 1);
}
 
return 0;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 80e56cf308..94c0e5e98f 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -646,6 +646,16 @@ static inline int spi_nor_remove(struct spi_nor *nor)
  * Return: 0 for success, -errno for failure.
  */
 int spi_nor_remove(struct spi_nor *nor);
+
+/**
+ * spi_nor_set_4byte() - perform cleanup before booting to the next stage
+ * @nor:   the spi_nor structure
+ * @flash_info:the flash_info structure
+ * @enable:enable or disable 4byte mode
+ *
+ * Return: 0 for success, -errno for failure.
+ */
+int spi_nor_set_4byte(struct spi_nor *nor, const struct flash_info *info, int 
enable);
 #endif
 
 #endif
-- 
2.45.0

[RFC PATCH 1/5] dm: core: add on_reset method

[Robert Marko]

Currently, we dont have a specific method that is intented to be called
right before calling board reset.

Intention for this method is to be able to exit 4-byte adressing mode on
SPI-NOR devices before reset.

Signed-off-by: Robert Marko 
---
 include/dm/device.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/dm/device.h b/include/dm/device.h
index add67f9ec0..19713d958c 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -344,6 +344,7 @@ struct udevice_id {
  * @probe: Called to probe a device, i.e. activate it
  * @remove: Called to remove a device, i.e. de-activate it
  * @unbind: Called to unbind a device from its driver
+ * @on_reset: Called befora calling board reset
  * @of_to_plat: Called before probe to decode device tree data
  * @child_post_bind: Called after a new child has been bound
  * @child_pre_probe: Called before a child device is probed. The device has
@@ -379,6 +380,7 @@ struct driver {
int (*probe)(struct udevice *dev);
int (*remove)(struct udevice *dev);
int (*unbind)(struct udevice *dev);
+   int (*on_reset)(struct udevice *dev);
int (*of_to_plat)(struct udevice *dev);
int (*child_post_bind)(struct udevice *dev);
int (*child_pre_probe)(struct udevice *dev);
-- 
2.45.0

[RFC PATCH 2/5] dm: core: introduce uclass_id_on_reset()

[Robert Marko]

Implement a helper to call .on_reset method for every device in a
certain uclass.

Intention is to use this helper for UCLASS_SPI_FLASH before board
reset to exit 4-byte adressing mode.

Signed-off-by: Robert Marko 
---
 drivers/core/uclass.c | 13 +
 include/dm/uclass.h   |  8 
 2 files changed, 21 insertions(+)

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index e46d5717aa..bed5553d5e 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -831,6 +831,19 @@ int uclass_id_count(enum uclass_id id)
return count;
 }
 
+int uclass_id_on_reset(enum uclass_id id)
+{
+   struct udevice *dev;
+   struct uclass *uc;
+
+   uclass_id_foreach_dev(id, dev, uc) {
+   if (dev->driver->on_reset)
+   return dev->driver->on_reset(dev);
+   }
+
+   return 0;
+}
+
 UCLASS_DRIVER(nop) = {
.id = UCLASS_NOP,
.name   = "nop",
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 456eef7f2f..57eb1b144f 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -454,6 +454,14 @@ int uclass_probe_all(enum uclass_id id);
  */
 int uclass_id_count(enum uclass_id id);
 
+/**
+ * uclass_id_on_reset() - call on_reset for devices of a given uclass ID
+ *
+ * @id: uclass ID to look up
+ * Return: 0 if OK, other -ve on error
+ */
+int uclass_id_on_reset(enum uclass_id id);
+
 /**
  * uclass_id_foreach_dev() - iterate through devices of a given uclass ID
  *
-- 
2.45.0

[RFC PATCH 0/5] Implement exiting 4-byte adressing mode before reset

[Robert Marko]

This fixes the issue with 4-byte adressing mode being left enabled on
board reset.
That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash
to be in 3-byte adressing mode and will just hang otherwise.

Note that this does not fix a case where you remove the power while U-Boot
is still running and in that case it will still be stuck in 4-byte mode.

Robert Marko (5):
  dm: core: add on_reset method
  dm: core: introduce uclass_id_on_reset()
  mtd: spi-nor: rename and export 4-byte adressing mode function
  mtd: spi: sf: implement .on_reset method
  sysreset: call .on_reset for UCLASS_SPI_FLASH before reset request

 drivers/core/uclass.c  | 13 +
 drivers/mtd/spi/sf_probe.c | 10 ++
 drivers/mtd/spi/spi-nor-core.c |  7 +++
 drivers/sysreset/sysreset-uclass.c |  7 +++
 include/dm/device.h|  2 ++
 include/dm/uclass.h|  8 
 include/linux/mtd/spi-nor.h| 10 ++
 7 files changed, 53 insertions(+), 4 deletions(-)

-- 
2.45.0

[PATCH v2 1/1] net: dwc_eth_qos: mdio: Implement clause 45

[Philip Oberfichtner]

Bevor this commit, only clause 22 access was possible. After this commit,
clause 45 direct access will available as well.

Note that there is a slight change of behavior: Before this commit, the
C45E bit was set to whatever value was left in the register from the
previous access. After this commit, we adopt the common practice of
discerning C45 from C22 using the devad argument.

Signed-off-by: Philip Oberfichtner 
---

Notes:
Attention: There is a slight change of behavior introduced by this
commit (see commit message). Please test and review if this works for
everybody.

My implementation is tested on an Intel Elkhart lake SOC, patch
submitted here:

https://patchwork.ozlabs.org/project/uboot/list/?series=405358

Changes in V2:
- Use FIELD_PREP() instead of manual '<<' shifting
- Fix whitespace errors

 drivers/net/dwc_eth_qos.c | 66 ++-
 drivers/net/dwc_eth_qos.h |  9 +++---
 2 files changed, 49 insertions(+), 26 deletions(-)

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index cb329e0cef..6bc9b8fca4 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -51,6 +51,7 @@
 #include 
 #include 
 #endif
+#include 
 #include 
 #include 
 
@@ -184,6 +185,25 @@ static int eqos_mdio_wait_idle(struct eqos_priv *eqos)
 100, true);
 }
 
+/* Bitmask common for mdio_read and mdio_write */
+#define EQOS_MDIO_BITFIELD(pa, rda, cr) \
+   FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_PA_MASK, pa)   | \
+   FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_RDA_MASK, rda) | \
+   FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_CR_MASK, cr)   | \
+   EQOS_MAC_MDIO_ADDRESS_GB
+
+static u32 eqos_mdio_bitfield(struct eqos_priv *eqos, int addr, int devad, int 
reg)
+{
+   int cr = eqos->config->config_mac_mdio;
+   bool c22 = devad == MDIO_DEVAD_NONE ? true : false;
+
+   if (c22)
+   return EQOS_MDIO_BITFIELD(addr, reg, cr);
+   else
+   return EQOS_MDIO_BITFIELD(addr, devad, cr) |
+  EQOS_MAC_MDIO_ADDRESS_C45E;
+}
+
 static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
  int mdio_reg)
 {
@@ -201,15 +221,17 @@ static int eqos_mdio_read(struct mii_dev *bus, int 
mdio_addr, int mdio_devad,
}
 
val = readl(>mac_regs->mdio_address);
-   val &= EQOS_MAC_MDIO_ADDRESS_SKAP |
-   EQOS_MAC_MDIO_ADDRESS_C45E;
-   val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) |
-   (mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) |
-   (eqos->config->config_mac_mdio <<
-EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) |
-   (EQOS_MAC_MDIO_ADDRESS_GOC_READ <<
-EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) |
-   EQOS_MAC_MDIO_ADDRESS_GB;
+   val &= EQOS_MAC_MDIO_ADDRESS_SKAP;
+
+   val |= eqos_mdio_bitfield(eqos, mdio_addr, mdio_devad, mdio_reg) |
+  FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_GOC_MASK,
+ EQOS_MAC_MDIO_ADDRESS_GOC_READ);
+
+   if (val & EQOS_MAC_MDIO_ADDRESS_C45E) {
+   writel(FIELD_PREP(EQOS_MAC_MDIO_DATA_RA_MASK, mdio_reg),
+  >mac_regs->mdio_data);
+   }
+
writel(val, >mac_regs->mdio_address);
 
udelay(eqos->config->mdio_wait);
@@ -232,7 +254,8 @@ static int eqos_mdio_write(struct mii_dev *bus, int 
mdio_addr, int mdio_devad,
   int mdio_reg, u16 mdio_val)
 {
struct eqos_priv *eqos = bus->priv;
-   u32 val;
+   u32 v_addr;
+   u32 v_data;
int ret;
 
debug("%s(dev=%p, addr=%x, reg=%d, val=%x):\n", __func__, eqos->dev,
@@ -244,20 +267,19 @@ static int eqos_mdio_write(struct mii_dev *bus, int 
mdio_addr, int mdio_devad,
return ret;
}
 
-   writel(mdio_val, >mac_regs->mdio_data);
+   v_addr = readl(>mac_regs->mdio_address);
+   v_addr &= EQOS_MAC_MDIO_ADDRESS_SKAP;
 
-   val = readl(>mac_regs->mdio_address);
-   val &= EQOS_MAC_MDIO_ADDRESS_SKAP |
-   EQOS_MAC_MDIO_ADDRESS_C45E;
-   val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) |
-   (mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) |
-   (eqos->config->config_mac_mdio <<
-EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) |
-   (EQOS_MAC_MDIO_ADDRESS_GOC_WRITE <<
-EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) |
-   EQOS_MAC_MDIO_ADDRESS_GB;
-   writel(val, >mac_regs->mdio_address);
+   v_addr |= eqos_mdio_bitfield(eqos, mdio_addr, mdio_devad, mdio_reg) |
+  FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_GOC_MASK,
+ EQOS_MAC_MDIO_ADDRESS_GOC_WRITE);
+
+   v_data = mdio_val;
+   if (v_addr & EQOS_MAC_MDIO_ADDRESS_C45E)
+   v_data |= FIELD_PREP(EQOS_MAC_MDIO_DATA_RA_MASK, mdio_reg);
 
+   writel(v_data, >mac_regs->mdio_data);
+   writel(v_addr, 

Re: [PATCH v5 5/6] beagleplay: Add DFU support

[Mattijs Korpershoek]

Hi Martyn,

Thank you for the patch, and for taking over this series.

On lun., mai 06, 2024 at 15:38, Martyn Welch  wrote:

> From: Sjoerd Simons 
>
> DFU mode on a beagleplay can be used via the Type-C connector by holding
> the USR switch while powering on.
>
> Configuration is already provided as fragments for both the A53 and R5
> u-boot parts. Include the am62x_a53_usbdfu.config config. The
> am62x_r5_usbdfu.config fragment needs to be added should DFU boot be
> required as this will disable booting from persistent storage due to
> binary size constraints.
>
> Signed-off-by: Sjoerd Simons 
> Signed-off-by: Martyn Welch 

Reviewed-by: Mattijs Korpershoek 

I've tested usb gadget on Beagle Play board using fastboot.
Also tested DFU mode via snagboot.

Tested-by: Mattijs Korpershoek 

> ---
> Changes in v5:
> - Use existing config fragment for a53 DFU configuration
> - Force usb0 into peripheral mode
>
> Changes in v4:
> - New patch
>
>  arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 9 +
>  board/beagle/beagleplay/beagleplay.env   | 1 +
>  configs/am62x_beagleplay_a53_defconfig   | 2 ++
>  3 files changed, 12 insertions(+)
>
> diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi 
> b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> index fb2032068d..967a2bdcd1 100644
> --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> @@ -54,6 +54,15 @@
>   >;
>  };
>  
> + {
> + bootph-all;
> +};
> +
> + {
> + dr_mode = "peripheral";
> + bootph-all;
> +};
> +
>  #ifdef CONFIG_TARGET_AM625_A53_BEAGLEPLAY
>  
>  #define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
> diff --git a/board/beagle/beagleplay/beagleplay.env 
> b/board/beagle/beagleplay/beagleplay.env
> index bbf6b925d0..8dbfc2f7d2 100644
> --- a/board/beagle/beagleplay/beagleplay.env
> +++ b/board/beagle/beagleplay/beagleplay.env
> @@ -1,5 +1,6 @@
>  #include 
>  #include 
> +#include 
>  
>  name_kern=Image
>  console=ttyS2,115200n8
> diff --git a/configs/am62x_beagleplay_a53_defconfig 
> b/configs/am62x_beagleplay_a53_defconfig
> index 4f1be1df59..ec62670d55 100644
> --- a/configs/am62x_beagleplay_a53_defconfig
> +++ b/configs/am62x_beagleplay_a53_defconfig
> @@ -121,3 +121,5 @@ CONFIG_EXT4_WRITE=y
>  CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
>  CONFIG_LZO=y
>  CONFIG_EFI_SET_TIME=y
> +
> +#include 
> -- 
> 2.43.0

[PATCH v1] board: nuvoton: Use an event to replace last_stage_init() and fix build error

[Jim Liu]

Followed the new style use event to replace last_stage_init().
Fixed build error After replace last_stage_init().
And remove CONFIG_SYS_SKIP_UART_INIT from defconfig,
system will reuse the setting from bootblock
and skip the baud rate setting.

Signed-off-by: Jim Liu 
---
 board/nuvoton/arbel_evb/arbel_evb.c | 7 +--
 board/nuvoton/common/Makefile   | 2 +-
 board/nuvoton/poleg_evb/poleg_evb.c | 6 +-
 configs/arbel_evb_defconfig | 1 -
 4 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/board/nuvoton/arbel_evb/arbel_evb.c 
b/board/nuvoton/arbel_evb/arbel_evb.c
index 53c931c3c2..d112329dc1 100644
--- a/board/nuvoton/arbel_evb/arbel_evb.c
+++ b/board/nuvoton/arbel_evb/arbel_evb.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include "../common/uart.h"
@@ -95,9 +96,11 @@ int dram_init_banksize(void)
return 0;
 }
 
-int last_stage_init(void)
+static int last_stage_init(void)
 {
+#if CONFIG_IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT)
board_set_console();
-
+#endif
return 0;
 }
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
diff --git a/board/nuvoton/common/Makefile b/board/nuvoton/common/Makefile
index 8fd83b229b..3ba494e900 100644
--- a/board/nuvoton/common/Makefile
+++ b/board/nuvoton/common/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_SYS_SKIP_UART_INIT)   += uart.o
+obj-y  += uart.o
diff --git a/board/nuvoton/poleg_evb/poleg_evb.c 
b/board/nuvoton/poleg_evb/poleg_evb.c
index e69bca9503..0710f31959 100644
--- a/board/nuvoton/poleg_evb/poleg_evb.c
+++ b/board/nuvoton/poleg_evb/poleg_evb.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -49,7 +50,7 @@ int dram_init(void)
return 0;
 }
 
-int last_stage_init(void)
+static int last_stage_init(void)
 {
 
char value[32];
@@ -69,8 +70,11 @@ int last_stage_init(void)
}
sprintf(value, "ttyS%d,115200n8", dev->seq_);
env_set("console", value);
+#if CONFIG_IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT)
board_set_console();
+#endif
}
 
return 0;
 }
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig
index 08753aebc0..59652a154e 100644
--- a/configs/arbel_evb_defconfig
+++ b/configs/arbel_evb_defconfig
@@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm845-evb"
 CONFIG_DM_RESET=y
 # CONFIG_PSCI_RESET is not set
 CONFIG_ARCH_NPCM8XX=y
-CONFIG_SYS_SKIP_UART_INIT=y
 CONFIG_TARGET_ARBEL_EVB=y
 CONFIG_SYS_LOAD_ADDR=0x06208000
 CONFIG_ENV_ADDR=0x803C
-- 
2.25.1

Re: [PATCH v5 4/6] configs: am62x_evm_*: Enable USB and DFU support

[Mattijs Korpershoek]

Hi Martyn,

Thank you for the patch.

On lun., mai 06, 2024 at 15:38, Martyn Welch  wrote:

> From: Sjoerd Simons 
>
> Provide config fragments to enable USB host as well as USB gadget and DFU
> support for a53 and r5. This relevant fragment is included into the
> am62x EVM a53 defconfig. For the r5, due to the smaller available size,
> the config fragment also disables support for persistent storage to free
> up space for USB support. This fragment needs to be included is DFU
> booting is desired.
>
> The CONFIG_DFU_SF option is placed in the defconfig rather than the
> fragment as this is known not to be supported on all boards that can
> support DFU.
>
> Signed-off-by: Sjoerd Simons 
> Signed-off-by: Martyn Welch 

Reviewed-by: Mattijs Korpershoek 

> ---
> Changes in v5:
> - Switch to config fragment for a53 most DFU configuration
>
> Changes in v4:
> - Move R5 dfu config to a config fragment rather then a full defconfig
> - Don't enable XHCI for the R5 SPL, unneeded
>
> Changes in v3:
> - Run savedefconfig to adjust to more recent u-boot
>
> Changes in v2:
> - Create a seperate defconfig for R5
>
>
>
>  configs/am62x_a53_usbdfu.config | 30 ++
>  configs/am62x_evm_a53_defconfig |  2 ++
>  configs/am62x_r5_usbdfu.config  | 28 
>  3 files changed, 60 insertions(+)
>  create mode 100644 configs/am62x_a53_usbdfu.config
>  create mode 100644 configs/am62x_r5_usbdfu.config
>
> diff --git a/configs/am62x_a53_usbdfu.config b/configs/am62x_a53_usbdfu.config
> new file mode 100644
> index 00..3a19cf2328
> --- /dev/null
> +++ b/configs/am62x_a53_usbdfu.config
> @@ -0,0 +1,29 @@
> +CONFIG_SYS_MALLOC_LEN=0x200
> +CONFIG_SPL_ENV_SUPPORT=y
> +CONFIG_SPL_RAM_SUPPORT=y
> +CONFIG_SPL_RAM_DEVICE=y
> +CONFIG_SPL_USB_GADGET=y
> +CONFIG_SPL_DFU=y
> +CONFIG_CMD_DFU=y
> +CONFIG_CMD_USB=y
> +CONFIG_SYSCON=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
> +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80
> +CONFIG_USB=y
> +CONFIG_DM_USB_GADGET=y
> +CONFIG_SPL_DM_USB_GADGET=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_DWC3=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_SPL_USB_DWC3_GENERIC=y
> +CONFIG_SPL_USB_DWC3_AM62=y
> +CONFIG_USB_DWC3_AM62=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
> +CONFIG_USB_GADGET_DOWNLOAD=y
> diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
> index 6c708dcb05..16294a6a79 100644
> --- a/configs/am62x_evm_a53_defconfig
> +++ b/configs/am62x_evm_a53_defconfig
> @@ -68,6 +68,7 @@ CONFIG_SPL_OF_TRANSLATE=y
>  CONFIG_CLK=y
>  CONFIG_SPL_CLK=y
>  CONFIG_CLK_TI_SCI=y
> +CONFIG_DFU_SF=y
>  CONFIG_DMA_CHANNELS=y
>  CONFIG_TI_K3_NAVSS_UDMA=y
>  CONFIG_TI_SCI_PROTOCOL=y
> @@ -111,3 +112,5 @@ CONFIG_SPL_SYSRESET=y
>  CONFIG_SYSRESET_TI_SCI=y
>  CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
>  CONFIG_EFI_SET_TIME=y
> +
> +#include 
> diff --git a/configs/am62x_r5_usbdfu.config b/configs/am62x_r5_usbdfu.config
> new file mode 100644
> index 00..772bb2ab93
> --- /dev/null
> +++ b/configs/am62x_r5_usbdfu.config
> @@ -0,0 +1,28 @@
> +CONFIG_SPL_ENV_SUPPORT=y
> +CONFIG_SYSCON=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
> +CONFIG_MISC=y
> +CONFIG_USB=y
> +CONFIG_DM_USB_GADGET=y
> +CONFIG_SPL_DM_USB_GADGET=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_SPL_USB_DWC3_GENERIC=y
> +CONFIG_SPL_USB_DWC3_AM62=y
> +CONFIG_USB_GADGET=y
> +CONFIG_SPL_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_SPL_DFU=y
> +# CONFIG_SPL_MMC is not set
> +# CONFIG_SPL_FS_FAT is not set
> +# CONFIG_SPL_LIBDISK_SUPPORT is not set
> +# CONFIG_SPL_SPI is not set
> +# CONFIG_SPL_SYS_MALLOC is not set
> +# CONFIG_CMD_GPT is not set
> +# CONFIG_CMD_MMC is not set
> +# CONFIG_CMD_FAT is not set
> +# CONFIG_MMC_SDHCI is not set
> -- 
> 2.43.0

Re: [PATCH v5 3/6] arm: dts: k3-am625-sk: Enable usb port in u-boot

[Mattijs Korpershoek]

Hi Martyn,

Thank you for the patch.

On lun., mai 06, 2024 at 15:38, Martyn Welch  wrote:

> From: Sjoerd Simons 
>
> Enable usb0 in all boot phases for use with DFU
>
> Signed-off-by: Sjoerd Simons 
> Reviewed-by: Alexander Sverdlin 
> Signed-off-by: Martyn Welch 

Reviewed-by: Mattijs Korpershoek 

> ---
> Changes in v5:
> - Forcing usb0 into peripheral mode reinstated
>
> Changes in v4:
> - Don't force usb0 into peripheral mode
>
> Changes in v3:
> - Enable usb nodes in all boot phases
>
> Changes in v2:
> - Only enable usb port 0 DFU in SPL
>
>  arch/arm/dts/k3-am625-sk-u-boot.dtsi | 9 +
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi 
> b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> index fa778b0ff4..1fc0d407cb 100644
> --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> @@ -46,3 +46,12 @@
>  _port2 {
>   status = "disabled";
>  };
> +
> + {
> + bootph-all;
> +};
> +
> + {
> + dr_mode = "peripheral";
> + bootph-all;
> +};
> -- 
> 2.43.0

Pull request: u-boot-rockchip-20240507

[Kever Yang]

Hi Tom,

Please pull the updates for rockchip platform, this PR is mainly for:
- migrate to use OF_UPSTREAM for rv1108, rk3308, rk3328, rk356x, rk3588;

CI:
https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/20628

Thanks,
- Kever

The following changes since commit 52835266d3e933656a217233eaf672dd9ccd7352:

  Prepare v2024.07-rc2 (2024-05-06 13:54:17 -0600)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-rockchip.git 
tags/u-boot-rockchip-20240507

for you to fetch changes up to bc7cb4b67a4070129bbfc5bffb2f5e9fd206991e:

  configs: rk3588-turing-rk1: disable SPI flash by default (2024-05-07 15:56:10 
+0800)


Fabio Estevam (1):
  rockchip: rv1108: Convert to OF_UPSTREAM

Jonas Karlman (58):
  rockchip: rk3399-gru: Fix max SPL size on bob and kevin
  rockchip: rk3399-puma: Update SPL_PAD_TO Kconfig option
  rockchip: rk3399-puma: Use common bss and stack addresses
  rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
  rockchip: rk3399: Sort imply statements alphabetically
  rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
  rockchip: rk3399: Enable random generator on all boards
  rockchip: rk3399: Imply support for GbE PHY
  rockchip: rk3399: Enable DT overlay support on all boards
  rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options
  rockchip: rk3399: Add a default spl-boot-order prop
  rockchip: rk3399: Remove inherited bootph-all props
  rockchip: rk3399: Sort nodes in u-boot.dtsi files
  rockchip: rk3399: Fix bootph prop for vop nodes
  rockchip: rk3399-puma: Move uart0 bootph to board u-boot.dtsi
  rockchip: rk3399: Include uart related pinctrl nodes in TPL/SPL
  rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
  rockchip: rk3399: Configure sdmmc regulator pinctrl in SPL
  clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC
  clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
  clk: rockchip: rk3399: Improve support for SCLK_PCIEPHY_REF clock
  clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support
  rockchip: rk3399: Sync SoC DT from Linux kernel v6.8
  rockchip: rk3399-gru: Sync DT from Linux kernel v6.8
  rockchip: rk3399-puma: Sync DT from Linux kernel v6.8
  rockchip: rk3399-rock-pi-n10: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-eaidk-610: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-leez: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-evb: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-firefly: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-orangepi: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-roc-pc: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-nanopi-4: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-rock960: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-khadas: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-rock-pi-4: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-rockpro64: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-pinebook-pro: Sync DT from v6.8 and update defconfig
  rockchip: rk3399-pinephone-pro: Sync DT from v6.8 and update defconfig
  rockchip: rk3399: Drop ethernet0 alias from SoC u-boot.dtsi
  rockchip: rk3308: Migrate to OF_UPSTREAM
  rockchip: rk3308: Remove redundant device tree files
  rockchip: rk3328: Migrate to OF_UPSTREAM
  rockchip: rk3328: Remove redundant device tree files
  rockchip: rk3399: Migrate to OF_UPSTREAM
  rockchip: rk3399: Remove redundant device tree files
  rockchip: rk356x: Add rk3568-u-boot.dtsi
  rockchip: rk356x: Migrate to OF_UPSTREAM
  rockchip: rk356x: Remove redundant device tree files
  phy: rockchip: usbdp: Find phy-id from the io address
  phy: rockchip: usbdp: Drop rockchip_u3phy_uboot_init()
  phy: rockchip: usbdp: Adopt driver to work with upstream DT
  rockchip: rk3588-rock-5b: Drop usb-typec node from u-boot.dtsi
  rockchip: rk3588: Update USB3 related nodes in u-boot.dtsi
  rockchip: rk3588: Migrate to OF_UPSTREAM
  rockchip: rk3588: Remove redundant device tree files
  rockchip: rk3328: Add missing bootph-some-ram props
  clk: rockchip: rk3328: Add SCLK_USB3OTG_REF support

Sam Edwards (1):
  configs: rk3588-turing-rk1: disable SPI flash by default

 arch/arm/dts/Makefile  |   88 -
 arch/arm/dts/rk3288-vmarc-som.dtsi |   48 +
 arch/arm/dts/rk3308-evb.dts|  230 --
 arch/arm/dts/rk3308-roc-cc.dts |  190 --
 arch/arm/dts/rk3308-rock-pi-s.dts  |  314 --
 arch/arm/dts/rk3308.dtsi   | 1888 ---
 arch/arm/dts/rk3328-evb.dts

Re: [PATCH v5 4/6] configs: am62x_evm_*: Enable USB and DFU support

[Francesco Dolcini]

Hello Martyn,
first thanks for your series, with this we might be able to drop some
downstream branch.

On Mon, May 06, 2024 at 03:38:44PM +0100, Martyn Welch wrote:
> From: Sjoerd Simons 
> 
> Provide config fragments to enable USB host as well as USB gadget and DFU
> support for a53 and r5. This relevant fragment is included into the
> am62x EVM a53 defconfig. For the r5, due to the smaller available size,
> the config fragment also disables support for persistent storage to free
> up space for USB support. This fragment needs to be included is DFU
> booting is desired.
> 
> The CONFIG_DFU_SF option is placed in the defconfig rather than the
> fragment as this is known not to be supported on all boards that can
> support DFU.
> 
> Signed-off-by: Sjoerd Simons 
> Signed-off-by: Martyn Welch 

...

> diff --git a/configs/am62x_r5_usbdfu.config b/configs/am62x_r5_usbdfu.config
> new file mode 100644
> index 00..772bb2ab93
> --- /dev/null
> +++ b/configs/am62x_r5_usbdfu.config
> @@ -0,0 +1,28 @@

...

> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x6165

This is making this fragment TI _board_ specific, while the file name seems
to imply that this is generic for the TI SoC. Other vendors, using TI
SoCs, will likely want to use their own USB IDs.

Not a big deal and no need to change it, we'll handle this in our own
defconfig when we'll enable this, but I wanted to mention this.

Francesco

Re: [PATCH 060/149] board: firefly: Remove and add needed includes

[Kever Yang]

On 2024/5/1 10:41, Tom Rini wrote:

Remove  from this board vendor directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Cc: Simon Glass 
Cc: Philipp Tomsich 
Cc: Kever Yang 
Cc: Andy Yan 
Cc: Levin Du 
Cc: Suniel Mahesh 
---
  board/firefly/firefly-rk3288/firefly-rk3288.c | 1 -
  board/firefly/firefly-rk3308/roc_cc_rk3308.c  | 1 -
  board/firefly/roc-pc-rk3399/roc-pc-rk3399.c   | 1 -
  3 files changed, 3 deletions(-)

diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c 
b/board/firefly/firefly-rk3288/firefly-rk3288.c
index 95d8b00924d8..8e67ab4b1327 100644
--- a/board/firefly/firefly-rk3288/firefly-rk3288.c
+++ b/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2015 Google, Inc
   */
  
-#include 

  #include 
  #include 
  #include 
diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c 
b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
index af00250e118d..404bdc632bbc 100644
--- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c
+++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   */
  
-#include 

  #include 
  #include 
  #include 
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 590519b32af2..a149e4fe822e 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2016 Rockchip Electronics Co., Ltd
   */
  
-#include 

  #include 
  #include 
  #include 

Re: [PATCH 111/149] board: rockchip: Remove and add needed includes

[Kever Yang]

On 2024/5/1 10:42, Tom Rini wrote:

Remove  from this board vendor directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Cc: huang lin 
Cc: Simon Glass 
Cc: Philipp Tomsich 
Cc: Kever Yang 
Cc: Andy Yan 
Cc: Michael Trimarchi 
---
  arch/arm/include/asm/arch-rockchip/grf_rk3308.h | 2 ++
  board/rockchip/evb_rk3036/evb_rk3036.c  | 1 -
  board/rockchip/evb_rk3308/evb_rk3308.c  | 1 -
  board/rockchip/evb_rv1108/evb_rv1108.c  | 1 -
  board/rockchip/kylin_rk3036/kylin_rk3036.c  | 1 -
  board/rockchip/tinker_rk3288/tinker-rk3288.c| 1 -
  6 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h 
b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index a995bb950d97..f4bbc2401310 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -5,6 +5,8 @@
  #ifndef _ASM_ARCH_GRF_rk3308_H
  #define _ASM_ARCH_GRF_rk3308_H
  
+#include 

+
  struct rk3308_grf {
unsigned int gpio0a_iomux;
unsigned int reserved0;
diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c 
b/board/rockchip/evb_rk3036/evb_rk3036.c
index 8c606463e455..a0805030ea46 100644
--- a/board/rockchip/evb_rk3036/evb_rk3036.c
+++ b/board/rockchip/evb_rk3036/evb_rk3036.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2015 Rockchip Electronics Co., Ltd
   */
  
-#include 

  #include 
  #include 
  #include 
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c 
b/board/rockchip/evb_rk3308/evb_rk3308.c
index e0c96fd70a28..c895da934a99 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2018 Rockchip Electronics Co., Ltd
   */
  
-#include 

  #include 
  #include 
  
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c

index 0d7a486bed74..48b9d8f80c4b 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -4,7 +4,6 @@
   * Authors: Andy Yan 
   */
  
-#include 

  #include 
  #include 
  #include 
diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c 
b/board/rockchip/kylin_rk3036/kylin_rk3036.c
index 0ca91cdeb014..c452b131208d 100644
--- a/board/rockchip/kylin_rk3036/kylin_rk3036.c
+++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2015 Rockchip Electronics Co., Ltd
   */
  
-#include 

  #include 
  #include 
  #include 
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c 
b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index e6e75981c2d1..e966e9f201ab 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -3,7 +3,6 @@
   * (C) Copyright 2016 Rockchip Electronics Co., Ltd
   */
  
-#include 

  #include 
  #include 
  #include 

Re: [PATCH 32/81] fwu-mdata: Remove and add needed includes

[Ilias Apalodimas]

On Thu, 2 May 2024 at 04:32, Tom Rini  wrote:
>
> Remove  from this driver directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini 
> ---
> Cc: Tom Rini 
> Cc: Ilias Apalodimas 
> Cc: Jassi Brar 
> Cc: Etienne Carriere 
> ---
>  drivers/fwu-mdata/fwu-mdata-uclass.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/fwu-mdata/fwu-mdata-uclass.c 
> b/drivers/fwu-mdata/fwu-mdata-uclass.c
> index 0a8edaaa418f..bab7a7e80d1d 100644
> --- a/drivers/fwu-mdata/fwu-mdata-uclass.c
> +++ b/drivers/fwu-mdata/fwu-mdata-uclass.c
> @@ -5,7 +5,6 @@
>
>  #define LOG_CATEGORY UCLASS_FWU_MDATA
>
> -#include 
>  #include 
>  #include 
>  #include 
> --
> 2.34.1
>
Reviewed-by: Ilias Apalodimas 

Re: [PATCH 29/81] firmware: Remove and add needed includes

[Ilias Apalodimas]

On Thu, 2 May 2024 at 04:32, Tom Rini  wrote:
>
> Remove  from this driver directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini 
> ---
> Cc: Abdellatif El Khlifi 
> Cc: Tom Rini 
> Cc: Simon Glass 
> Cc: Michal Simek 
> Cc: Jens Wiklander 
> Cc: Ilias Apalodimas 
> Cc: Stefan Herbrechtsmeier 
> Cc: Venkatesh Yadav Abbarapu 
> Cc: Tanmay Shah 
> Cc: Ashok Reddy Soma 
> Cc: Weizhao Ouyang 
> Cc: AKASHI Takahiro 
> Cc: Etienne Carriere 
> ---
>  drivers/firmware/arm-ffa/arm-ffa-uclass.c| 1 -
>  drivers/firmware/arm-ffa/arm-ffa.c   | 1 -
>  drivers/firmware/arm-ffa/ffa-emul-uclass.c   | 1 -
>  drivers/firmware/arm-ffa/sandbox_ffa.c   | 1 -
>  drivers/firmware/firmware-sandbox.c  | 1 -
>  drivers/firmware/firmware-uclass.c   | 1 -
>  drivers/firmware/firmware-zynqmp.c   | 1 -
>  drivers/firmware/psci.c  | 1 -
>  drivers/firmware/scmi/base.c | 1 -
>  drivers/firmware/scmi/mailbox_agent.c| 1 -
>  drivers/firmware/scmi/optee_agent.c  | 1 -
>  drivers/firmware/scmi/sandbox-scmi_agent.c   | 1 -
>  drivers/firmware/scmi/sandbox-scmi_devices.c | 1 -
>  drivers/firmware/scmi/scmi_agent-uclass.c| 1 -
>  drivers/firmware/scmi/smccc_agent.c  | 1 -
>  drivers/firmware/scmi/smt.c  | 1 -
>  drivers/firmware/ti_sci.c| 1 -
>  17 files changed, 17 deletions(-)
>
> diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c 
> b/drivers/firmware/arm-ffa/arm-ffa-uclass.c
> index f1e91d151ea3..e0767fc75517 100644
> --- a/drivers/firmware/arm-ffa/arm-ffa-uclass.c
> +++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c
> @@ -5,7 +5,6 @@
>   * Authors:
>   *   Abdellatif El Khlifi 
>   */
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/arm-ffa/arm-ffa.c 
> b/drivers/firmware/arm-ffa/arm-ffa.c
> index ee0bf9a55b48..94e6105cb38e 100644
> --- a/drivers/firmware/arm-ffa/arm-ffa.c
> +++ b/drivers/firmware/arm-ffa/arm-ffa.c
> @@ -6,7 +6,6 @@
>   *   Abdellatif El Khlifi 
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/arm-ffa/ffa-emul-uclass.c 
> b/drivers/firmware/arm-ffa/ffa-emul-uclass.c
> index 4bf9f6041fec..1521d9b66ac3 100644
> --- a/drivers/firmware/arm-ffa/ffa-emul-uclass.c
> +++ b/drivers/firmware/arm-ffa/ffa-emul-uclass.c
> @@ -5,7 +5,6 @@
>   * Authors:
>   *   Abdellatif El Khlifi 
>   */
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/arm-ffa/sandbox_ffa.c 
> b/drivers/firmware/arm-ffa/sandbox_ffa.c
> index 11142429c09b..44b32a829ddf 100644
> --- a/drivers/firmware/arm-ffa/sandbox_ffa.c
> +++ b/drivers/firmware/arm-ffa/sandbox_ffa.c
> @@ -5,7 +5,6 @@
>   * Authors:
>   *   Abdellatif El Khlifi 
>   */
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/firmware-sandbox.c 
> b/drivers/firmware/firmware-sandbox.c
> index d970d75f781d..226b5cfc191e 100644
> --- a/drivers/firmware/firmware-sandbox.c
> +++ b/drivers/firmware/firmware-sandbox.c
> @@ -5,7 +5,6 @@
>   * Copyright (C) 2018 Xilinx, Inc.
>   */
>
> -#include 
>  #include 
>
>  static const struct udevice_id generic_sandbox_firmware_ids[] = {
> diff --git a/drivers/firmware/firmware-uclass.c 
> b/drivers/firmware/firmware-uclass.c
> index e83a147a000b..84caf25548be 100644
> --- a/drivers/firmware/firmware-uclass.c
> +++ b/drivers/firmware/firmware-uclass.c
> @@ -2,7 +2,6 @@
>
>  #define LOG_CATEGORY UCLASS_FIRMWARE
>
> -#include 
>  #include 
>
>  /* Firmware access is platform-dependent.  No generic code in uclass */
> diff --git a/drivers/firmware/firmware-zynqmp.c 
> b/drivers/firmware/firmware-zynqmp.c
> index dfad798a2e7d..f99507d86c61 100644
> --- a/drivers/firmware/firmware-zynqmp.c
> +++ b/drivers/firmware/firmware-zynqmp.c
> @@ -5,7 +5,6 @@
>   * Copyright (C) 2018-2019 Xilinx, Inc.
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
> index 03544d76ed4a..c32c3f5c6a54 100644
> --- a/drivers/firmware/psci.c
> +++ b/drivers/firmware/psci.c
> @@ -6,7 +6,6 @@
>   * Copyright (C) 2015 ARM Limited
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/scmi/base.c b/drivers/firmware/scmi/base.c
> index 1d41a8a98fc6..f4e3974ff5b4 100644
> --- a/drivers/firmware/scmi/base.c
> +++ b/drivers/firmware/scmi/base.c
> @@ -6,7 +6,6 @@
>   * author: AKASHI Takahiro 
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/scmi/mailbox_agent.c 
> b/drivers/firmware/scmi/mailbox_agent.c
> index 7ad3e8da9f08..6d4497f4b92a 100644
> --- a/drivers/firmware/scmi/mailbox_agent.c
> +++ b/drivers/firmware/scmi/mailbox_agent.c
> @@ -5,7 +5,6 @@
>
>  #define LOG_CATEGORY UCLASS_SCMI_AGENT
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/firmware/scmi/optee_agent.c 
> 

Re: [PATCH 71/81] tpm: Remove and add needed includes

[Ilias Apalodimas]

On Thu, 2 May 2024 at 04:34, Tom Rini  wrote:
>
> Remove  from this driver directory and when needed
> add missing include files directly.
>
> Signed-off-by: Tom Rini 
> ---
> Cc: Ilias Apalodimas 
> Cc: Tom Rini 
> Cc: Simon Glass 
> ---
>  drivers/tpm/cr50_i2c.c | 2 +-
>  drivers/tpm/sandbox_common.c   | 1 -
>  drivers/tpm/tpm-uclass.c   | 2 +-
>  drivers/tpm/tpm2_ftpm_tee.c| 1 -
>  drivers/tpm/tpm2_tis_core.c| 2 +-
>  drivers/tpm/tpm2_tis_i2c.c | 1 -
>  drivers/tpm/tpm2_tis_mmio.c| 1 -
>  drivers/tpm/tpm2_tis_sandbox.c | 1 -
>  drivers/tpm/tpm2_tis_spi.c | 2 +-
>  drivers/tpm/tpm_atmel_twi.c| 2 +-
>  drivers/tpm/tpm_tis_infineon.c | 2 +-
>  drivers/tpm/tpm_tis_lpc.c  | 1 -
>  drivers/tpm/tpm_tis_sandbox.c  | 1 -
>  drivers/tpm/tpm_tis_st33zp24_i2c.c | 1 -
>  drivers/tpm/tpm_tis_st33zp24_spi.c | 1 -
>  15 files changed, 6 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
> index acf4c7859a9f..08ec179346e2 100644
> --- a/drivers/tpm/cr50_i2c.c
> +++ b/drivers/tpm/cr50_i2c.c
> @@ -7,12 +7,12 @@
>
>  #define LOG_CATEGORY UCLASS_TPM
>
> -#include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/sandbox_common.c b/drivers/tpm/sandbox_common.c
> index 7e0b2502e35d..596e01563899 100644
> --- a/drivers/tpm/sandbox_common.c
> +++ b/drivers/tpm/sandbox_common.c
> @@ -7,7 +7,6 @@
>
>  #define LOG_CATEGORY   UCLASS_TPM
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
> index b2286f7e7edc..0fade2dcc0ad 100644
> --- a/drivers/tpm/tpm-uclass.c
> +++ b/drivers/tpm/tpm-uclass.c
> @@ -6,9 +6,9 @@
>
>  #define LOG_CATEGORY UCLASS_TPM
>
> -#include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm2_ftpm_tee.c b/drivers/tpm/tpm2_ftpm_tee.c
> index c61ff2c2af63..f2ced50c4eb7 100644
> --- a/drivers/tpm/tpm2_ftpm_tee.c
> +++ b/drivers/tpm/tpm2_ftpm_tee.c
> @@ -13,7 +13,6 @@
>   * 
> https://github.com/microsoft/ms-tpm-20-ref/tree/master/Samples/ARM32-FirmwareTPM/optee_ta/fTPM
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c
> index 81b9210056db..680a6409433e 100644
> --- a/drivers/tpm/tpm2_tis_core.c
> +++ b/drivers/tpm/tpm2_tis_core.c
> @@ -5,8 +5,8 @@
>   * Based on the Linux TIS core interface and U-Boot original SPI TPM driver
>   */
>
> -#include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm2_tis_i2c.c b/drivers/tpm/tpm2_tis_i2c.c
> index 99d1cf218daf..93efccc77575 100644
> --- a/drivers/tpm/tpm2_tis_i2c.c
> +++ b/drivers/tpm/tpm2_tis_i2c.c
> @@ -3,7 +3,6 @@
>   * Copyright 2022 IBM Corp.
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm2_tis_mmio.c b/drivers/tpm/tpm2_tis_mmio.c
> index a646ce41ff4e..dee5503c055f 100644
> --- a/drivers/tpm/tpm2_tis_mmio.c
> +++ b/drivers/tpm/tpm2_tis_mmio.c
> @@ -5,7 +5,6 @@
>   * Specifications at www.trustedcomputinggroup.org
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c
> index d15a28d9fc82..50e308e71161 100644
> --- a/drivers/tpm/tpm2_tis_sandbox.c
> +++ b/drivers/tpm/tpm2_tis_sandbox.c
> @@ -4,7 +4,6 @@
>   * Author: Miquel Raynal 
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
> index de9cf8f21e07..28079b5039a3 100644
> --- a/drivers/tpm/tpm2_tis_spi.c
> +++ b/drivers/tpm/tpm2_tis_spi.c
> @@ -13,11 +13,11 @@
>   * It is based on the U-Boot driver tpm_tis_infineon_i2c.c.
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm_atmel_twi.c b/drivers/tpm/tpm_atmel_twi.c
> index fd2a45d34b03..05dd66525c77 100644
> --- a/drivers/tpm/tpm_atmel_twi.c
> +++ b/drivers/tpm/tpm_atmel_twi.c
> @@ -5,11 +5,11 @@
>   * Written by Dirk Eibach 
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>
> diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
> index 16f4af0e331e..e2f6238cbc71 100644
> --- a/drivers/tpm/tpm_tis_infineon.c
> +++ b/drivers/tpm/tpm_tis_infineon.c
> @@ -19,11 +19,11 @@
>   * Version: 2.1.1
>   */
>
> -#include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c
> index 13a133d58ebd..dec7acb0c7b1 100644
> --- a/drivers/tpm/tpm_tis_lpc.c
> +++ b/drivers/tpm/tpm_tis_lpc.c
> @@ -12,7 +12,6 @@
>   * slb9635), so this driver provides access to locality 0 only.
>   */
>
> 

Re: [PATCH] usb: dwc2: Add in version 4xx compatibility

[Greg Malysa]

> >
> > If you have access to the hardware that has a 4.20a dwc2 controller,
> > maybe you can help testing the patch above patch as well?

My hardware unfortunately only has a 4.00a controller so I cannot test
the 4.20a reset functionality. However, Kongyang Liu's patch works for
me as a replacement for our submission and functions correctly
otherwise on our hardware, so I am fine with moving forward on his
patch. If that's meaningful enough I can add a tested by tag to the
other patch from me.

>
> +CC Liu on this thread, maybe it is best if the two of you figure out
> the best common approach that works for you both ?

I am also open to collaborating on any other changes as needed.

Re: [PATCH 103/149] board: phytec: Remove and add needed includes

[Teresa Remmet]

Am Dienstag, dem 30.04.2024 um 20:42 -0600 schrieb Tom Rini:
> Remove  from this board vendor directory and when needed
> add missing include files directly.
> 
> Signed-off-by: Tom Rini 

Acked-by: Teresa Remmet 

> ---
> Cc: Martyn Welch 
> Cc: Parthiban Nallathambi 
> Cc: "Albert ARIBAUD (3ADEV)" 
> Cc: Niel Fourie 
> Cc: Teresa Remmet 
> Cc: Wadim Egorov 
> Cc: Simon Glass 
> Cc: Philipp Tomsich 
> Cc: Kever Yang 
> Cc: Yannic Moog 
> Cc: Daniel Schultz 
> Cc: Benjamin Hahn 
> Cc: Fabio Estevam 
> ---
>  board/phytec/common/imx8m_som_detection.c    | 1 -
>  board/phytec/common/phytec_som_detection.c   | 1 -
>  board/phytec/pcl063/spl.c    | 2 +-
>  board/phytec/pcm052/pcm052.c | 1 -
>  board/phytec/pcm058/pcm058.c | 1 -
>  board/phytec/phycore_am335x_r2/board.c   | 2 +-
>  board/phytec/phycore_am335x_r2/mux.c | 1 -
>  board/phytec/phycore_imx8mm/phycore-imx8mm.c | 1 -
>  board/phytec/phycore_imx8mm/spl.c    | 1 -
>  board/phytec/phycore_imx8mp/phycore-imx8mp.c | 1 -
>  board/phytec/phycore_imx8mp/spl.c    | 1 -
>  board/phytec/phycore_rk3288/phycore-rk3288.c | 1 -
>  12 files changed, 2 insertions(+), 12 deletions(-)
> 
> diff --git a/board/phytec/common/imx8m_som_detection.c
> b/board/phytec/common/imx8m_som_detection.c
> index ee34a5b95791..bfd60ffb7773 100644
> --- a/board/phytec/common/imx8m_som_detection.c
> +++ b/board/phytec/common/imx8m_som_detection.c
> @@ -4,7 +4,6 @@
>   * Author: Teresa Remmet 
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/common/phytec_som_detection.c
> b/board/phytec/common/phytec_som_detection.c
> index 78c173df20d4..b14bb3dbb7fa 100644
> --- a/board/phytec/common/phytec_som_detection.c
> +++ b/board/phytec/common/phytec_som_detection.c
> @@ -4,7 +4,6 @@
>   * Author: Teresa Remmet 
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c
> index b6d459fdfce6..b98c46dbcbd4 100644
> --- a/board/phytec/pcl063/spl.c
> +++ b/board/phytec/pcl063/spl.c
> @@ -6,7 +6,7 @@
>   * Copyright (C) 2015-2016 Stefan Roese 
>   */
>  
> -#include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/pcm052/pcm052.c
> b/board/phytec/pcm052/pcm052.c
> index 0f7235979b04..20f2aac332da 100644
> --- a/board/phytec/pcm052/pcm052.c
> +++ b/board/phytec/pcm052/pcm052.c
> @@ -6,7 +6,6 @@
>   * Copyright 2013 Freescale Semiconductor, Inc.
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/pcm058/pcm058.c
> b/board/phytec/pcm058/pcm058.c
> index b37c6fe218da..ecc5b75d8d42 100644
> --- a/board/phytec/pcm058/pcm058.c
> +++ b/board/phytec/pcm058/pcm058.c
> @@ -9,7 +9,6 @@
>   * Both NAND and eMMC cannot be set because they share the
>   * same pins (SD4)
>   */
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/phycore_am335x_r2/board.c
> b/board/phytec/phycore_am335x_r2/board.c
> index 5700effbd3f6..2022525651dc 100644
> --- a/board/phytec/phycore_am335x_r2/board.c
> +++ b/board/phytec/phycore_am335x_r2/board.c
> @@ -10,7 +10,7 @@
>   * Copyright (C) 2019 DENX Software Engineering GmbH
>   */
>  
> -#include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/phycore_am335x_r2/mux.c
> b/board/phytec/phycore_am335x_r2/mux.c
> index 7091c985ba12..bb1c48da0fe5 100644
> --- a/board/phytec/phycore_am335x_r2/mux.c
> +++ b/board/phytec/phycore_am335x_r2/mux.c
> @@ -6,7 +6,6 @@
>   * Copyright (C) 2019 DENX Software Engineering GmbH
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/phycore_imx8mm/phycore-imx8mm.c
> b/board/phytec/phycore_imx8mm/phycore-imx8mm.c
> index ef6472916903..06cffbca3a69 100644
> --- a/board/phytec/phycore_imx8mm/phycore-imx8mm.c
> +++ b/board/phytec/phycore_imx8mm/phycore-imx8mm.c
> @@ -4,7 +4,6 @@
>   * Author: Teresa Remmet 
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/phycore_imx8mm/spl.c
> b/board/phytec/phycore_imx8mm/spl.c
> index 690a51f7a72e..8d858590a39b 100644
> --- a/board/phytec/phycore_imx8mm/spl.c
> +++ b/board/phytec/phycore_imx8mm/spl.c
> @@ -4,7 +4,6 @@
>   * Author: Teresa Remmet 
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> index dbdd6bb79373..35683591433c 100644
> --- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> +++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> @@ -4,7 +4,6 @@
>   * Author: Teresa Remmet 
>   */
>  
> -#include 
>  #include 
>  #include 
>  #include 
> diff --git a/board/phytec/phycore_imx8mp/spl.c
> b/board/phytec/phycore_imx8mp/spl.c
> index df158024654e..352f803e4541 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -4,7 +4,6 @@
>   * Author: Teresa Remmet 
>   */

Re: [PATCH 14/16] rockchip: rk3588: Update USB3 related nodes in u-boot.dtsi

[Kever Yang]

On 2024/5/5 03:43, Jonas Karlman wrote:

The USB3 related DT nodes in SoC u-boot.dtsi is slightly different from
the final nodes being targeted for Linux kernel v6.10.

Sync USB3 related nodes from Linux maintainer v6.10-rockchip-dts64-1 tag
to prepare for migration of RK3588 to use OF_UPSTREAM.

Signed-off-by: Jonas Karlman 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/dts/rk3588-generic-u-boot.dtsi |  4 ---
  arch/arm/dts/rk3588-rock-5b-u-boot.dtsi |  9 +--
  arch/arm/dts/rk3588-u-boot.dtsi | 36 +
  arch/arm/dts/rk3588s-u-boot.dtsi| 34 +--
  4 files changed, 26 insertions(+), 57 deletions(-)

diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi 
b/arch/arm/dts/rk3588-generic-u-boot.dtsi
index 225dfa0b682a..f67301d87a6e 100644
--- a/arch/arm/dts/rk3588-generic-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi
@@ -14,10 +14,6 @@
status = "okay";
  };
  
-_phy0_u3 {

-   status = "okay";
-};
-
  _host0_xhci {
dr_mode = "peripheral";
maximum-speed = "high-speed";
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi 
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 69914f4ce183..8e318e624a85 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -51,18 +51,10 @@
status = "okay";
  };
  
-_phy1_u3 {

-   status = "okay";
-};
-
  _phy0 {
status = "okay";
  };
  
-_phy0_u3 {

-   status = "okay";
-};
-
  _host0_xhci {
dr_mode = "peripheral";
maximum-speed = "high-speed";
@@ -70,5 +62,6 @@
  };
  
  _host1_xhci {

+   dr_mode = "host";
status = "okay";
  };
diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi
index 992f7b5d6637..4623580c6102 100644
--- a/arch/arm/dts/rk3588-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-u-boot.dtsi
@@ -13,8 +13,8 @@
clocks = < REF_CLK_USB3OTG1>, < SUSPEND_CLK_USB3OTG1>,
 < ACLK_USB3OTG1>;
clock-names = "ref_clk", "suspend_clk", "bus_clk";
-   dr_mode = "host";
-   phys = <_otg>, <_phy1_u3>;
+   dr_mode = "otg";
+   phys = <_otg>, <_phy1 PHY_TYPE_USB3>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
power-domains = < RK3588_PD_USB>;
@@ -32,22 +32,21 @@
};
  
  	usb2phy1_grf: syscon@fd5d4000 {

-   compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
-"simple-mfd";
+   compatible = "rockchip,rk3588-usb2phy-grf", "syscon", 
"simple-mfd";
reg = <0x0 0xfd5d4000 0x0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
  
-		u2phy1: usb2-phy@4000 {

+   u2phy1: usb2phy@4000 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0x4000 0x10>;
-   interrupts = ;
-   resets = < SRST_OTGPHY_U3_1>, < 
SRST_P_USB2PHY_U3_1_GRF0>;
-   reset-names = "phy", "apb";
+   #clock-cells = <0>;
clocks = < CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy1";
-   #clock-cells = <0>;
+   interrupts = ;
+   resets = < SRST_OTGPHY_U3_1>, < 
SRST_P_USB2PHY_U3_1_GRF0>;
+   reset-names = "phy", "apb";
status = "disabled";
  
  			u2phy1_otg: otg-port {

@@ -60,10 +59,7 @@
usbdp_phy1: phy@fed9 {
compatible = "rockchip,rk3588-usbdp-phy";
reg = <0x0 0xfed9 0x0 0x1>;
-   rockchip,u2phy-grf = <_grf>;
-   rockchip,usb-grf = <_grf>;
-   rockchip,usbdpphy-grf = <_grf>;
-   rockchip,vo-grf = <_grf>;
+   #phy-cells = <1>;
clocks = < CLK_USBDPPHY_MIPIDCPPHY_REF>,
 < CLK_USBDP_PHY1_IMMORTAL>,
 < PCLK_USBDPPHY1>,
@@ -75,16 +71,10 @@
 < SRST_USBDP_COMBO_PHY1_PCS>,
 < SRST_P_USBDPPHY1>;
reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
+   rockchip,u2phy-grf = <_grf>;
+   rockchip,usb-grf = <_grf>;
+   rockchip,usbdpphy-grf = <_grf>;
+   rockchip,vo-grf = <_grf>;
status = "disabled";
-
-   usbdp_phy1_dp: dp-port {
-   #phy-cells = <0>;
-   status = "disabled";
-   };
-
-   usbdp_phy1_u3: usb3-port {
-   #phy-cells = <0>;
-   status = "disabled";
-   };
};
  };
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 

Re: [PATCH 15/16] rockchip: rk3588: Migrate to OF_UPSTREAM

[Kever Yang]

On 2024/5/5 03:43, Jonas Karlman wrote:

Migrate RK3588 boards that exists in Linux v6.8 to use OF_UPSTREAM.

Following targets is not migrated to use OF_UPSTREAM:
- generic-rk3588: Generic target only meant for U-Boot use
- toybrick-rk3588: Merged in v6.9-rc1

Signed-off-by: Jonas Karlman 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/dts/Makefile| 17 -
  arch/arm/mach-rockchip/Kconfig   |  1 +
  configs/coolpi-4b-rk3588s_defconfig  |  2 +-
  configs/coolpi-cm5-evb-rk3588_defconfig  |  2 +-
  configs/evb-rk3588_defconfig |  2 +-
  configs/generic-rk3588_defconfig |  1 +
  configs/jaguar-rk3588_defconfig  |  2 +-
  configs/nanopc-t6-rk3588_defconfig   |  2 +-
  configs/neu6a-io-rk3588_defconfig|  2 +-
  configs/neu6b-io-rk3588_defconfig|  2 +-
  configs/orangepi-5-plus-rk3588_defconfig |  2 +-
  configs/orangepi-5-rk3588s_defconfig |  2 +-
  configs/quartzpro64-rk3588_defconfig |  2 +-
  configs/rock5a-rk3588s_defconfig |  2 +-
  configs/rock5b-rk3588_defconfig  |  2 +-
  configs/toybrick-rk3588_defconfig|  1 +
  configs/turing-rk1-rk3588_defconfig  |  2 +-
  17 files changed, 16 insertions(+), 30 deletions(-)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1dfcc05a14be..3bbdbd21e394 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -98,23 +98,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \
  
-dtb-$(CONFIG_ROCKCHIP_RK3588) += \

-   rk3588s-coolpi-4b.dtb \
-   rk3588-coolpi-cm5-evb.dtb \
-   rk3588-edgeble-neu6a-io.dtb \
-   rk3588-edgeble-neu6b-io.dtb \
-   rk3588-evb1-v10.dtb \
-   rk3588-generic.dtb \
-   rk3588-jaguar.dtb \
-   rk3588-nanopc-t6.dtb \
-   rk3588s-orangepi-5.dtb \
-   rk3588-orangepi-5-plus.dtb \
-   rk3588-quartzpro64.dtb \
-   rk3588s-rock-5a.dtb \
-   rk3588-rock-5b.dtb \
-   rk3588-toybrick-x0.dtb \
-   rk3588-turing-rk1.dtb
-
  dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
rv1108-evb.dtb
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 03f6bf43fdf4..0b9098426420 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -355,6 +355,7 @@ config ROCKCHIP_RK3588
imply MISC_INIT_R
imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
imply OF_LIBFDT_OVERLAY
+   imply OF_UPSTREAM
imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
imply RNG_ROCKCHIP
imply ROCKCHIP_COMMON_BOARD
diff --git a/configs/coolpi-4b-rk3588s_defconfig 
b/configs/coolpi-4b-rk3588s_defconfig
index 2608bb67679b..3d45d939abb2 100644
--- a/configs/coolpi-4b-rk3588s_defconfig
+++ b/configs/coolpi-4b-rk3588s_defconfig
@@ -4,7 +4,7 @@ CONFIG_COUNTER_FREQUENCY=2400
  CONFIG_ARCH_ROCKCHIP=y
  CONFIG_SF_DEFAULT_SPEED=2400
  CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-coolpi-4b"
  CONFIG_ROCKCHIP_RK3588=y
  CONFIG_ROCKCHIP_SPI_IMAGE=y
  CONFIG_SPL_SERIAL=y
diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig 
b/configs/coolpi-cm5-evb-rk3588_defconfig
index c5bb7a429574..5190d69c1c58 100644
--- a/configs/coolpi-cm5-evb-rk3588_defconfig
+++ b/configs/coolpi-cm5-evb-rk3588_defconfig
@@ -4,7 +4,7 @@ CONFIG_COUNTER_FREQUENCY=2400
  CONFIG_ARCH_ROCKCHIP=y
  CONFIG_SF_DEFAULT_SPEED=2400
  CONFIG_SF_DEFAULT_MODE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-coolpi-cm5-evb"
  CONFIG_ROCKCHIP_RK3588=y
  CONFIG_ROCKCHIP_SPI_IMAGE=y
  CONFIG_SPL_SERIAL=y
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig
index a8c32c4fcf4a..1d5585677a46 100644
--- a/configs/evb-rk3588_defconfig
+++ b/configs/evb-rk3588_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
  CONFIG_SKIP_LOWLEVEL_INIT=y
  CONFIG_COUNTER_FREQUENCY=2400
  CONFIG_ARCH_ROCKCHIP=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-evb1-v10"
  CONFIG_ROCKCHIP_RK3588=y
  CONFIG_SPL_SERIAL=y
  CONFIG_TARGET_EVB_RK3588=y
diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig
index 87a171701e42..42bc2c9a7656 100644
--- a/configs/generic-rk3588_defconfig
+++ b/configs/generic-rk3588_defconfig
@@ -32,6 +32,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
  # CONFIG_SPL_DOS_PARTITION is not set
  CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
  CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  # CONFIG_NET is not set
diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig
index f29505ea150b..b69cf4cd057a 100644
--- a/configs/jaguar-rk3588_defconfig
+++ b/configs/jaguar-rk3588_defconfig
@@ -6,7 +6,7 @@ 

Re: [PATCH v3] rockchip: rv1108: Convert to OF_UPSTREAM

[Kever Yang]

On 2024/4/24 22:18, Fabio Estevam wrote:

Instead of using the local rv1108 devicetree copies from U-Boot,
let's convert the rv1108 boards to OF_UPSTREAM so that the upstream kernel
devicetrees can be used instead.

Tested on a rv1108-elgin-r1 board.

Signed-off-by: Fabio Estevam 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes since v2:
- Also removed the arch/arm/dts/Makefile entries.

  arch/arm/dts/Makefile|   4 -
  arch/arm/dts/rv1108-elgin-r1.dts |  59 
  arch/arm/dts/rv1108-evb.dts  |  79 -
  arch/arm/dts/rv1108.dtsi | 581 ---
  arch/arm/mach-rockchip/Kconfig   |   1 +
  configs/elgin-rv1108_defconfig   |   2 +-
  configs/evb-rv1108_defconfig |   2 +-
  7 files changed, 3 insertions(+), 725 deletions(-)
  delete mode 100644 arch/arm/dts/rv1108-elgin-r1.dts
  delete mode 100644 arch/arm/dts/rv1108-evb.dts
  delete mode 100644 arch/arm/dts/rv1108.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b1c9c6222e5d..e600f9c6ed25 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -182,10 +182,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-rock-5b.dtb \
rk3588-turing-rk1.dtb
  
-dtb-$(CONFIG_ROCKCHIP_RV1108) += \

-   rv1108-elgin-r1.dtb \
-   rv1108-evb.dtb
-
  dtb-$(CONFIG_ROCKCHIP_RV1126) += \
rv1126-edgeble-neu2-io.dtb
  
diff --git a/arch/arm/dts/rv1108-elgin-r1.dts b/arch/arm/dts/rv1108-elgin-r1.dts

deleted file mode 100644
index 83e8b3183847..
--- a/arch/arm/dts/rv1108-elgin-r1.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-
-#include "rv1108.dtsi"
-
-/ {
-   model = "Elgin RV1108 R1 board";
-   compatible = "elgin,rv1108-elgin", "rockchip,rv1108";
-
-   memory@6000 {
-   device_type = "memory";
-   reg = <0x6000 0x0800>;
-   };
-
-   chosen {
-   stdout-path = "serial2:150n8";
-   };
-};
-
- {
-   pinctrl-names = "default";
-   pinctrl-0 = <_clk _cmd _bus8>;
-   bus-width = <8>;
-   cap-mmc-highspeed;
-   disable-wp;
-   non-removable;
-   status = "okay";
-};
-
- {
-   status = "okay";
-
-   u2phy_otg: otg-port {
-   status = "okay";
-   };
-};
-
- {
-   pinctrl-names = "default";
-   pinctrl-0 = <_xfer_pullup>;
-   status = "okay";
-};
-
-_otg {
-   status = "okay";
-};
-
- {
-   uart2m0 {
-   uart2m0_xfer_pullup: uart2m0-xfer-pullup {
-   rockchip,pins = <2 RK_PD2 RK_FUNC_1 
_pull_up_drv_8ma>,
-   <2 RK_PD1 RK_FUNC_1 
_pull_up_drv_8ma>;
-   };
-   };
-};
diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
deleted file mode 100644
index c91776bc106e..
--- a/arch/arm/dts/rv1108-evb.dts
+++ /dev/null
@@ -1,79 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- */
-
-/dts-v1/;
-
-#include "rv1108.dtsi"
-
-/ {
-   model = "Rockchip RV1108 Evaluation board";
-   compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
-
-   memory@6000 {
-   device_type = "memory";
-   reg = <0x6000 0x0800>;
-   };
-
-   chosen {
-   stdout-path = "serial2:150n8";
-   };
-
-   vcc5v0_otg: vcc5v0-otg-drv {
-   compatible = "regulator-fixed";
-   enable-active-high;
-   regulator-name = "vcc5v0_otg";
-   gpio = < RK_PB0 GPIO_ACTIVE_HIGH>;
-   regulator-min-microvolt = <500>;
-   regulator-max-microvolt = <500>;
-   };
-};
-
- {
-   status = "okay";
-   clock_in_out = <0>;
-   snps,reset-active-low;
-   snps,reset-delays-us = <0 1 100>;
-   snps,reset-gpio = < RK_PC1 GPIO_ACTIVE_LOW>;
-};
-
- {
-   status = "okay";
-};
-
- {
-   status = "okay";
-   flash@0 {
-   compatible = "gd25q256","jedec,spi-nor";
-   reg = <0>;
-   spi-tx-bus-width = <1>;
-   spi-rx-bus-width = <1>;
-   spi-max-frequency = <9600>;
-   };
-};
-
- {
-   status = "okay";
-};
-
- {
-   status = "okay";
-};
-
- {
-   status = "okay";
-};
-
-_otg {
-   vbus-supply = <_otg>;
-   status = "okay";
-};
-
-_host_ehci {
-   status = "okay";
-};
-
-_host_ohci {
-   status = "okay";
-};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
deleted file mode 100644
index 215d88522587..
--- a/arch/arm/dts/rv1108.dtsi
+++ /dev/null
@@ -1,581 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-/ {
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   compatible =