https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/93136
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phoebewang wrote:
LGTM but I'd like @RKSimon to take a second look.
https://github.com/llvm/llvm-project/pull/92883
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@@ -8,16 +8,12 @@ target triple = "x86_64-unknown-linux-gnu"
define dso_local i32 @main() local_unnamed_addr #0 !dbg !7 {
entry:
tail call void @llvm.prefetch(ptr inttoptr (i64 291 to ptr), i32 0, i32 0,
i32 1), !dbg !9
- tail call void @llvm.x86.avx512.gatherpf.dpd.512(i8
@@ -268,30 +268,6 @@ define void @gather_qps(<8 x i64> %ind, <8 x float> %src,
ptr %base, ptr %stbuf)
ret void
}
-declare void @llvm.x86.avx512.gatherpf.qps.512(i8, <8 x i64>, ptr , i32, i32);
phoebewang wrote:
Surprise to see they were working without a
@@ -23,7 +23,7 @@
br i1 %6, label %4, label %5, !llvm.loop !9
}
- attributes #0 = { nofree norecurse nosync nounwind uwtable writeonly
mustprogress "frame-pointer"="none" "min-legal-vector-width"="0"
"no-trapping-math"="true" "stack-protector-buffer-size"="8"
@@ -1,373 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
phoebewang wrote:
Why removing this?
https://github.com/llvm/llvm-project/pull/92883
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@@ -9265,6 +9265,33 @@ multiclass avx512_fp28_s opc, string
OpcodeStr,X86VectorVTInfo _,
}
}
+multiclass avx512_fp28_s_ass opc, string OpcodeStr, X86VectorVTInfo _>
{
+ let ExeDomain = _.ExeDomain, hasNoSchedulingInfo = 1 in {
+ defm r : AVX512_maskable_scalar,
@@ -9325,6 +9345,43 @@ multiclass avx512_fp28_p_sae opc, string
OpcodeStr, X86VectorVTInfo _,
EVEX_B, Sched<[sched]>;
}
+multiclass avx512_fp28_p_ass opc, string OpcodeStr, X86VectorVTInfo _>
{
+ let ExeDomain = _.ExeDomain, hasNoSchedulingInfo = 1
@@ -9265,6 +9265,33 @@ multiclass avx512_fp28_s opc, string
OpcodeStr,X86VectorVTInfo _,
}
}
+multiclass avx512_fp28_s_ass opc, string OpcodeStr, X86VectorVTInfo _>
{
+ let ExeDomain = _.ExeDomain, hasNoSchedulingInfo = 1 in {
+ defm r : AVX512_maskable_scalar,
phoebewang wrote:
Please note it in release notes.
https://github.com/llvm/llvm-project/pull/92883
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@@ -41,6 +41,22 @@ typedef long long __m512i_u
__attribute__((__vector_size__(64), __aligned__(1)))
typedef unsigned char __mmask8;
typedef unsigned short __mmask16;
+#ifdef __cplusplus
+typedef bool __vecmask2 __attribute__((__ext_vector_type__(2)));
+typedef bool
@@ -77,9 +77,9 @@ _mm512_cvtne2ps_pbh(__m512 __A, __m512 __B) {
///conversion of __B, and higher 256 bits come from conversion of __A.
static __inline__ __m512bh __DEFAULT_FN_ATTRS512
_mm512_mask_cvtne2ps_pbh(__m512bh __W, __mmask32 __U, __m512 __A, __m512 __B) {
- return
@@ -41,6 +41,22 @@ typedef long long __m512i_u
__attribute__((__vector_size__(64), __aligned__(1)))
typedef unsigned char __mmask8;
typedef unsigned short __mmask16;
+#ifdef __cplusplus
+typedef bool __vecmask2 __attribute__((__ext_vector_type__(2)));
+typedef bool
@@ -3019,6 +3019,26 @@ C-style cast applied to each element of the first
argument.
Query for this feature with ``__has_builtin(__builtin_convertvector)``.
+``__builtin_selectvector``
+--
+
+``__builtin_selectvector`` is used to express generic vector
@@ -3744,6 +3744,12 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
return RValue::get(Result);
}
+ case Builtin::BI__builtin_selectvector: {
+return RValue::get(Builder.CreateSelect(EmitScalarExpr(E->getArg(2)),
phoebewang wrote:
> @phoebewang Can you add a release note for this on the PR for the release
> branch and then add the release:note label.
Done.
https://github.com/llvm/llvm-project/pull/91694
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phoebewang wrote:
Ping?
https://github.com/llvm/llvm-project/pull/88245
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https://github.com/phoebewang closed
https://github.com/llvm/llvm-project/pull/91846
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phoebewang wrote:
> You'll be probably building 18.1.6 with 18.1.5... and that's when you'll
> notice the issue. I'm just about finished building 18.1.5 with your patch. So
> hopefully all those issues will be gone. I'll report back
Okay... This is a combined problem which I never thought
phoebewang wrote:
@FireBurn Sorry, I just noticed #91719. The above comments were based on the
issue #91076.
I didn't look at the source, but the command line doesn't have an AVX512
option. So I'm assuming the code may related function multi-versioning with
manually specified target
phoebewang wrote:
> @tstellar Can a note be added somewhere about this? Folks upgrading to
> llvm-18.1.6 will get errors unless they drop -march=native if they were on
> 18.1.5
Although I agree we should add a note, I don't think this patch affects much.
The problem only coccurs when
@@ -792,7 +792,7 @@ ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty,
CCState ,
return ABIArgInfo::getDirect();
return ABIArgInfo::getExpand();
}
-return getIndirectResult(Ty, /*ByVal=*/false, State);
+return getIndirectResult(Ty,
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/91846
>From 844fb5283d654d7d9cb68c5712b338f0a70b384e Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Sat, 11 May 2024 16:07:00 +0800
Subject: [PATCH 1/2] [X86][vectorcall] Pass built types byval when xmm0~6
https://github.com/phoebewang created
https://github.com/llvm/llvm-project/pull/91846
This is how MSVC handles it. https://godbolt.org/z/fG386bjnf
>From 844fb5283d654d7d9cb68c5712b338f0a70b384e Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Sat, 11 May 2024 16:07:00 +0800
Subject: [PATCH]
phoebewang wrote:
/cherry-pick
https://github.com/llvm/llvm-project/commit/87f3407856e61a73798af4e41b28bc33b5bf4ce6
https://github.com/llvm/llvm-project/pull/91694
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https://github.com/llvm/llvm-project/pull/91694
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phoebewang wrote:
> Could you make getHostCPUFeatures only write the Features["evex512"] entry if
> Features["avx512f"] is true? Instead of copying Features["avx512f"]?
Good idea, done.
https://github.com/llvm/llvm-project/pull/91694
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https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/91694
>From 6ea15aa0ee6726cad8dccff10155f058afa0f013 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Fri, 10 May 2024 11:21:41 +0800
Subject: [PATCH 1/2] [X86][Driver] Do not add `-evex512` for `-march=native`
https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/91694
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https://github.com/phoebewang created
https://github.com/llvm/llvm-project/pull/91694
…et doesn't support AVX512
Users want `-march=sandybridge -mavx512f -mavx512vl` behaves the same as
`-march=native -mavx512f -mavx512vl` on a sandybridge target.
Fixes: #91076
>From
https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/91323
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@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown %s -o /dev/null
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-feature +egpr %s -o
/dev/null
+
+int foo(void) {
+ register int a __asm__("ebx");
+#ifdef __EGPR__
phoebewang wrote:
https://github.com/phoebewang reopened
https://github.com/llvm/llvm-project/pull/88245
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phoebewang wrote:
> For driver tests we prefer specifying a concrete target triple than making a
> test dependent on the default target triple (controlled by `REQUIES:
> coff-supported-target` in this case).
>
> A concrete target triple (e.g. x86_64-windows) loses coverage for
>
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/88245
>From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Wed, 10 Apr 2024 15:38:49 +0800
Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat
only
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/88245
>From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Wed, 10 Apr 2024 15:38:49 +0800
Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat
only
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/88245
>From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Wed, 10 Apr 2024 15:38:49 +0800
Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat
only
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/88245
>From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Wed, 10 Apr 2024 15:38:49 +0800
Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat
only
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/88245
>From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Wed, 10 Apr 2024 15:38:49 +0800
Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat
only
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/88245
>From 569c7dfee58f7e4357d8af45b52a3135cb4e2e65 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Wed, 10 Apr 2024 15:38:49 +0800
Subject: [PATCH 1/3] "Reland "[Win32][ELF] Make CodeView a DebugInfoFormat
only
phoebewang wrote:
> I am curious what a `win32-elf` triple is. Does MSVC support generating ELF
> object files?
No idea, but https://github.com/llvm/llvm-project/issues/87140 doesn't look
like from fuzzing.
Consider Windows has WSL now, I'd not surprise it's supported or will be
supported
phoebewang wrote:
Sorry, I know nothing about it. But it looks to me it's to match with GCC, why
don't borrow the value from GCC as a beginning?
https://github.com/llvm/llvm-project/pull/89446
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https://github.com/llvm/llvm-project/pull/88736
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https://github.com/llvm/llvm-project/pull/88736
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https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/88736
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@@ -1,13 +1,22 @@
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=return %s |
FileCheck %s --check-prefix=RETURN
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s |
FileCheck %s --check-prefix=BRANCH
// RUN: %clang_cc1 -E -triple i386 -dM -o -
@@ -1,13 +1,22 @@
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=return %s |
FileCheck %s --check-prefix=RETURN
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s |
FileCheck %s --check-prefix=BRANCH
// RUN: %clang_cc1 -E -triple i386 -dM -o -
phoebewang wrote:
Thanks a lot @nico! I see the bot is still red, but not failed on this test any
more.
https://github.com/llvm/llvm-project/pull/88101
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@@ -2,12 +2,20 @@
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s |
FileCheck %s --check-prefix=BRANCH
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=full %s |
FileCheck %s --check-prefix=FULL
// RUN: not %clang_cc1 -emit-llvm-only
@@ -2,12 +2,20 @@
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=branch %s |
FileCheck %s --check-prefix=BRANCH
// RUN: %clang_cc1 -E -triple i386 -dM -o - -fcf-protection=full %s |
FileCheck %s --check-prefix=FULL
// RUN: not %clang_cc1 -emit-llvm-only
https://github.com/phoebewang created
https://github.com/llvm/llvm-project/pull/88245
This is a second try to reland https://github.com/llvm/llvm-project/pull/87149.
The previous commit exposed failures on some targets. The reason is only a few
targets support COFF ObjectFormatType on
Author: Phoebe Wang
Date: 2024-04-10T14:40:07+08:00
New Revision: 299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6
URL:
https://github.com/llvm/llvm-project/commit/299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6
DIFF:
https://github.com/llvm/llvm-project/commit/299b636a8f1c9cb2382f9dce4cdf6ec6330a79c6.diff
https://github.com/phoebewang closed
https://github.com/llvm/llvm-project/pull/87987
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https://github.com/phoebewang created
https://github.com/llvm/llvm-project/pull/88101
Fixes #62449
>From 66c4383e58cab7cf893edfa3f3507be166116fa6 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 9 Apr 2024 16:08:55 +0800
Subject: [PATCH] [SEH] Ignore async exception flag when the
https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/87987
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https://github.com/phoebewang created
https://github.com/llvm/llvm-project/pull/87987
This relands #87149.
The previous commit exposed failures on some targets. The reason is only a few
targets support COFF ObjectFormatType on Windows:
Author: Phoebe Wang
Date: 2024-04-03T16:10:19+08:00
New Revision: cd7517859eef14d8b38cec2d52c0625a58c645a2
URL:
https://github.com/llvm/llvm-project/commit/cd7517859eef14d8b38cec2d52c0625a58c645a2
DIFF:
https://github.com/llvm/llvm-project/commit/cd7517859eef14d8b38cec2d52c0625a58c645a2.diff
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/87149
>From 16fea4659909423319f0107b2a4d5bcc31185299 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Sat, 30 Mar 2024 17:29:06 +0800
Subject: [PATCH] [Win32][ELF] Make CodeView a DebugInfoFormat only for COFF
https://github.com/phoebewang created
https://github.com/llvm/llvm-project/pull/87149
We have many problems to use CodeView for a win32-elf target, e.g., #87140 and
`error: .seh_* directives are not supported on this target`.
Fixes: #87140
>From 745b2acb9dafbb54b00353f71dee464b3617c13a Mon
https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/85862
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@@ -207,6 +207,8 @@ _mm256_div_ps(__m256 __a, __m256 __b)
/// Compares two 256-bit vectors of [4 x double] and returns the greater
///of each pair of values.
///
+///If either value in a comparison is NaN, returns the value from \a __b.
phoebewang
phoebewang wrote:
Checked both pr77036.cpp and pr77036.c get the same result, so looks like a
right fix. But I want to wait @efriedma-quic to sign off.
https://github.com/llvm/llvm-project/pull/77907
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@@ -3014,6 +3014,11 @@ Address X86_64ABIInfo::EmitVAArg(CodeGenFunction ,
Address VAListAddr,
ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE,
/*isNamedArg*/false);
+ // Empty records are ignored for parameter
https://github.com/phoebewang closed
https://github.com/llvm/llvm-project/pull/83136
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https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/8] [X86] Add Support for X86 TLSDESC Relocations
---
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/8] [X86] Add Support for X86 TLSDESC Relocations
---
@@ -0,0 +1,247 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686 --relocation-model=pic -enable-tlsdesc |
FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32
https://github.com/phoebewang approved this pull request.
Looks great, thanks!
https://github.com/llvm/llvm-project/pull/83447
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phoebewang wrote:
Gentle ping~
https://github.com/llvm/llvm-project/pull/83136
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@@ -1405,11 +1413,12 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtss_sd(__m128d __a,
/// Converts the two double-precision floating-point elements of a
///128-bit vector of [2 x double] into two signed 32-bit integer values,
-///returned in the lower 64
@@ -1405,11 +1413,12 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtss_sd(__m128d __a,
/// Converts the two double-precision floating-point elements of a
///128-bit vector of [2 x double] into two signed 32-bit integer values,
-///returned in the lower 64
https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/84136
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@@ -18543,7 +18552,19 @@ GetTLSADDR(SelectionDAG , SDValue Chain,
GlobalAddressSDNode *GA,
MFI.setHasCalls(true);
SDValue Glue = Chain.getValue(1);
- return DAG.getCopyFromReg(Chain, dl, ReturnReg, PtrVT, Glue);
+ SDValue Ret = DAG.getCopyFromReg(Chain, dl, ReturnReg,
@@ -18522,13 +18522,21 @@ GetTLSADDR(SelectionDAG , SDValue Chain,
GlobalAddressSDNode *GA,
MachineFrameInfo = DAG.getMachineFunction().getFrameInfo();
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
SDLoc dl(GA);
- SDValue TGA =
@@ -0,0 +1,165 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic
-enable-tlsdesc | FileCheck %s --check-prefix=X86
+; RUN: llc < %s
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/7] [X86] Add Support for X86 TLSDESC Relocations
---
phoebewang wrote:
> I assume that's what you're doing in the place I asked for a comment is
> trying to avoid redundantly generating TLSDESC accesses for
> _TLS_MODULE_BASE_. I see that we don't generate multiple accesses for
> _TLS_MODULE_BASE_ in the test cases, but I thought that was only
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
return _mm_andnot_ps(A, B);
}
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b,
@@ -18515,20 +18515,20 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op,
SelectionDAG ) const {
return LowerGlobalOrExternal(Op, DAG, /*ForCall=*/false);
}
-static SDValue
-GetTLSADDR(SelectionDAG , SDValue Chain, GlobalAddressSDNode *GA,
- SDValue *InGlue,
@@ -0,0 +1,165 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic
-enable-tlsdesc | FileCheck %s --check-prefix=X86
+; RUN: llc < %s
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/6] [X86] Add Support for X86 TLSDESC Relocations
---
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/6] [X86] Add Support for X86 TLSDESC Relocations
---
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/5] [X86] Add Support for X86 TLSDESC Relocations
---
https://github.com/phoebewang deleted
https://github.com/llvm/llvm-project/pull/83136
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@@ -0,0 +1,165 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic
-enable-tlsdesc | FileCheck %s --check-prefix=X86
+; RUN: llc < %s
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/4] [X86] Add Support for X86 TLSDESC Relocations
---
phoebewang wrote:
Ping~
https://github.com/llvm/llvm-project/pull/83136
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phoebewang wrote:
This is a turbulent change to both upstream and downstream tests without any
profit as far as I can tell.
I did a similar change for 64-bit a few years ago:
https://reviews.llvm.org/D129647
In comparison, this patch is not to solve a specific problem. It should not
show
@@ -2211,7 +2213,12 @@ _mm256_cvtpd_ps(__m256d __a)
return (__m128)__builtin_ia32_cvtpd2ps256((__v4df) __a);
}
-/// Converts a vector of [8 x float] into a vector of [8 x i32].
+/// Converts a vector of [8 x float] into a vector of [8 x i32]. Rounds inexact
+///results
@@ -2180,7 +2180,8 @@ _mm256_cvtepi32_pd(__m128i __a)
return (__m256d)__builtin_convertvector((__v4si)__a, __v4df);
}
-/// Converts a vector of [8 x i32] into a vector of [8 x float].
+/// Converts a vector of [8 x i32] into a vector of [8 x float]. Rounds inexact
+///
@@ -0,0 +1,165 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic
-enable-tlsdesc | FileCheck %s --check-prefix=X86
+; RUN: llc < %s
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/83136
>From cdc9ee6c322af0ceed162f3f714bcd0a22e020c3 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 27 Feb 2024 22:16:38 +0800
Subject: [PATCH 1/3] [X86] Add Support for X86 TLSDESC Relocations
---
https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/83316
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@@ -0,0 +1,165 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=i686-unknown-unknown --relocation-model=pic
-enable-tlsdesc | FileCheck %s --check-prefix=X86
+; RUN: llc < %s
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