On Fri, May 29, 2015 at 01:06:47PM +0100, Kahola, Mika wrote:
static void broxton_modeset_global_resources(struct drm_atomic_state
*old_state)
broxton_set_cdclk(dev, req_cdclk);
}
+/* compute the max rate for new configuration */ static int
+ilk_max_pixel_rate(struct
On Thu, May 28, 2015 at 06:09:34PM +0100, Michel Thierry wrote:
And prevent overflow warning during compilation. We already set this limit
for the GGTT.
This is a temporary patch until a full replacement of size_t variables
(inadequate in 32-bit kernel) is in place.
Regression from:
On Thu, May 28, 2015 at 08:17:35PM +0300, Jani Nikula wrote:
On Thu, 28 May 2015, Daniel Vetter dan...@ffwll.ch wrote:
On Thu, May 28, 2015 at 04:29:10PM +0100, Damien Lespiau wrote:
On Wed, May 27, 2015 at 02:49:38PM -0700, Joe Konno wrote:
Do we have an idea when this patch series
-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
to the latest
v3: Rebased to the latest
Reviewed-by: Mika Kahola mika.kah...@intel.com
Author:Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 3 +--
drivers/gpu/drm/i915/intel_dp.c | 5
On Thu, May 28, 2015 at 10:11:59AM -0700, Joe Konno wrote:
Who will commit to reviewing this series to danvet's satisfaction? Jani
and Damien?
Please re-read my first answer :) There's even the next step to push
this work forward in there (also intel-gfx list is full of old fashioned
farts that
v3: Rebased to the latest
Reviewed-by: Mika Kahola mika.kah...@intel.com
Author:Ville Syrjälä ville.syrj...@linux.intel.com
---
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
drivers/gpu/drm/i915/intel_dp.c | 23 +++
1 file changed, 3 insertions
ville.syrj...@linux.intel.com
-ENODOC
Acked -by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 11 ---
drivers/gpu/drm/i915/intel_display.c | 15 ---
2 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915
:Ville Syrjälä ville.syrj...@linux.intel.com
Acked-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 183
++-
2 files changed, 185 insertions(+), 1 deletion(-)
diff --git
...@linux.intel.com
---
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_display.c | 20 +++-
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b
and commit message - not really inspiring.
Still, a probably better try then decoding HPLLCC.
Acked-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
Author:Ville Syrjälä ville.syrj...@linux.intel.com
---
drivers/gpu/drm/i915/intel_display.c | 8
1 file changed, 8 insertions
On Fri, May 22, 2015 at 11:22:35AM +0300, Mika Kahola wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Rather that extracting the current cdclk freuqncy every time someone
wants to know it, cache the current value and use that. VLV/CHV already
stored a cached value there so just
ville.syrj...@linux.intel.com
v4: Rebased to the latest
v5: Rebased to the latest
Reviewed-by: Mika Kahola mika.kah...@intel.com
Author:Ville Syrjälä ville.syrj...@linux.intel.com
---
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
drivers/gpu/drm/i915/intel_display.c
On Wed, May 27, 2015 at 02:49:38PM -0700, Joe Konno wrote:
Do we have an idea when this patch series will be reviewed? Customers
are awaiting for this to be merged to the drm-intel fd.o repository.
This series is mostly reviewed, all but one patch the HSW CDCLK code.
I'm not sure that we want
On Tue, May 26, 2015 at 04:48:40AM +, Jindal, Sonika wrote:
Thanks for sending this.. I realized that I had a patch for this which I
never sent :)
Reviewed-by: Sonika Jindal sonika.jin...@intel.com
Pushed, thanks for the patch and review. Probably a good time to start
thinking about
It was reported that this comment was confusing, and indeed it is.
v2: (one year later!) Add the range for the DRM_I915_* iotcl defines
(Daniel)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
include/uapi/drm/i915_drm.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions
that even allnoconfig_y is used
only once today.
Reported-by: Andrew Morton a...@linux-foundation.org
Suggested-by: Andrew Morton a...@linux-foundation.org
Cc: Andrew Morton a...@linux-foundation.org
Cc: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
On Fri, May 22, 2015 at 02:17:32PM -0700, Andrew Morton wrote:
> I'm not sure what's happened to the drm code in linux-next - it's
> exploding all over the place. Did someone turn on -Werror without
> doing anywhere near enough testing?
>
> Anyway, I don't know how to fix this i386 build error:
On Fri, May 22, 2015 at 02:17:32PM -0700, Andrew Morton wrote:
I'm not sure what's happened to the drm code in linux-next - it's
exploding all over the place. Did someone turn on -Werror without
doing anywhere near enough testing?
Anyway, I don't know how to fix this i386 build error:
On Wed, May 20, 2015 at 07:12:15PM -0700, Matt Roper wrote:
We never removed the sprite watermark updates from our low-level
foo_update_plane() functions; since our hardware updates happen under
vblank evasion, we're not supposed to be calling potentially sleeping
functions there (since
-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 3 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_ddi.c | 8 +-
drivers/gpu/drm/i915/intel_display.c | 208
On Thu, May 21, 2015 at 06:44:53PM +0300, Ville Syrjälä wrote:
diff --git a/drivers/gpu/drm/i915/intel_ddi.c
b/drivers/gpu/drm/i915/intel_ddi.c
index d602db2..cacb07b 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2510,6 +2510,7 @@ void
On Thu, May 21, 2015 at 06:58:48PM +0300, Ville Syrjälä wrote:
Hmm, actually are we not calling the skl_init_cdclk() on boot at all? I
see
it only in the resume path.
Yes that's correct, we always have display intialized by the firmware on
big core as far as I know (which may not
On Wed, May 20, 2015 at 08:37:56AM +, Morton, Derek J wrote:
-Original Message-
From: Morton, Derek J
Sent: Tuesday, May 19, 2015 12:21 PM
To: intel-gfx@lists.freedesktop.org
Cc: Wood, Thomas; Gore, Tim; Morton, Derek J
Subject: [PATCH i-g-t] libs/igt_core.c: Fix
On Wed, May 20, 2015 at 11:35:28AM +0100, Chris Wilson wrote:
Our driver compiles clean (nowadays thanks to 0day) but for me, at least,
it would be beneficial if the compiler threw an error rather than a
warning when it found a piece of suspect code. (I use this to
compile-check patch series
I fell into a well crafted trap in the previous series, breaking a resume
ordering constraint for VLV/CHV. Might as well split the series in two then as
we really want the SKL S3 stuff in sooner rather than later.
--
Damien
Damien Lespiau (5):
drm/i915/bxt: Also add bxt_resume_prepare
:
Acked-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
drivers/gpu/drm/i915/Kconfig | 8
drivers/gpu/drm/i915/Kconfig.debug | 5 +
drivers/gpu/drm/i915/Makefile | 2 ++
3 files changed, 15 insertions(+)
create mode 100644 drivers/gpu/drm/i915/Kconfig.debug
Couldn't let it go!
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 77f9818..442dd6c 100644
--- a/drivers/gpu
change. It takes about
3/4 cycles, each separated by 10us, to get the ACK from the CPU
(Ville)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 3 +
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_ddi.c | 2
Currently bxt_resume_prepare() is only used in the runtime-resume path.
Add it to the full S3/S4 path as well.
v2: Rebase on top of the vlv_resume_prepare() shuffling around
Cc: Imre Deak imre.d...@intel.com
Reviewed-by: Imre Deak imre.d...@intel.com (v1)
Signed-off-by: Damien Lespiau
The macros we use there are the magic ones that can take either dev or
dev_priv. We'd like to move as much as possible towards dev_priv though.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 9 -
1 file changed, 4 insertions(+), 5 deletions
Right not we don't initialize the stored CDCLK on DDI platforms. Fix
that.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915
diff --git a/drivers/gpu/drm/i915/i915_drv.c
b/drivers/gpu/drm/i915/i915_drv.c
index 5cc57f2..5a9399c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -808,17 +808,17 @@ static int i915_drm_resume_early(struct drm_device
*dev)
now that cursor planes use
real fb objects (found by PRTS).
Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 33 +++--
1 file changed, 23 insertions(+), 10
, defaulting to trusting the spec and bug db is probably the
saner option, so:
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
+ if ((IS_SKYLAKE(dev) INTEL_REVID(dev) == SKL_REVID_C0) ||
+ (IS_BROXTON(dev) INTEL_REVID(dev) BXT_REVID_B0))
WA_SET_BIT_MASKED
On Tue, May 19, 2015 at 03:05:00PM +0300, Imre Deak wrote:
Signed-off-by: Imre Deak imre.d...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers
On Tue, May 19, 2015 at 03:39:25PM +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:04:59PM +0300, Imre Deak wrote:
Also make the WA comment consistent with the rest, where the stepping
info is not shown.
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915
On Tue, May 19, 2015 at 05:52:27PM +0300, Imre Deak wrote:
On ti, 2015-05-19 at 15:46 +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:39:25PM +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:04:59PM +0300, Imre Deak wrote:
Also make the WA comment consistent with the rest
Useful to understand the warnings the scripts prints.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
scripts/list-workarounds | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/scripts/list-workarounds b/scripts/list-workarounds
index 42af6a3..d11b6a9 100755
On Mon, May 18, 2015 at 03:12:52PM +0300, Imre Deak wrote:
On pe, 2015-05-15 at 19:44 +0100, Damien Lespiau wrote:
Cc: Imre Deak imre.d...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Reviewed-by: Imre Deak imre.d...@intel.com
Thanks for the review, pushed.
--
Damien
On Mon, May 18, 2015 at 03:12:06PM +0300, Imre Deak wrote:
On pe, 2015-05-15 at 19:44 +0100, Damien Lespiau wrote:
Cc: Imre Deak imre.d...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
Reviewed-by: Imre Deak imre.d...@intel.com
Thanks for the review, pushed.
--
Damien
On Mon, May 18, 2015 at 05:10:01PM +0300, Jani Nikula wrote:
Be in line with other features that we have.
Signed-off-by: Jani Nikula jani.nik...@intel.com
Looks good to me.
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
drivers/gpu/drm/i915/i915_drv.h | 3
] source rates: 162000, 27, 54
[drm:intel_dp_print_rates] sink rates: 162000, 27
[drm:intel_dp_print_rates] common rates: 162000, 27
Signed-off-by: Jani Nikula jani.nik...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
drivers/gpu/drm
On Mon, May 18, 2015 at 10:30:06AM +0200, Daniel Vetter wrote:
On Fri, May 15, 2015 at 12:09:00PM +0100, Tvrtko Ursulin wrote:
Hi,
On 05/15/2015 11:42 AM, Chris Wilson wrote:
Mika encountered one pathological scenario under X where acquiring all
the mm locks (required to insert a
on resume based on Ville's comments. The
major change is that we now poll the PCU for its ACK before changing CDCLK
and this does solve the problem I was seeing (it typically takes 3/4 cycles
separated by 10us to get the PCU to answer 'GO!')
--
Damien
Damien Lespiau (8):
drm/i915: Fix
change. It takes about
3/4 cycles, each separated by 10us, to get the ACK from the CPU
(Ville)
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 3 +
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_ddi.c | 2
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 51149fb..5cc57f2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
Currently bxt_resume_prepare() is only used in the runtime-resume path.
Add it to the full S3/S4 path as well.
Cc: Imre Deak imre.d...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion
.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5cc57f2..5a9399c 100644
--- a/drivers/gpu/drm/i915
for BXT, so that should eliminate a source of bugs in the
future.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 47 -
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915
Right not we don't initialize the stored CDCLK on DDI platforms. Fix
that.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915
Couldn't let it go!
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a29db40..6d8af59 100644
--- a/drivers/gpu
The macros we use there are the magic ones that can take either dev or
dev_priv. We'd like to move as much as possible towards dev_priv though.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 9 -
1 file changed, 4 insertions(+), 5 deletions
On Mon, May 18, 2015 at 10:38:03AM +0200, Daniel Vetter wrote:
On Fri, May 15, 2015 at 11:22:27PM +, Konduru, Chandra wrote:
Hi,
I have been seeing below warning on skylake system on which dmc fw isn't
placed.
Is below warning expected? If so what is it conveying?
Seems to be
Sync from kernel commit:
commit 44e5e28bf64fcd7c4d3f933cb4c7f69d8aa11781
Author: Jani Nikula jani.nik...@intel.com
Date: Tue Feb 3 14:34:05 2015 +0200
drm/i915: remove indirection in the PCI ID macros
v2: Add a reference to the kernel commit (Chris)
Signed-off-by: Damien Lespiau
On Fri, May 15, 2015 at 09:30:10PM +0100, Chris Wilson wrote:
On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote:
We decided that liked the explicit list of IDs better than the encoded
one. The DDX may like this as well, if just to keep the files identical.
The point
information in new pipe_config
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90462
Looks good to me:
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
On Fri, 2015-05-15 at 13:31 +0300, Ander Conselvan De Oliveira wrote:
The memset() was added to fix a similar
On Fri, May 15, 2015 at 11:24:55AM +0100, Derek Morton wrote:
If ANDROID_HAS_CAIRO is not set, automatically add all
kms tests to the skip_tests_list.
Building for android currently fails due to the addition of
new kms tests. Rather than just adding the new tests to the
exclusion list,
information in new pipe_config
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90410
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
(it's probably be good to update the comment with the reason *why* we
...@linux.intel.com
Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 66
1 file changed, 21 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
On Fri, May 15, 2015 at 12:15:36PM +0100, Morton, Derek J wrote:
On Fri, May 15, 2015 at 11:24:55AM +0100, Derek Morton wrote:
If ANDROID_HAS_CAIRO is not set, automatically add all kms tests to
the skip_tests_list.
Building for android currently fails due to the addition of new kms
On Tue, May 12, 2015 at 09:50:16PM +0200, Andreas Reis wrote:
Hi,
drm-intel-nightly @ 2015y-05m-12d-17h-21m-03s.
Warnings (27 each boot, here's three different ones) have been there for
a few days already. No noticeable effect.
Haswell 4770, two HDMI monitors to its IGP.
This should
We can only do something with ARGB buffers on VLV/CHV and gen9+. Let's not
expose those format before then.
Technically this is an ABI break but we did check the DDX wasn't using those,
so give it a shot.
--
Damien
Damien Lespiau (4):
drm/i915: Remove the COMMON_PRIMARY_FORMATS defines
drm
That define makes it hard to figure out what is the actual list of
formats at a glance. Expand it then.
Suggested-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 17 -
1 file changed
We don't actually do anything different for the A version of the
RGB formats before SKL. Don't let user space think we can support alpha
blending.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 35 ---
1 file
Cc: Imre Deak imre.d...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
include/drm/i915_pciids.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index bd0d644..17c4456 100644
--- a/include/drm
We don't actually do anything different for the A version of the
RGB formats before SKL. Don't let user space think we can support alpha
blending.
v2: Fix the logic to forbid the creation ABGR2101010 fbs (Ville)
Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien
Cc: Imre Deak imre.d...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/intel_chipset.h | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 37554e6..7f611ed 100644
--- a/lib/intel_chipset.h
+++ b/lib
Cc: Imre Deak imre.d...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
intel/intel_chipset.h | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index e22a867..253ea71 100644
--- a/intel
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
src/i915_pciids.h | 4
src/intel_module.c | 5 +
2 files changed, 9 insertions(+)
diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index 6133723..17c4456 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -286,5 +286,9
We decided that liked the explicit list of IDs better than the encoded
one. The DDX may like this as well, if just to keep the files identical.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
src/i915_pciids.h | 49 +
1 file changed, 25
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index c784f9a..c957a45 100644
--- a/drivers/gpu/drm/i915
We just have have VLV and CHV sprites programming the hardware
differently for the ABGR2101010 so keep them working.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff
On Thu, May 14, 2015 at 01:38:31PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
v2: Split strings to 80 char, add ddi_pll_sel and fixed typo. (Damien Lespiau)
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
Cc: Damien Lespiau damien.lesp...@intel.com
a certain state on the screen (when using --interactive-debug for
instance) against a known CRC.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/.gitignore | 1 +
tools/Makefile.sources| 1 +
tools/intel_display_crc.c | 110
gem_bad_blit.c: In function ‘bad_blit’:
gem_bad_blit.c:89:3: warning: right shift count = width of type [enabled by
default]
OUT_BATCH(BAD_GTT_DEST 32); /* Upper 16 bits */
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tests/gem_bad_blit.c | 2 +-
1 file changed, 1 insertion
It can be useful to have one of those to carry state between the handler
parsing the options and the rest of the test. Right now the only thing
we can do is to use global variables for that.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/igt_core.c | 17
On Thu, May 14, 2015 at 07:33:17AM +0100, Winkler, Tomas wrote:
Is this a known issue ?
IP: [c05d22be] intel_prepare_ddi+0x14e/0x770 [i915]
A good candidate:
commit faa0cdbec1c258896bff8bb59051bbada4fd6f09
Author: Imre Deak imre.d...@intel.com
Date: Fri Apr 17 19:31:22
chandra.kond...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
drivers/gpu/drm/i915/intel_display.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index
On Wed, May 13, 2015 at 03:54:32PM +0100, Tvrtko Ursulin wrote:
Hi,
Hi Tvrtko,
+static bool
+skl_ddi_pll_select(struct intel_crtc *intel_crtc,
+ struct intel_encoder *intel_encoder,
+ int clock)
+{
+struct intel_shared_dpll *pll;
+uint32_t ctrl1,
On Wed, May 13, 2015 at 04:51:07PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Tried to get the platform split right, please shout if I failed.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
So, previously, we used to dump the whole list of states,
call
skl_edp_set_pll_config which fixes the problem for me.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
Cc: Damien Lespiau damien.lesp...@intel.com
Cc: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Cc: Maarten Lankhorst maarten.lankho...@linux.intel.com
Cc: Daniel
On Wed, May 13, 2015 at 05:56:17PM +0100, Damien Lespiau wrote:
On Wed, May 13, 2015 at 05:40:44PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Since commit 4978cc93d9ac240b435ce60431aef24239b4c270 started clearing
dpll state and recomputing it via
On Tue, May 12, 2015 at 06:13:25PM +0200, Daniel Vetter wrote:
On Tue, May 12, 2015 at 04:13:19PM +0100, Damien Lespiau wrote:
While we have been historically exposing those formats, but the hardware
doesn't do anything with the alpha bits. The DDX doesn't seem to
particularly care about
Ville noticed in another patch we we didn't need them at all, so remove
them. It's worth saying that it makes no difference to code generated as
gcc is clever enough to optimize it out.
Suggested-by: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Damien Lespiau damien.lesp
No reason to not follow the 80 chars rule, renaming the local variable
makes it easy.
Cc: Chandra Konduru chandra.kond...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 26 +-
1 file changed, 13 insertions
We usually use a new line before those kind of return statements. Also
the various skl_plane_ctl*() functions weren't consistent.
Cc: Chandra Konduru chandra.kond...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 2 ++
1 file changed
Cc: Chandra Konduru chandra.kond...@intel.com
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 895d7c7..f533519
Let's be consistent with the others skl_plane_ctl_*() functions and use
a MISSING_CASE(). Not only that, but it's a rude to BUG() the whole
machine here.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1
We now prefix our functions/enums/data with the first platform it has
been introduced. Do that for the primary plane formats.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff
We advertize C8 in the primary plane formats didn't have the
corresponding code to set PLANE_CTL accordingly.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915
We can have a single function returns the list of formats. It's rather
simple for now but will be augmented with the NV12 work.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 27 ---
drivers/gpu/drm/i915/intel_drv.h
While we have been historically exposing those formats, but the hardware
doesn't do anything with the alpha bits. The DDX doesn't seem to
particularly care about those formats either, so just expose the
XRGB/XBGR variants.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
index 21950f0..c8d4644 100644
--- a/drivers/gpu/drm
On Skylake, the hardware supports the same formats on all panes (well, except
NV12 which is a bit special). Make sure we expose those common formats to
user-space then.
Used libdrm's tests/modetest to inspect the list of exposed formats.
--
Damien
Damien Lespiau (10):
drm/i915/skl: Leave
We have unified planes on SKL, they more similar than ever before and we
can advertize the same formats.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 4
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 7 insertions(+)
diff
The tool I used to generate that list doesn't support expanding the list
of registers when dealing with something like CUR_WM_A_*. Expand it by
hand for now (tm).
Remove CUR_PAL_${pipe}_* for the same reason (and because it's not very
useful to have).
Signed-off-by: Damien Lespiau damien.lesp
Those messages where missing a new line at the end. Take the opportunity
to re-format the messages to fit in the 80 chars limit.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
lib/igt_aux.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/lib/igt_aux.c
With the recent developments, add scaler and NV12 registers to the dump.
Also add the cursor registers that were missing in the first batch.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tools/quick_dump/skl_display.txt | 97
1 file changed
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
tests/kms_cursor_crc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c
index 9f20ae2..98a91d9 100644
--- a/tests/kms_cursor_crc.c
+++ b/tests/kms_cursor_crc.c
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