[PATCH] D127976: [IR] Move vector.insert/vector.extract out of experimental namespace

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa83aa33d1bf9: [IR] Move vector.insert/vector.extract out of experimental namespace (authored by bsmith). Changed prior to commit:

[PATCH] D127976: [IR] Move vector.insert/vector.extract out of experimental namespace

bsmith updated this revision to Diff 438975. bsmith added a comment. - Further improve clarity on usable types in LangRef Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D127976/new/ https://reviews.llvm.org/D127976 Files:

[PATCH] D127976: [IR] Move vector.insert/vector.extract out of experimental namespace

bsmith updated this revision to Diff 438718. bsmith added a comment. - Clarify LangRef slightly to make it clearer that fixed types can be used - Rebase on top of recent test changes Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D127976/new/

[PATCH] D127976: [IR] Move vector.insert/vector.extract out of experimental namespace

bsmith updated this revision to Diff 437557. bsmith added a comment. - Add info to release notes Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D127976/new/ https://reviews.llvm.org/D127976 Files: clang/include/clang/Basic/riscv_vector.td

[PATCH] D127976: [IR] Move vector.insert/vector.extract out of experimental namespace

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, c-rhodes, sdesmalen. Herald added subscribers: ctetreau, frasercrmck, jdoerfert, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D122732: [Clang][AArch64][SVE] Allow subscript operator for SVE types

bsmith accepted this revision. bsmith added a comment. This revision is now accepted and ready to land. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D122732/new/ https://reviews.llvm.org/D122732

[PATCH] D120323: [clang][SVE] Add support for arithmetic operators on SVE types

bsmith added a comment. Herald added a project: All. This all looks reasonable to me, but I'll let @peterwaller-arm have the final say. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D120323/new/ https://reviews.llvm.org/D120323

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

bsmith added a comment. The tests in this are broken for windows, which I've fixed in 45e102a173680fd3c90def79a7f0766ed2786ff0 . Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG26f56438e3da: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +… (authored by bsmith). Repository: rG LLVM Github

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

bsmith added inline comments. Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:82-88 +if (Feature == "sve2") + Features.push_back("+sve"); +else if (Feature == "sve2-bitperm" || Feature == "sve2-sha3" || + Feature == "sve2-aes" || Feature ==

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

bsmith updated this revision to Diff 387900. bsmith added a comment. - Use more brute force approach to ensure ordering is accounted for - This massively simplifies things and removes what was becoming very confusing logic - Add tests for missing cases Repository: rG LLVM Github Monorepo

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

bsmith added inline comments. Comment at: clang/lib/Driver/ToolChains/Arch/AArch64.cpp:73 static bool DecodeAArch64Features(const Driver , StringRef text, std::vector , llvm::AArch64::ArchKind ArchKind) {

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

bsmith updated this revision to Diff 387212. bsmith edited the summary of this revision. bsmith added a comment. Herald added a subscriber: kristof.beyls. - Fix duplicate arch feature in unit test - Use enum class instead of plain enum with typedef Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D113776: [Clang][SVE] Properly enable/disable dependant SVE target features based upon +(no)sve.* options

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, sdesmalen. Herald added subscribers: psnobl, tschuett. Herald added a reviewer: efriedma. bsmith requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits,

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG0ce46a1d43c6: [AArch64][Driver][SVE] Allow -msve-vector-bits=n+ syntax to mean no maximum… (authored by bsmith). Repository: rG LLVM Github

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith updated this revision to Diff 381511. bsmith added a comment. - Don't define SVE target bits macros when vscale min != max - Add tests for above change - Use correct (unsigned) version of getAsInteger Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith updated this revision to Diff 380330. bsmith added a comment. - Avoid side-effects in assertions Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111790/new/ https://reviews.llvm.org/D111790 Files: clang/include/clang/Basic/LangOptions.def

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith updated this revision to Diff 380015. bsmith added a comment. - Update sema checking for sve_vector_bits attribute to emit an error when the vscale min != max, i.e. when -mvse-vector-bits=+ is used - Add test to cover the above case Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith added inline comments. Comment at: clang/lib/Sema/SemaType.cpp:7916 // The attribute vector size must match -msve-vector-bits. - if (VecSize != S.getLangOpts().ArmSveVectorBits) { + if (VecSize != S.getLangOpts().VScaleMin * 128) { S.Diag(Attr.getLoc(),

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith added inline comments. Comment at: clang/lib/Sema/SemaType.cpp:7916 // The attribute vector size must match -msve-vector-bits. - if (VecSize != S.getLangOpts().ArmSveVectorBits) { + if (VecSize != S.getLangOpts().VScaleMin * 128) { S.Diag(Attr.getLoc(),

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith updated this revision to Diff 379701. bsmith added a comment. - Remove mention of 128-bit chunks from help texts - Allow any positive integer value for -mvscale-{min,max}, not just powers of 2 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith added a comment. In D111790#3063698 , @paulwalker-arm wrote: > Are the references to "128-bit chunks" for the vscale flags necessary? > That's really a nuisance of SVE that LLVM IR should not need to worry about. > Can we speak exclusively in

[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=+ syntax to mean no maximum vscale

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, sdesmalen. Herald added subscribers: ctetreau, dexonsmith, dang, psnobl, kristof.beyls, tschuett. Herald added a reviewer: efriedma. bsmith requested review of this revision. Herald added a project: clang.

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe57e1e4e0026: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate… (authored by bsmith). Changed prior to commit:

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

bsmith updated this revision to Diff 363093. bsmith marked an inline comment as done. bsmith added a comment. - Update comment to reflect changes - Add new test for lax casting via memory Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106860/new/

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

bsmith added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2102 + Src = Builder.CreateBitCast(Src, SrcTy); +} if (ScalableSrc->getElementType() == FixedDst->getElementType()) { junparser wrote: > I think this may also

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

bsmith added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:2110-2129 // Perform VLAT <-> VLST bitcast through memory. // TODO: since the llvm.experimental.vector.{insert,extract} intrinsics // require the element types of the vectors to be

[PATCH] D106860: [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, eli.friedman, junparser. Herald added subscribers: psnobl, kristof.beyls, tschuett. Herald added a reviewer: efriedma. bsmith requested review of this revision. Herald added a project: clang. Herald added a

[PATCH] D106277: [SVE] Remove the interface for getMaxVScale in favour of the IR attributes

bsmith added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:505-506 + } else if (getContext().getTargetInfo().hasFeature("sve")) { +CurFn->addFnAttr( +llvm::Attribute::getWithVScaleRangeArgs(getLLVMContext(), 0, 16)); }

[PATCH] D106277: [SVE] Remove the interface for getMaxVScale in favour of the IR attributes

bsmith added a reviewer: paulwalker-arm. bsmith added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:505-506 + } else if (getContext().getTargetInfo().hasFeature("sve")) { +CurFn->addFnAttr( +

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

bsmith added a comment. Yup, just committed a fix in ed31ff9c7a9e538ead1fa4feecf09987998621b4 , sorry for the noise. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103702/new/

[PATCH] D104643: [AArch64][SVE] Add missing target require to test

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGed31ff9c7a9e: [AArch64][SVE] Add missing target require to test (authored by bsmith). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D104643: [AArch64][SVE] Add missing target require to test

bsmith created this revision. bsmith added a reviewer: peterwaller-arm. Herald added subscribers: psnobl, kristof.beyls, tschuett. Herald added a reviewer: efriedma. bsmith requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

This revision was automatically updated to reflect the committed changes. Closed by commit rG9e7329e37ede: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries (authored by bsmith). Changed prior to commit: https://reviews.llvm.org/D103702?vs=352101=353345#toc

[PATCH] D104539: [Sema][SVE] Properly match builtin ID when using aux target

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG325b6707942d: [Sema][SVE] Properly match builtin ID when using aux target (authored by bsmith). Changed prior to commit:

[PATCH] D104539: [Sema][SVE] Properly match builtin ID when using aux target

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, joechrisellis, sdesmalen. Herald added subscribers: psnobl, tschuett. Herald added a reviewer: efriedma. Herald added a reviewer: aaron.ballman. bsmith requested review of this revision. Herald added a

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

bsmith added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.h:298-299 + bool LittleEndian, + unsigned MinSVEVectorSizeInBitsOverride = 0, + unsigned MaxSVEVectorSizeInBitsOverride = 0);

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

bsmith updated this revision to Diff 352101. bsmith marked an inline comment as done. bsmith added a comment. - Ensure user input is sanitized for when asserts are not enabled - Fix clang format issues Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

bsmith added inline comments. Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.cpp:226 + : SVEVectorBitsMaxOpt), TargetTriple(TT), FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),

[PATCH] D103702: [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries

bsmith updated this revision to Diff 351910. bsmith marked 7 inline comments as done. bsmith added a comment. Herald added a project: clang. Herald added a subscriber: cfe-commits. - Move attribute/command line logic into AArch64TargetMachine. - Fix issue with subtarget key appending integers. -

[PATCH] D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG60c9b5f35cae: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics (authored by bsmith). Repository: rG LLVM Github Monorepo CHANGES

[PATCH] D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics

bsmith updated this revision to Diff 349827. bsmith marked an inline comment as done. bsmith added a comment. - Remove unnecessary complexity when zero-extending dupq operands into a vector. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103082/new/

[PATCH] D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics

bsmith updated this revision to Diff 349525. bsmith added a comment. - Use !isZero() in place of getZExtValue() != 0 - Add end to end tests for ptrue transformation Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103082/new/

[PATCH] D103082: [AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics

bsmith updated this revision to Diff 349241. bsmith retitled this revision from "[AArch64][SVE] Optimize svbool dupq ACLE intrinsic to fixed predicate patterns" to "[AArch64][SVE] Improve codegen for dupq SVE ACLE intrinsics". bsmith edited the summary of this revision. bsmith added a comment.

[PATCH] D103082: [AArch64][SVE] Optimize svbool dupq ACLE intrinsic to fixed predicate patterns

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, joechrisellis, sdesmalen. Herald added subscribers: psnobl, hiraditya, kristof.beyls, tschuett. Herald added a reviewer: efriedma. bsmith requested review of this revision. Herald added projects: clang, LLVM.

[PATCH] D102623: [CodeGen][AArch64][SVE] Canonicalize intrinsic rdffr{ => _z}

bsmith accepted this revision. bsmith added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D102623/new/ https://reviews.llvm.org/D102623

[PATCH] D98030: [IR] Add vscale_range IR function attribute

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG48f5a392cb73: [IR] Add vscale_range IR function attribute (authored by bsmith). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D98487: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length SVE

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGcf0da91ba5e1: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length… (authored by bsmith). Repository: rG LLVM Github

[PATCH] D98487: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length SVE

bsmith updated this revision to Diff 330951. bsmith added a comment. - Remove `SDTFPRoundEvenOp` as it's not a correct mirror of `SDTFPRoundOp` since that is not for `ISD::FROUND`. - Fix comments in `include/llvm/Target/TargetSelectionDAG.td` for `SDTFPRoundOp` and `SDTFPExtendOp`.

[PATCH] D98030: [IR] Add vscale_range IR function attribute

bsmith updated this revision to Diff 330691. bsmith marked 3 inline comments as done. bsmith added a comment. - Prevent vscale_range(0,0) from crashing and instead don't add the attribute - Improve CHECK lines in arm-sve-vector-bits-vscale-range.c test - Test vscale_range(0,0) case and move some

[PATCH] D98487: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length SVE

bsmith added inline comments. Comment at: llvm/include/llvm/Target/TargetSelectionDAG.td:158 ]>; +def SDTFPRoundEvenOp : SDTypeProfile<1, 1, [ // froundeven + SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<0, 1>, SDTCisSameNumEltsAs<0, 1> dmgreen wrote: >

[PATCH] D98487: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length SVE

bsmith updated this revision to Diff 330629. bsmith added a comment. Herald added a subscriber: dexonsmith. - Add AutoUpgrade code to convert aarch64.neon.frintn to roundeven - Add test for above AutoUpgrade Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D98487: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length SVE

bsmith added a comment. > Why is this patch only changing int_aarch64_neon_frintn and not > int_aarch64_sve_frintn? > Is there a particular reason to do so? Things are done slightly differently for SVE in this regard, in principal yes, we could emit roundeven instead of frintn from the ACLE

[PATCH] D98030: [IR] Add vscale_range IR function attribute

bsmith added inline comments. Comment at: llvm/lib/IR/Attributes.cpp:570 +Result += utostr(MinValue); +Result += ','; +Result += utostr(MaxValue); peterwaller-arm wrote: > Nit: The only other precedent I can see for this is `allocsize`. Grepping the

[PATCH] D98030: [IR] Add vscale_range IR function attribute

bsmith updated this revision to Diff 330205. bsmith marked 3 inline comments as done. bsmith added a comment. - State what lack of vscale_range attribute means in LangRef - Minor formatting change Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D98487: [AArch64][SVE/NEON] Add support for FROUNDEVEN for both NEON and fixed length SVE

bsmith created this revision. bsmith added reviewers: paulwalker-arm, peterwaller-arm, joechrisellis, CarolineConcatto, dmgreen. Herald added subscribers: hiraditya, kristof.beyls, tschuett. bsmith requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers:

[PATCH] D98030: [IR] Add vscale_range IR function attribute

bsmith created this revision. bsmith added reviewers: paulwalker-arm, joechrisellis, peterwaller-arm. Herald added subscribers: dexonsmith, jdoerfert, steven_wu, hiraditya. bsmith requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits,

[PATCH] D1810: [ARM] Fix AArch32 and pre-v8 poly types to be unsigned

bsmith abandoned this revision. bsmith added a comment. Herald added subscribers: danielkiss, kristof.beyls. This change is very old and almost certainly out of date, therefore abandoning. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D1810/new/ https://reviews.llvm.org/D1810

[PATCH] D93206: [AArch64][NEON] Remove undocumented vceqz{,q}_p16, vml{a,s}q_n_f64 intrinsics

bsmith accepted this revision. bsmith added a comment. This revision is now accepted and ready to land. Changes look good to me, also can confirm these are in fact not part of the ACLE specification. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION