[clang] [llvm] [RISCV] Add processor definition and scheduling model for XiangShan-KunMingHu (PR #90392)

=?utf-8?b?6YOd5bq36L6+?= Message-ID: In-Reply-To: wangpc-pp wrote: I'd like to see the support of KunMingHu, but please hold this PR and wait for the finalization of KunMingHu's architecture. https://github.com/llvm/llvm-project/pull/90392 ___

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

wangpc-pp wrote: > > > @dyung Can you help me to comfirm whether the Windows builder is passing > > > now? I don't have such environment. Thanks in advance! > > > > > > Sure, I'll try it on our internal builder and see if it passes and let you > > know the result. > > I can confirm that

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

wangpc-pp wrote: @dyung Can you help me to comfirm whether the Windows builder is passing now? I don't have such environment. Thanks in advance! https://github.com/llvm/llvm-project/pull/90373 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/90373 Since C++14 has been released for about nine years and most standard libraries have implemented sized deallocation functions, it's time to make this feature default again. This is another try of

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

wangpc-pp wrote: I don't know why spr added so many reviewers... sorry for bothering. https://github.com/llvm/llvm-project/pull/84877 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp closed https://github.com/llvm/llvm-project/pull/84877 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84877 >From ec68548a470d6d9032a900a725e95b92691657b2 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 14:28:09 +0800 Subject: [PATCH 1/7] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/84877 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

wangpc-pp wrote: > This change is also causing a failure on our internal Windows builder, and a > public Windows bot: > https://lab.llvm.org/buildbot/#/builders/119/builds/17634 > ``` > 88.872 [191/66/4550] Linking CXX executable bin\clang-repl.exe > FAILED: bin/clang-repl.exe > cmd.exe /C "cd

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

wangpc-pp wrote: > Lets revert #90299 to recover bots before the weekend. > Many thanks for reverting it and fixing one of the failures! https://github.com/llvm/llvm-project/pull/83774 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] [clang] fix half && bfloat16 convert node expr codegen (PR #89051)

https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/89051 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] fix half && bfloat16 convert node expr codegen (PR #89051)

@@ -0,0 +1,25 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -disable-O0-optnone -emit-llvm \ +// RUN: %s -o - | opt -S -passes=mem2reg | FileCheck %s + +// CHECK-LABEL: define dso_local half @test_convert_from_bf16_to_fp16( +// CHECK-SAME: bfloat noundef [[A:%.*]])

[clang] [clang] fix half && bfloat16 convert node expr codegen (PR #89051)

@@ -0,0 +1,165 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -disable-O0-optnone -emit-llvm \ +// RUN: %s -o - | opt -S -passes=mem2reg | FileCheck %s + +// CHECK-LABEL: define dso_local half @test_convert_from_bf16_to_fp16( +// CHECK-SAME: bfloat noundef [[A:%.*]])

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84877 >From ec68548a470d6d9032a900a725e95b92691657b2 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 14:28:09 +0800 Subject: [PATCH 1/3] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

https://github.com/wangpc-pp closed https://github.com/llvm/llvm-project/pull/83774 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

@@ -138,6 +155,8 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { /// initializeProperties(). RISCVProcFamilyEnum getProcFamily() const { return RISCVProcFamily; } + RISCVProfileEnum getRISCVProfile() const { return RISCVProfile; } + wangpc-pp

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84877 >From ec68548a470d6d9032a900a725e95b92691657b2 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 14:28:09 +0800 Subject: [PATCH 1/3] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84877 >From ec68548a470d6d9032a900a725e95b92691657b2 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 14:28:09 +0800 Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=

[clang] [llvm] [RISCV] Add subtarget features for profiles (PR #84877)

https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/84877 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add generic CPUs for profiles (PR #84877)

wangpc-pp wrote: > Do you see any disadvantage to going back to adding a feature for the > profiles? Of course not, I will revise this patch tomorrow. Thanks for discussing this! (I missed the sync-up meeting because I forgot the daylight saving...)

[clang] [llvm] [RISCV] Add generic CPUs for profiles (PR #84877)

wangpc-pp wrote: Gentle ping. https://github.com/llvm/llvm-project/pull/84877 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/83774 >From 2ed73672a548b77a36675343b420ef57266e46ab Mon Sep 17 00:00:00 2001 From: wangpc Date: Fri, 14 Jul 2023 10:38:14 +0800 Subject: [PATCH] [clang] Enable sized deallocation by default in C++14 onwards Since

[clang] [lld] [llvm] [RISCV] Split code that tablegen needs out of RISCVISAInfo. (PR #89684)

https://github.com/wangpc-pp approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/89684 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] fix half && bfloat16 convert node expr codegen (PR #89051)

@@ -0,0 +1,194 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +fullbf16 -S -emit-llvm %s -o - | FileCheck %s wangpc-pp wrote:

[clang] [lld] [llvm] [RISCV] Split code that tablegen needs out of RISCVISAInfo. (PR #89684)

https://github.com/wangpc-pp commented: I think this patch doesn't need to be stacked on #89335. https://github.com/llvm/llvm-project/pull/89684 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[clang] [lld] [llvm] [RISCV] Split code that tablegen needs out of RISCVISAInfo. (PR #89684)

@@ -1,12 +1,12 @@ -//===-- RISCVISAInfo.cpp - RISC-V Arch String Parser *- C++ -*-===// wangpc-pp wrote: We shouldn't remove `*- C++ -*` here I think, it's for editors like Emacs. https://github.com/llvm/llvm-project/pull/89684

[clang] [lld] [llvm] [RISCV] Split code that tablegen needs out of RISCVISAInfo. (PR #89684)

https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/89684 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/83774 >From f84c6c7a108d179ffa7f5ec423d852cb667e0f33 Mon Sep 17 00:00:00 2001 From: wangpc Date: Fri, 14 Jul 2023 10:38:14 +0800 Subject: [PATCH] [clang] Enable sized deallocation by default in C++14 onwards Since

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

wangpc-pp wrote: Ping. https://github.com/llvm/llvm-project/pull/83774 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for XiangShan-KunMingHu (PR #89359)

wangpc-pp wrote: Has KunMingHu's RTl been finalized (IIRC, we have developing vector unit)? And can we have different doc for different generations of XiangShan? https://github.com/llvm/llvm-project/pull/89359 ___ cfe-commits mailing list

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

@@ -7238,10 +7238,15 @@ void Clang::ConstructJob(Compilation , const JobAction , Args.addOptInFlag(CmdArgs, options::OPT_frelaxed_template_template_args, options::OPT_fno_relaxed_template_template_args); - // -fsized-deallocation is off by default, as

[clang] [llvm] [RISCV] Add generic CPUs for profiles (PR #84877)

wangpc-pp wrote: Ping. https://github.com/llvm/llvm-project/pull/84877 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add generic CPUs for profiles (PR #84877)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84877 >From ec68548a470d6d9032a900a725e95b92691657b2 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 14:28:09 +0800 Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=

[clang] [llvm] [RISCV] Support Zama16b1p0 (PR #88474)

https://github.com/wangpc-pp approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/88474 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Support Zama16b1p0 (PR #88474)

wangpc-pp wrote: > Can you add it to RVA23 profile? > > https://github.com/llvm/llvm-project/blob/f71e25bb669d662f98823d6d81b3f918538c9239/llvm/lib/Support/RISCVISAInfo.cpp#L250-L284 Never mind, it's an optional extension. https://github.com/llvm/llvm-project/pull/88474

[clang] [llvm] [RISCV] Support Zama16b1p0 (PR #88474)

wangpc-pp wrote: Can you add it to RVA23 profile? https://github.com/llvm/llvm-project/blob/f71e25bb669d662f98823d6d81b3f918538c9239/llvm/lib/Support/RISCVISAInfo.cpp#L250-L284 https://github.com/llvm/llvm-project/pull/88474 ___ cfe-commits mailing

[clang] [llvm] [RISCV] Support Zama16b1p0 (PR #88474)

@@ -704,6 +705,12 @@ // RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s // CHECK-ZACAS-EXT: __riscv_zacas 100{{$}} +// RUN: %clang --target=riscv32 -march=rv32izama16b -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZAMA16B-EXT %s

[clang] [llvm] [RISCV] Add B extension (PR #76893)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/76893 >From 169ef33f585b964d9af7a7628919271245f318fc Mon Sep 17 00:00:00 2001 From: wangpc Date: Thu, 4 Jan 2024 13:05:53 +0800 Subject: [PATCH 1/3] [RISCV] Add B extension It seems that we have `B` extension

[clang] [llvm] [RISCV] Add B extension (PR #76893)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/76893 >From 169ef33f585b964d9af7a7628919271245f318fc Mon Sep 17 00:00:00 2001 From: wangpc Date: Thu, 4 Jan 2024 13:05:53 +0800 Subject: [PATCH 1/2] [RISCV] Add B extension It seems that we have `B` extension

[clang] [llvm] [RISCV] Add B extension (PR #76893)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/76893 >From 169ef33f585b964d9af7a7628919271245f318fc Mon Sep 17 00:00:00 2001 From: wangpc Date: Thu, 4 Jan 2024 13:05:53 +0800 Subject: [PATCH] [RISCV] Add B extension It seems that we have `B` extension again:

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/83774 >From 1e556e00e59377c76c168293d6c2678f7a874742 Mon Sep 17 00:00:00 2001 From: wangpc Date: Fri, 14 Jul 2023 10:38:14 +0800 Subject: [PATCH 1/2] [clang] Enable sized deallocation by default in C++14 onwards

[clang] [clang-tools-extra] [libcxx] [clang] Enable sized deallocation by default in C++14 onwards (PR #83774)

@@ -7238,10 +7238,15 @@ void Clang::ConstructJob(Compilation , const JobAction , Args.addOptInFlag(CmdArgs, options::OPT_frelaxed_template_template_args, options::OPT_fno_relaxed_template_template_args); - // -fsized-deallocation is off by default, as

[clang] [llvm] [RISCV] Zimop/Zcmop are ratified (PR #87966)

https://github.com/wangpc-pp closed https://github.com/llvm/llvm-project/pull/87966 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Zimop/Zcmop are ratified (PR #87966)

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/87966 Remove them from experimental. See also: https://github.com/riscv/riscv-isa-manual/blob/main/src/zimop.adoc >From 5b312a80cdc3396e3e35d906176f56349392d437 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: