From: Rodrigo Siqueira <rodrigo.sique...@amd.com>

Cleanup unused code in DC.

Acked-by: Alex Hung <alex.h...@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c         | 9 ---------
 drivers/gpu/drm/amd/display/dc/dc_hw_types.h     | 3 ---
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h | 4 ----
 3 files changed, 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index d19c67205de6..0f20a3d96d93 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3614,9 +3614,6 @@ static void 
commit_plane_for_stream_offload_fams2_flip(struct dc *dc,
        for (i = 0; i < surface_count; i++) {
                struct dc_plane_state *plane_state = srf_updates[i].surface;
 
-               /* set offload flag so driver does not program address */
-               plane_state->address.offload_flip = true;
-
                for (j = 0; j < dc->res_pool->pipe_count; j++) {
                        struct pipe_ctx *pipe_ctx = 
&context->res_ctx.pipe_ctx[j];
 
@@ -3638,12 +3635,6 @@ static void 
commit_plane_for_stream_offload_fams2_flip(struct dc *dc,
                                stream,
                                srf_updates,
                                surface_count);
-
-       /* reset offload flip flag */
-       for (i = 0; i < surface_count; i++) {
-               struct dc_plane_state *plane_state = srf_updates[i].surface;
-               plane_state->address.offload_flip = false;
-       }
 }
 
 static void commit_planes_for_stream_fast(struct dc *dc,
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h 
b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index 226285037b2b..959ae0df1e56 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -125,9 +125,6 @@ struct dc_plane_address {
        union large_integer page_table_base;
 
        uint8_t vmid;
-       /* dc should use hw flip queue rather than directly programming the 
surface address.
-        * Value is determined on each flip. */
-       bool offload_flip;
 };
 
 struct dc_size {
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h 
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h
index 54f889cfd911..ce93003dae01 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h
@@ -1091,10 +1091,6 @@ void mpc3_power_on_ogam_lut(
 
 void mpc3_init_mpcc(struct mpcc *mpcc, int mpcc_inst);
 
-void mpc3_mpc_init_single_inst(
-       struct mpc *mpc,
-       unsigned int mpcc_id);
-
 enum dc_lut_mode mpc3_get_ogam_current(
        struct mpc *mpc,
        int mpcc_id);
-- 
2.34.1

Reply via email to