Dave, is your 7.1 version of these library blocks available for use by
others? These blocks, and especially the convert block, would be useful
for our pulsar machines.
John
Hi All
There are new blocks in the casper 10.1 DSP library, ported from Dave
McMahon's 7.1 library. Highlights
Dear Sir,
Thank you for your time. I am writing for some further information
about CASPER and correlative works.
I am a graduate student of National Astronomical Observatories
Chinese Academy of Sciences and at present I am dealing with the
digital back end for radio
Hi all.
Is there a repository of stuff like this precompiled for the bee2 ppc
kernel? Or is it necessary to install from source?
I'm intereted in particular in using some of Aaron's python from the corr
python module.
Thanks.
John
. Is it possible this is some sort of race condition in the xflow
program?
The new machine that I'm installing is a quad core 3 GHz 12 MB cache
monster, and maybe some funky bug is showing itself?
Thanks,
Henry
John Ford wrote:
## Preparing software files
Has anyone tried to send 10Gbe data to an iBOB over long (10-15m) CX4
cables?
We find that the iBOB can transmit OK but not receive - its carrier detect
LED
does not light up. We have no problems with 3m cables.
Not sure if changing pre-emphasis or signal level would help as the
problem
We are going to put that fix in the ported version of the library
(it's not in the current green blocks). Right now you need to change
those values to a variable and keep the backpopulate_mask script from
removing that variable to get around the problem.
-Terry
On May 5, 2008, at 6:51 PM,
Obviously it's too early for me to be writing mails. I found the
statement later in the page. But I still think it would be better to call
these required, as without being able to simulate your designs, you're
really up a creek.
John
Hi all.
The following from the bee2 mssge page is missing
Running generate for OS'es, Drivers and Libraries ...
Running generate for lwIP library ...
Generating xemacliteif_g.c ...
Generating lwipopts.h file ...
ERROR:MDT - lwip () - error copying
./src/contrib/ports/v2pro/netif/xemacliteif_polled.c to
it has to do with cygwin/xygwin somehow?
On Tue, Aug 19, 2008 at 1:03 PM, John Ford jf...@nrao.edu wrote:
Running generate for OS'es, Drivers and Libraries ...
Running generate for lwIP library ...
Generating xemacliteif_g.c ...
Generating lwipopts.h file ...
ERROR:MDT - lwip
(I have re-read a prior thread from early May on this topic involving
John, Matt, Jouko, and Francois, however the sourcing information was
from 2005, and the applicability of the information to our situation
was not entirely clear from the conversation. Also perhaps more has
been learned
I did get strange results when my sync pulse was too short, but that is
likely just the block resetting before the reorder finishes.
as laura points out, the FFT's minimum sync pulse period is tricky:
see casper memo #24
http://casper.berkeley.edu/memos/sync_memo_v1.pdf
btw, many people
Hi Glen, and all.
A few weeks ago, there was traffic about the relative inefficiency of the
green block FFT, in terms of resource usage by the reorder blocks.
Glen, I think you mentioned that you had updated the 7.1 library. did I
remember that right? Where can we get this library, if so. We
Hi Glen. I was wondering if your GAVRT library was compatible with the
backport stuff you did. I have a design that builds with the old
libraries that seems to fail with the backported libraries plus your
original gavrt library. I'll send the mdl file if you want to look at it.
It's too big to
On Mon, Oct 20, 2008 at 8:05 AM, John Ford jf...@nrao.edu wrote:
Hi Glen. I was wondering if your GAVRT library was compatible with the
backport stuff you did. I have a design that builds with the old
libraries that seems to fail with the backported libraries plus your
original gavrt library
Does anyone have any suggestions for fixing this error? It seems due
entirely to the large fanout (450!) in the coefficient generator.
We're stuck on this for building our 4K channel 800 MHz pulsar machine.
It is introducing errors into the spectrum.
John
Hi all. Here's a timing error that
MB. Let me know if you want a look at it.)
John
Thanks,
Henry
John Ford wrote:
Hi John,
I've definitely run into the same issue, but haven't had a chance to
tackle it yet. It could be a pain, but I would try to hack the design
to change the PFB coefficients by one LSB or something
Hi all:
I just could not find any documents in casper web site talking about the
control software running in the PowerPC.
So my first question is how can I use the interface between FPGA and
PowerPC? For example, how can I design a block memory which can be written
by ADC module and can be
Hi John:
Could you tell me where is the snap block? Is it a customized block?
They are in the CASPER DSP Blockset/Scopes folder.
John
Thanks
Wan
-Original Message-
From: John Ford [mailto:jf...@nrao.edu]
Sent: Saturday, 8 November 2008 12:33 AM
To: Cheng, Wan (ATNF
Hi Folks,
I've recently acquired an iBOB and an iADC card, and I'm in the
process of setting up my Matlab/MSSGE software. I'm running Matlab
7.6.0 (R2008a) and Simulink v7.1. From Xilinx, I have ISE 10.1,
System Generator 10.1, and EDK 10.1.
However, I want to use the MSSGE version 7.1,
Hi. We just finished getting an ibob up and running from the prom, and we
saw a few strange things that might be related:
1) We had to cycle the power to get the design to load into the FPGA, even
when we checked the right boxes. This is unusual, but not unheard of.
2) We couldn't even get it
Hi guys,
I have installed version 10.1 of the toolflow, and when I try to build a
design, it compiles fine until it gets to the copying base system
step, where I get the following error:
Error using == gen_xps_files at 286
Unpackage base system files failed.
Run out of disk space? Run
Hi all. I've downloaded and installed the 10.1 toolset, the right matlab
stuff, and installed it all. I grabbed the tarball off the casper web
page, installed it, then updated it from svn. I made a simple model of 2
software registers, simulated it, saved it, and ran bee_xps on it. There
is a
Hi all. I decided to check out the Roach subdirectory:
C:\casper\roach\sw\linux\include\linux\netfilter_ipv4\ipt_CLUSTERIP.h
C:\casper\roach\sw\linux\include\linux\netfilter_ipv4\ipt_REJECT.h
In directory 'C:\casper\roach\sw\linux\include\linux\netfilter_ipv4'
Can't open file
Hi. Does anybody know the actual limit on packet size for the
original xilinx and the V2 10 GbE cores? The documents say something
vague like about 8k bytes, but is there a known hard limit to the packet
size in each case?
We want to package up 8K (8192) bytes of data + a few words of framing,
,
but YMMV.
Thanks. We will want to have our system ready to migrate forward, so we
will not push the packet payload past 8192 bytes.
John
Jason
On 22 Jun 2009, at 13:16, John Ford wrote:
Hi. Does anybody know the actual limit on packet size for the
original xilinx and the V2 10 GbE cores
Has anyone ported parspec to 10.1, or failing that, does anyone have a
10.1 design that is similar that could be used in an ibob?
Thanks!
John
Hi all.
Has anyone measured (or calculated...) the maximum power consumption of a
ROACH with a full SX95 chip?
Anyone hazard an estimate, if not a measurement or calculation?
Thanks!
John
, but it doesn't quite work yet. We
have a couple of ROACH boards in the mail to us, so I guess we'll be
migrating to 10.1 soon enough!
John
My compile was 8192 channels (16384 channel) at 200MHz.
Jason
On 27 Jul 2009, at 11:02, John Ford wrote:
I compiled an 8192 channel FFT the other day
Hi, John,
On Aug 28, 2009, at 6:02 , John Ford wrote:
We need a packet-enabled PFB and FFT, and then we could discard this
synchronizer business, but until then, we are stuck using a
synchronous
system. We are running at 1.6 Gs/s.
Do you expect the packet enabled PFB and FFT
Hi,
For the error
ERROR:MDT - opb_ethernetlite (adc_tutorial_ibob_lwip_ethlite) -
E:\work\adc_tutorial\XPS_iBOB_base\system.mhs:369 - invalid license or no
license found!,
since the license for ISE 7.1 is no longer available from the web
(the one from the web is for ISE 11), is the
I get this when trying to sync my SVN:
C:\casper\roach\sw\linux\include\linux\netfilter_ipv4\ipt_REJECT.h
In directory 'C:\casper\roach\sw\linux\include\linux\netfilter_ipv4'
Can't open file
'C:\casper\roach\sw\linux\include\linux\netfilter_ipv4\.svn\tmp\text-base\ipt_TCPMSS.h.svn-base':
The
Hi all. I'm sneaking up on getting my 10.1 development system working.
It works if I run it as an adminstrator, but as myself, it fails thusly:
I fixed this by allowing all users to create files in the root directory,
that is, C:\ . When I hacked mkbof the last time, I replaced mktmp() with
Billy,
I'm using a windows xp (32bit) machine with 2GB memory.
It seems like I have to increase the physical memory. But windows xp
doesn't support 4GB memory.
Does it mean I have to upgrade to 64bit windows xp or some server version?
Hi Zhiwei,
You can put in 4 GB, and use the /3GB boot
Thought this might be of interest:
New Electronics Division Technical Note
EDTN No. 213
Title: Word-Boundary Detection in a Serialized, Gaussian-Distributed,
White-Noise Data Stream
Authors: Matt Morgan, Rick Fisher
Date: October 13, 2009
casper collaborators,
appended below is further info on roach ethernet problems seen at CSIRO:
any ideas?
If I recall correctly, Alan mentioned this problem at the workshop, and
the problem was that some of the PHY chips were faulty at one point. This
may be what's going on. Hopefully
Hi all. I'm installing a new incarnation of our build system on a new
machine. It's 10.1.03. With a simple roach example, I get the following
error:
...
XSG generation complete.
#
## Copying base system ##
#
## Copying
for the idea. i'll let you know how it turns out tomorrow!
It seems that our version 11 system is almost ready to go, too. Just have
to get system generator properly installed.
John
Mark
On Mon, Nov 2, 2009 at 4:18 PM, John Ford jf...@nrao.edu wrote:
Hi all. I'm installing a new incarnation
/binaries/linux/uImage-20091006-mmcfix
should be good. I have never tried pulling such volumes
over the SSH shell, but it works fine with KATCP.
I will ask him to comment further.
Jason
On 30 Oct 2009, at 01:25, John Ford wrote:
casper collaborators,
appended below is further info
Hi all. I'm trying to port a rather complex model to 10.1, and I had
hoped that xlUpdateModel would allow me to do it rather easily, but when I
run it Matlab crashes. It seems to choke on the gavrt library's vacc
module. Has anyone gotten this to work, or should I forget it and just
redraw the
John Ford wrote:
Hi all. I'm getting a message from simulink that my library links
are broken on my pfb and fft, and some other casper and gavrt blocks.
I relinked them, but they are broken again after reconfiguring the
block. Is that normal?
Seems to work OK.
If you change a parameter
OK, so my naive port of guppi from bee2/ibob to roach failed, because I
ran out of resources. After Randy and I updated the 5 designs and
combined them into one design, in my initial try at the port, I told the
dual 2^12 PFB/FFT blocks to optimize for multipliers. I promptly ran out
of slices.
Hi all. I'm looking at using this block, and the documentation doesn't
quite match up to the block. I'm using only zdok0.
The outputs on the block are labelled adc0_i0,adc0_q0, ... ,adc0_i3,adc0_q3.
Are these just demuxed output samples at 1/4 the clock frequency, like on
the ADC, or are they
).
Regards
Andrew
2009/11/11 John Ford jf...@nrao.edu
OK, so my naive port of guppi from bee2/ibob to roach failed, because I
ran out of resources. After Randy and I updated the 5 designs and
combined them into one design, in my initial try at the port, I told the
dual 2^12 PFB/FFT blocks
On Nov 12, 2009, at 16:36 , John Ford wrote:
At least one timing constraint is impossible to meet because
component delays alone exceed the constraint.
I think this means that part of your design synthesized to multiple
levels of combinatorial logic where the sum of each level's component
Hi all. I had a few instances where I left a large build running and came
back to a message on my shell : Matlab Killed
After a few times, it sunk in to my (sometimes thick) head and I realized
this happens if I have a file or a terminal in the XPS_ROACH_base
directory tree open. I guess it's
Hi, John,
What OS was this on?
Red Hat EL 5.3 or 5.2, 64 bit
John
Thanks,
Dave
On Nov 13, 2009, at 4:45 , John Ford wrote:
Hi all. I had a few instances where I left a large build running
and came
back to a message on my shell : Matlab Killed
After a few times, it sunk in to my
Regards
Andrew
2009/11/13 John Ford jf...@nrao.edu
Hi all. I had a few instances where I left a large build running and
came
back to a message on my shell : Matlab Killed
After a few times, it sunk in to my (sometimes thick) head and I
realized
this happens if I have a file or a terminal
By the way, NRAO has a booth at Supercomputing '09 (#2892) I just shipped
out a computer/GPU, a ROACH, and our artificial pulsar so we can try to
put on a demo. Real-time Supercomputing is the theme.
The rest of the booth is the usual NRAO booth you might see at AAS meetings.
I hope it works
Hi all. Does anyone have any info on the roach_spec design that is in the
etch boffiles directory?
More to the point, does anyone have a roach-based spectrometer bof file I
can load into my roach?
The bof I generated locally causes a kernel panic.
John
Hi all. We've been running GUPPI for some time now with a direct
connection from our bee2, bee2 to our host, beef. Works fine, no
dropped packets, etc. Life's fine.
To build our next machine, GUPPI-2, we decided to insert a Fujitsu
XG-2000C switch between them, and now we are losing packets.
, which
isn't till next week.
You sound as though you've seen this before.
:)
John
On Tue, 24 Nov 2009, John Ford wrote:
Hi all. We've been running GUPPI for some time now with a direct
connection from our bee2, bee2 to our host, beef. Works fine, no
dropped packets, etc. Life's fine
switches.
Peter
-Original Message-
From: casper-boun...@lists.berkeley.edu
[mailto:casper-boun...@lists.berkeley.edu] On Behalf Of Dan Werthimer
Sent: Tuesday, November 24, 2009 3:34 PM
To: John Ford
Cc: casper@lists.berkeley.edu
Subject: Re: [casper] 10 GBe Switch weirdness
hi
think the NIC-switch cable length makes much difference. I've
used everything from 0.5m to 5m and they all worked fine. These ports
have some form of auto-equalisation which seems to work very well.
Jason
On 25 Nov 2009, at 15:59, John Ford wrote:
Matt and I have had problems with BEE2 - switch
Hi all.
Anyone have any surplus ibobs and/or iadcs that they could loan us? We
have a couple of projects on a short fuse with no money that could benefit
from some boards.
We could use 2 ibobs and 4 iadcs.
John
Hi all. I saw these demonstrated at SC09. Very cool. :)
http://www.hotlavasystems.com/
Might be of use to some of you.
John
Hi Glenn. I managed to get ours working with the guide. Our exports file
says:
Yes, Master1002 more /etc/exports
/export/home/tofu/cicadaroots 169.254.128.0/24(sync,rw,no_root_squash)
And:
Yes, Master1003 ls /export/home/tofu/cicadaroots/
bee2Guppi filesystem_etch_nfs_2009_07_07.tar.gz
Hello all,
What toolflow did you use to compile your .bof file? Someone correct
me if I'm wrong, but the only version of the CASPER toolflow that will
work with the BEE2 is 7.1. I've tried running designed built using
10.1 on a BEE2, and this is exactly what happened. Though this was
also a
Hi. Does anyone know what the status of this is? Does borph on the bee2
work under 10.1?
John
Hello,
When I've had odd behavior like this before it turned out to be a corrupt
bof file. I would try recopying the design to the BEE2, but admittedly
it's
a bit of a long shot.
Glenn
On
Hi all.
We're working hard on cleaning up our 800 MHz Coherent Dedispersion pulsar
machine for production. We have it working with 8 GPU machines, and from
64 to 2048 coarse channels.
One problem we have is that with our output FPGA that rearranges the data
and ships it off simultaneously over
. will find out.
BORPH has
occasionally acted strangely for us when we use ascii mode so we don't use
it anymore.
Good to know this. By the way, this is all with version 7.1.
Thanks.
John
Mark
On Fri, Jan 29, 2010 at 1:23 PM, John Ford jf...@nrao.edu wrote:
Hi all.
We're working hard
that John Ford is using 8 GPUs
for 800 MHz. Can you get several GPUs on the single bus of a multi-core
host or does that cause too much of a bottle-neck? I also should think
about doing the various piggy-back tasks in parallel. I'm guessing that
setispec on a ROACH is a tight fit. How about two
Hi all. Has anyone seen any problems when using 4 10 GbE ports on a
single FPGA in the BEE2?
We're having some problems where borph access from the control FPGA seems
to lock up when we start up our designs. We've done some testing with
hacked up designs, and we can only make it lock up (so
?
We're about to try that now! Putting a few tens of clocks of delay in the
chain. We can't fully serialize them for obvious reasons. We need at
least 22.5 Gb/second out of the four ports.
John
Billy
-Original Message-
From: John Ford [mailto:jf...@nrao.edu]
Sent: Wednesday
. That one can get *hot*.
Thanks,
Henry
John Ford wrote:
John,
Coincidentally, I've found user 2 to be the worst of the bunch across
the HCRO BEE2s by a good margin. Some variation between units, of
course, but if it were me I'd try to run on a different slot (user 1
or
4) and see
We fixed it! (we think...)
Hi all. Has anyone seen any problems when using 4 10 GbE ports on a
single FPGA in the BEE2?
We're having some problems where borph access from the control FPGA seems
to lock up when we start up our designs. We've done some testing with
hacked up designs, and
left the board on long enough.
Tom
On Mon, Feb 8, 2010 at 12:17 PM, John Ford jf...@nrao.edu wrote:
Hi CASPERites with ROACH boards...
Hi all. I wonder if these are still the recommended versions of
everything.
John
Firmware and Software:
==
You might
The 'dac' yellow block _does include a gateway internally. I believe
the
error is referring to the input data lines, but I haven't figured it out
yet. But I may be barking up the wrong tree because I'm trying to
control
the DAC2x1000-16 (TI DAC5681) DAC - included with our ROACH - but the
HI all. We've been working with some code taken from the workshop
tutorials, tutorial #2. We're trying to configure the 10 gbe block using
the tut2.py example, but it doesn't actually configure anything. Once we
run the configure script, the MAC address and IP address are the defaults
that are
process is running. If not, try'n start it manually from
a roach ssh session:
tgtap -b /proc/313/hw/ioreg/ten_Gbe_v2 -a 192.168.3.14 -t gbe0 -m
02:02:0A:00:00:82 -p 1
Good idea.
I need a remedial course on the innards of the katcp system...
John
Jason
On 01 Apr 2010, at 12:50, John
Hi John,
I had the same problem, but it was fixed after I updated my ROACH
according to Jason's recommendations:
http://www.mail-archive.com/casper@lists.berkeley.edu/msg01370.html
We did check this, but maybe we missed something. We'll have another look.
Also, if you just want to run
Hi all.
Has anyone done a 6 GS/s spectrometer using 2 interleaved 3 GS/s ADC
boards on a ROACH? I seem to recall someone doing something of the sort,
but I don't recall any details.
Thanks for any info!
John
Hi Dave
It may be time to copy our libraries to an mlib_devel_11_1 revision and
continue from there. ROACH2 uses Virtex6 and the 10.x and earlier tools do
not support it. Disadvantages are that a lot of library maintainers will
be
working in mlib_devel_11_1 and bug fixes, changes etc may
hi shilpa,
the early CX4 10Gbe spec didn't supply optional power
through the connector, and the first revision bee2's and
ibob's we built didn't have powered connectors.
but the spec changed several years ago, so i would have
guessed that any modern NIC board would have powered
Hi Mandana
Yes, things have definitely improved since the early Linux versions. I
am now running Matlab R2008b and Xilinx 11.5 on RHEL5 Linux and am
reasonably happy with it. Matlab still segfaults from time-to-time,
but it's manageable. There are still a few quirks (eg Simulink
doesn't
Hi all.
Is it possible to put 2 personalities in an ibob, so that you can select
the personality with a jumper or switch?
John
for our purposes. It's not too big a deal. I
guess we need to move on to roach boards...
John
Thanks,
Henry
On 5/24/2010 11:39 AM, John Ford wrote:
Hi all.
Is it possible to put 2 personalities in an ibob, so that you can select
the personality with a jumper or switch?
John
Thanks, Glenn,
I have not added any PPC code and I am using the 10.1 tools installed
at BWRC, so I assumed those were not the problem, but I just now
built a simple test design with LWIP using the 10.1 tools and it worked!
My guess is that sw registers and such cause the code to grow and
Hi all.
I know folks are working on a hybrid spectrometer using roach/ibob and
GPU's. I am in need of a 1M channel, 2 pol, 400 MHz spectrometer. Anyone
offer up their design as a possibility? I think GUPPI maybe could do it,
but I wonder if anyone else has gotten anything going. Or could you
We have two new lab machines running Fedora 13 64-bit. They both have
Xilinx 11.4 (I think). One has Matlab 2009b and one has 2010a. Both
seem to work (they build bof files OK).
What's supposed to break?
The sysgen/EDK stuff that uses perl scripts seems to be the weak(est?) link.
From
So simulink keeps throwing the same error whenever I try to simulate or
compile something: All Xilinx blocks must be contained in the same
hierarchy as a system generator block. Googling gives me solutions that
don't apply to me; same for the casper archive. The truly mysterious thing
is that
No.
Believe it or not I spent a long time looking everywhere but the
Casper wiki. Should have thought of that because that's where we got
the Myricom card from.
Those listed are at the higher end of the price range I've seen. Looks
like ~$10k is the amount I should be prepared to spend.
And don't forget that the switches that are XFP and SFP+ sometimes
(usually?) don't include the optics for each port in the switch price.
With CX4, all you need is a cable, if you're within a few meters.
Yes - that list is years old.
Those Fujitsu and HP switches have been tested with the
Hi all. We are trying to build models on 11.X for the roach, and they are
failing. Here are the error messages:
Yes, Master752 cat /tmp/jmf.txt
Undefined function or method 'reuse_line' for input arguments of type 'char'.
Error in 'test_jmf/adc083000x2/adc0_sim': Initialization commands
Suraj,
So from what I understand, anyone that wants to use the 3gsps adc, now
needs
to add line
addpath('PATH_TO_MLIB_DEVEL/mlib_devel/casper_library/simulink_drawing_fns')
to their startup.m script?
Thanks.
That fixed the problems.
John
Mark
On Mon, Aug 9, 2010 at 2:43 PM,
Hi Andrea.
This looks to me like some kind of mismatch in the libraries to me. I'm
still using the subversion libraries, and they work fine. I'm going to
move to GIT later today, and I'll try it there and see what happens.
Do you still have your old subversion library installation you can try?
Hi all.
For what it's worth, I just cloned the git tree from berkeley with:
git clone git://casper.berkeley.edu/mlib_devel.git
and it works fine, as far as a quick test. I instantiated an
fft_biplex_real_2x block, and a fft_wideband_real, and they ran fine, and
are OK under the mask.
My
CC: list...
Hi Shrikanth,
I haven't worked extensively with the DRAM, so i'm not sure why you would
be
getting these constant values. But I don't think half the data stored in
memory should be a constant.
Hi Srikanth.
I wonder if this is because of DRAM size? It looks like an addressing
On a related issue, does anybody have any ideas about my connected at
1.4Gbps message that I get when I plug ROACH 10GbE transmit into my
Chelsio NIC? This seems to be a low-level issue, ie, there's no data
being sent from ROACH, it's just the 10GbE yellow block (version 1)
sitting there.
to work right.
So you would run the board at twice the clock rate and demux the output
samples on the FPGA in the simulink model before writing into dram?
Thanks for the info!
John
-Suraj
On Sep 29, 2010, at 5:51 PM, John Ford wrote:
Hi all.
Does anyone have a working example of using
The startup scripts execute tcpborphserver2 by default. There's a bug in
the scripts and it won't work unless it's in your path though (default is
/usr/local/sbin, which is in the path, so no problems). /borph is not a
standard path entry.
Assuming you're running the default filesystem, You
Hi everyone,
I'm having a problem with an iBOB-based spectrometer. The design is a
simple instrument used to measure neutral hydrogen for our
undergraduate radio lab course. The spectra are transmitted over the
10/100 Mb ethernet using a modified main.c file where I read the
channels out of
Maybe it's overheating? Do you have a little fan right on the FPGA?
We've found that is necessary, even in a proper case. We cut a hole
in
the lid and add a fan right over the chip.
Interesting idea. I do have a small fan attached to the iBOB heat
sink. It was running at the time. The
Hi all.
Do any of you have any xilinx designs that implement SPEAD protocol
packets over 10 GbE?
John
1min integrations
before integer overflows. Note that our F engines expect KATADCs. You
might need to recompile for iADC and update the config file as
appropriate.
Next year we will be adding beamformers to the X engines.
Jason
On 11/29/2010 8:12 AM, John Ford wrote:
Hi all.
Do any
-)system, a full
BOM must be used to make a meaningful comparison.
Matt
On Mon, 9 Aug 2010, John Ford wrote:
And don't forget that the switches that are XFP and SFP+ sometimes
(usually?) don't include the optics for each port in the switch price.
With CX4, all you need is a cable, if you're
pricing switches, or any sort of (sub-)system, a full
BOM must be used to make a meaningful comparison.
Matt
On Mon, 9 Aug 2010, John Ford wrote:
And don't forget that the switches that are XFP and SFP+ sometimes
(usually?) don't include the optics for each port in the switch
price
the heck would you *not* have a heterogenous bunch of
networks, transcievers, and media once the first working products were out
for a few years?
John
Tom
On Sat, Jan 29, 2011 at 9:57 AM, John Ford jf...@nrao.edu wrote:
Can one use the zarlink (or something like it) on the ROACH end
That's awesome, David. Can't wait for the first R-II Spectrometer...
We'll be waiting for more news!
John
Hi All.
As you may know a new CASPER board is in the pipeline called ROACH 2.
The design is centred around a Xilinx Virtex-6 SX475T FPGA. It should
be, roughly, a 4-times improvement
Hello,
The 10GbE hardware page[1] has not been updated in a while (June 2009),
and I wonder someone had the chance to test other kind of switches.
For now, I think that the best choice is the Fujitsu XG2000C. Any
recommendation of distributor/reseller in US? I have quotations right
now
Hello list,
I'm trying to give a roach a static IP since dhcp is not allowed. There is
http://gmrt.ncra.tifr.res.in/gmrt_hpage/sub_system/corr/Iru/Roach_BOOT_proc1_V3.pdf
which says bootargs can have ip=ownip:gatewayip:netmask. So I'm
trying this:
setenv bootargs console=ttyS0,115200n8
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