> On Aug 25, 2021, at 11:41 PM, Tony Duell wrote:
>
> On Wed, Aug 25, 2021 at 7:47 PM Paul Koning wrote:
>>
>>
>>
>>> On Aug 25, 2021, at 2:21 PM, Tony Duell via cctalk
>>> wrote:
>>>
>>> On Wed, Aug 25, 2021 at 7:17 PM Patrick Finnegan via cctalk
>>> wrote:
Landscape
On 26/08/2021 04:41, Tony Duell via cctalk wrote:
And yes there were CRTs set up at the factory for the northern and
southern hemispheres. I remember Bang and Olufsen made a TV where the
CRT was effectively mounted upside-down (so that the EHT connector was
far enough from the cabinet to meet
On Wed, Aug 25, 2021 at 7:47 PM Paul Koning wrote:
>
>
>
> > On Aug 25, 2021, at 2:21 PM, Tony Duell via cctalk
> > wrote:
> >
> > On Wed, Aug 25, 2021 at 7:17 PM Patrick Finnegan via cctalk
> > wrote:
> >>
> >> Landscape monitors work fine as portrait for me when I turn them on their
> >>
On Wed, Aug 25, 2021 at 7:33 PM Josh Dersch wrote:
>
> On Wed, Aug 25, 2021 at 11:19 AM Tony Duell via cctalk
> wrote:
>>
>> On Wed, Aug 25, 2021 at 7:07 PM ben via cctalk wrote:
>> >
>> > On 2021-08-25 11:08 a.m., Josh Dersch via cctalk wrote:
>> >
>> > > (The Three Rivers PERQ included a
Thanks for the suggestions, all --- more than I was expecting! I have
plenty of reading waiting for me now, but I hope people won't let that stop
them from sharing other examples.
Cheers,
--Tom
On Wed, Aug 25, 2021 at 6:08 PM Josh Dersch wrote:
> On Mon, Aug 23, 2021 at 5:38 PM Tom Stepleton
On 2021-08-25 3:40 p.m., Van Snyder via cctalk wrote:
On Wed, 2021-08-25 at 14:08 -0700, Fred Cisin via cctalk wrote:
That is not how C defines bytes or ints, fyi.
On Wed, 25 Aug 2021, ben via cctalk wrote:
I suspect the standard says a byte is at least 7 bits.
Thus 8 bit data is NOT
On Wed, 2021-08-25 at 14:08 -0700, Fred Cisin via cctalk wrote:
> >> That is not how C defines bytes or ints, fyi.
>
> On Wed, 25 Aug 2021, ben via cctalk wrote:
> > I suspect the standard says a byte is at least 7 bits.
> > Thus 8 bit data is NOT PORTABLE.
>
> I don't know from "the standard",
On 2021-08-25 3:23 p.m., Van Snyder via cctalk wrote:
> On Wed, 2021-08-25 at 14:58 -0400, Todd Goodman via cctalk wrote:
>> P.110 of https://walden-family.com/bbn/bbn-print2.pdf has some slight
>> information.
>>
>> It was advertised by Bolt, Beranek and Newman as the first computer
>> to
>> be
> On 08/25/2021 2:23 PM Van Snyder via cctalk wrote:
>
>
> The C language appears to have been designed as a high-level assembler
> for machines like the PDP-11, which first appeared ca 1970. At least
> that's what the Wikipedioa article about the B language appears to say.
Dennis
That is not how C defines bytes or ints, fyi.
On Wed, 25 Aug 2021, ben via cctalk wrote:
I suspect the standard says a byte is at least 7 bits.
Thus 8 bit data is NOT PORTABLE.
I don't know from "the standard", but, K said that
an "int" could be whatever size was most convenient for the
On Wed, Aug 25, 2021, 09:50 ben via cctalk wrote:
> On 2021-08-25 1:25 a.m., Eric Smith via cctalk wrote:
> >
> > 432 GDP instructions were bit-aligned in an instruction object, and
> > occupied anywhere from 6 to 344 bits.
>
> Did not the IBM 7030 try a similar idea.
> All this work to replace
On Wed, 2021-08-25 at 14:58 -0400, Todd Goodman via cctalk wrote:
> P.110 of https://walden-family.com/bbn/bbn-print2.pdf has some slight
> information.
>
> It was advertised by Bolt, Beranek and Newman as the first computer
> to
> be designed around the C language.
This says the computer was
> On Aug 25, 2021, at 2:58 PM, Todd Goodman via cctalk
> wrote:
>
> ...
> P.110 of https://walden-family.com/bbn/bbn-print2.pdf has some slight
> information.
>
> It was advertised by Bolt, Beranek and Newman as the first computer to be
> designed around the C language.
>
> It had 10-bit
On 8/25/2021 1:58 PM, ben via cctalk wrote:
On 2021-08-25 10:27 a.m., Todd Goodman via cctalk wrote:
On 8/25/2021 11:49 AM, ben via cctalk wrote:
[..SNIP..]
C uses cheap tricks for speed. 8 bit bytes, 32 bit integers, taken
from B. I have 21 bit CPU, with 3 7 bit bytes/word. Algol would
> On Aug 25, 2021, at 2:21 PM, Tony Duell via cctalk
> wrote:
>
> On Wed, Aug 25, 2021 at 7:17 PM Patrick Finnegan via cctalk
> wrote:
>>
>> Landscape monitors work fine as portrait for me when I turn them on their
>> side.
>
> You may have problems converging a colour CRT, particularly
On Wed, Aug 25, 2021 at 11:19 AM Tony Duell via cctalk <
cctalk@classiccmp.org> wrote:
> On Wed, Aug 25, 2021 at 7:07 PM ben via cctalk
> wrote:
> >
> > On 2021-08-25 11:08 a.m., Josh Dersch via cctalk wrote:
> >
> > > (The Three Rivers PERQ included a similar "RASTEROP" instruction in its
>
>
On 2021-08-25 2:17 p.m., Patrick Finnegan via cctalk wrote:
> On Wed, Aug 25, 2021 at 2:07 PM ben via cctalk
> wrote:
>
>> All rendered useless if you move to gray or color. Sadly almost
>> all monitors are landscape rather than portrait, so we may never see
>> a good emulation of them.
>>
>
>
On Wed, Aug 25, 2021 at 7:17 PM Patrick Finnegan via cctalk
wrote:
>
> Landscape monitors work fine as portrait for me when I turn them on their
> side.
You may have problems converging a colour CRT, particularly an in-line
gun type, if you do that. They are designed for the earth's magnetic
On Wed, Aug 25, 2021 at 7:07 PM ben via cctalk wrote:
>
> On 2021-08-25 11:08 a.m., Josh Dersch via cctalk wrote:
>
> > (The Three Rivers PERQ included a similar "RASTEROP" instruction in its
Well, it might do.There is no requirement for the PERQ machine code
instruction set to include that, or
On Wed, Aug 25, 2021 at 2:07 PM ben via cctalk
wrote:
> All rendered useless if you move to gray or color. Sadly almost
> all monitors are landscape rather than portrait, so we may never see
> a good emulation of them.
>
Landscape monitors work fine as portrait for me when I turn them on their
On 2021-08-25 11:08 a.m., Josh Dersch via cctalk wrote:
(The Three Rivers PERQ included a similar "RASTEROP" instruction in its
repertoire, which was similar to BITBLT but also allowed for various
logical operations to be applied to the source and destination.)
All rendered useless if you
On 2021-08-25 10:27 a.m., Todd Goodman via cctalk wrote:
On 8/25/2021 11:49 AM, ben via cctalk wrote:
[..SNIP..]
C uses cheap tricks for speed. 8 bit bytes, 32 bit integers, taken
from B. I have 21 bit CPU, with 3 7 bit bytes/word. Algol would have a
PACK/UPACK function, and be fairly
On Mon, Aug 23, 2021 at 5:38 PM Tom Stepleton via cctalk <
cctalk@classiccmp.org> wrote:
> Hello,
>
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions
On 8/25/21 9:27 AM, Todd Goodman via cctalk wrote:
>
> Nope, the standard doesn't specify those bit sizes.
>
> Back in the 80s I was using the BBN C Machine with 10-bit bytes and
> happily building from source I picked up on the newsgroups with little
> issue
>
Or, you could simply be
On 8/25/2021 11:49 AM, ben via cctalk wrote:
[..SNIP..]
C uses cheap tricks for speed. 8 bit bytes, 32 bit integers, taken
from B. I have 21 bit CPU, with 3 7 bit bytes/word. Algol would have a
PACK/UPACK function, and be fairly portable. C on the other hand a mess.
Ok. I don't have 21 bit
On 2021-08-25 9:58 a.m., Toby Thain via cctalk wrote:
That is not how C defines bytes or ints, fyi.
I suspect the standard says a byte is at least 7 bits.
Thus 8 bit data is NOT PORTABLE.
Ben.
On 2021-08-25 11:49 a.m., ben via cctalk wrote:
> On 2021-08-25 1:25 a.m., Eric Smith via cctalk wrote:
>>
>> 432 GDP instructions were bit-aligned in an instruction object, and
>> occupied anywhere from 6 to 344 bits.
>
> Did not the IBM 7030 try a similar idea.
> All this work to replace a
On 2021-08-25 1:25 a.m., Eric Smith via cctalk wrote:
432 GDP instructions were bit-aligned in an instruction object, and
occupied anywhere from 6 to 344 bits.
Did not the IBM 7030 try a similar idea.
All this work to replace a punched card.
Funny how records where simple on decimal computers
On Mon, Aug 23, 2021 at 6:38 PM Tom Stepleton via cctalk <
cctalk@classiccmp.org> wrote:
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions for any CPU
Another interesting architecture, not sure if it quite fits your question: the
orthogonal computer. You could think of that as vector processor with serial
arithmetic -- a cross of a Cray-1 and a PDP-8/S :-) It was invented in the
1960s by William Shooman, and sold for a time by Sanders
On Tue, 2021-08-24 at 11:11 -0700, Chuck Guzis via cctalk wrote:
> On 8/24/21 10:40 AM, Van Snyder via cctalk wrote:
>
> > That's the BLAS SAXPY (or DAXPY) routine, a fundamental step in
> > Gaussian elimination.
>
> Speaking of which, do any specimens of the Saxpy Matrix-1 still
> exist?
>
On 8/23/2021 8:51 PM, Van Snyder via cctech wrote:
On Tue, 2021-08-24 at 01:38 +0100, Tom Stepleton via cctalk wrote:
For the sake of illustration to folks who are not necessarily used to
thinking about what computers do at the machine code level, I'm
interested
in collecting examples of single
The Hitachi SH4 has a set of pipelineable vector instructions that
work on 4x4 and 4x1 length vectors (implemented as 2 sets of 16 FP
registers). Nothing compared to MMX/SSE/AVX, but relatively complex.
As a followup, I did find the following article about the Saxpy Matrix-1:
https://techmonitor.ai/techonology/the_saxpy_affair_and_why_we_all_have_to_worry_about_the_theft_of_its_secrets
--Chuck
On 8/24/21 10:40 AM, Van Snyder via cctalk wrote:
> That's the BLAS SAXPY (or DAXPY) routine, a fundamental step in
> Gaussian elimination.
Speaking of which, do any specimens of the Saxpy Matrix-1 still exist?
Saxpy Computer was a brief flash in the supercomputing universe; fell
onto bad times
On Tue, 2021-08-24 at 15:55 +, dwight via cctalk wrote:
> DSP processors, like the 2100 series of Analog Devices, one single
> instruction that would take value from one array and multiply it by a
> value from another array and then add it to another array, while
> incrementing the indexes.
t; From: cctalk On Behalf Of Tom Stepleton
> via cctalk
> Sent: 24 August 2021 01:39
> To: cctalk@classiccmp.org
> Subject: Extremely CISC instructions
>
> Hello,
>
> For the sake of illustration to folks who are not necessarily used to thinking
> about what c
On Tue, 24 Aug 2021, Tom Stepleton via cctalk wrote:
Hello,
For the sake of illustration to folks who are not necessarily used to
thinking about what computers do at the machine code level, I'm interested
in collecting examples of single instructions for any CPU architecture that
are unusually
On Tue, Aug 24, 2021 at 11:38:42AM -0400, Paul Koning wrote:
>
>
> > On Aug 24, 2021, at 6:34 AM, Diane Bruce wrote:
> >
> > On Mon, Aug 23, 2021 at 09:09:55PM -0400, Paul Koning via cctalk wrote:
> >>
> >>
> >>> On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk
> >>> wrote:
> >>>
...
> On Aug 24, 2021, at 11:57 AM, Peter Corlett via cctalk
> wrote:
>
> On Tue, Aug 24, 2021 at 08:47:33AM -0500, John Foust via cctalk wrote:
>> At 04:13 AM 8/24/2021, Peter Corlett via cctalk wrote:
>>> move.b ([0x12345678, %pc, %d0.w*8], 0x9abcdef0), ([0x87654321, %sp], %a0*4,
>>>
On Tue, Aug 24, 2021 at 08:47:33AM -0500, John Foust via cctalk wrote:
> At 04:13 AM 8/24/2021, Peter Corlett via cctalk wrote:
>> move.b ([0x12345678, %pc, %d0.w*8], 0x9abcdef0), ([0x87654321, %sp], %a0*4,
>> 0x0fedcba9)
> And which language and compiler case was this aimed at?
I have no idea
DSP processors, like the 2100 series of Analog Devices, one single instruction
that would take value from one array and multiply it by a value from another
array and then add it to another array, while incrementing the indexes.
I'd say that was CISC like.
Dwight
> On Aug 24, 2021, at 6:34 AM, Diane Bruce wrote:
>
> On Mon, Aug 23, 2021 at 09:09:55PM -0400, Paul Koning via cctalk wrote:
>>
>>
>>> On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk
>>> wrote:
>>>
>>> Hello,
>>>
>>> For the sake of illustration to folks who are not necessarily
On 8/24/21 3:34 AM, Diane Bruce via cctalk wrote:
> Indeed. Just its addressing modes, with indirection and two separate register
> indexing operations, are hairy enough. Then consider the decimal arithmetic
> instructions that might have up to 6 operands.
>
> And who can ever forget the built
On Mon, Aug 23, 2021 at 09:09:55PM -0400, Paul Koning via cctalk wrote:
>
>
> > On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk
> > wrote:
> >
> > Hello,
> >
> > For the sake of illustration to folks who are not necessarily used to
> > thinking about what computers do at the machine
At 04:13 AM 8/24/2021, Peter Corlett via cctalk wrote:
>move.b ([0x12345678, %pc, %d0.w*8], 0x9abcdef0), ([0x87654321, %sp], %a0*4,
>0x0fedcba9)
And which language and compiler case was this aimed at?
Wasn't that a primary driver for complex CISC instructions? That if it
happened often
> On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk
> wrote:
>
> Hello,
>
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions for any CPU
On Tue, Aug 24, 2021 at 01:38:33AM +0100, Tom Stepleton via cctalk wrote:
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions for any CPU architecture
>
On 8/23/21 5:38 PM, Tom Stepleton via cctalk wrote:
Have a look at the instruction set for the STAR-100:
http://bitsavers.org/pdf/cdc/cyber/cyber_200/60256000_STAR-100hw_Dec75.pdf
I'm not quite sure if I've ever used a system with more
instructions+variations.
--Chuck
On 8/23/21 7:38 PM, Tom Stepleton via cctalk wrote:
Hello,
For the sake of illustration to folks who are not necessarily used to
thinking about what computers do at the machine code level, I'm interested
in collecting examples of single instructions for any CPU architecture that
are unusually
> I'm interested in collecting examples of single instructions for any CPU
> architecture that are unusually prolific in one way or another.
The Prime 50 Series has a few candidates:
1. The procedure call instruction allocates a stack frame, saves the
calling procedure's state, then
>Hello,
>
>For the sake of illustration to folks who are not necessarily used to
>thinking about what computers do at the machine code level, I'm interested
>in collecting examples of single instructions for any CPU architecture that
>are unusually prolific in one way or another. This request is
On Tue, 2021-08-24 at 01:38 +0100, Tom Stepleton via cctalk wrote:
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm
> interested
> in collecting examples of single instructions for any CPU
> architecture that
On 2021-08-23 7:09 p.m., Paul Koning via cctalk wrote:
On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk
wrote:
Hello,
For the sake of illustration to folks who are not necessarily used to
thinking about what computers do at the machine code level, I'm interested
in collecting
> On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk
> wrote:
>
> Hello,
>
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions for any CPU
Hello,
For the sake of illustration to folks who are not necessarily used to
thinking about what computers do at the machine code level, I'm interested
in collecting examples of single instructions for any CPU architecture that
are unusually prolific in one way or another. This request is highly
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