llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Sergei Barannikov (s-barannikov)
Changes
EnumArgument may be a string or an identifier. If it is a string, it should be
parsed as unevaluated string literal. Add IsString flag to EnumArgument so that
the parser can choose the correct
https://github.com/s-barannikov ready_for_review
https://github.com/llvm/llvm-project/pull/68550
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/68550
>From 96dd0121b095f92cc66fcfc3ef08a19d0b2d6bec Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 9 Oct 2023 01:38:33 +0300
Subject: [PATCH 1/2] [clang] Differentiate between identifier and string
11happy wrote:
@PiotrZSL can you please review the changes.
thank you.
https://github.com/llvm/llvm-project/pull/77816
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/SihangZhu updated
https://github.com/llvm/llvm-project/pull/77185
>From ed0a694dbf7cb8e6775b53f3553f4ec7d1fdbee2 Mon Sep 17 00:00:00 2001
From: SihangZhu
Date: Sat, 6 Jan 2024 15:43:41 +0800
Subject: [PATCH] [libunwind] fix dynamic .eh_frame registration
---
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/68550
>From 96dd0121b095f92cc66fcfc3ef08a19d0b2d6bec Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 9 Oct 2023 01:38:33 +0300
Subject: [PATCH] [clang] Differentiate between identifier and string
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/68550
>From 96dd0121b095f92cc66fcfc3ef08a19d0b2d6bec Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 9 Oct 2023 01:38:33 +0300
Subject: [PATCH] [clang] Differentiate between identifier and string
Author: Kazu Hirata
Date: 2024-01-12T22:08:28-08:00
New Revision: 6bd488dd24cc06daea0d9a9dea0e2843f4c8d38e
URL:
https://github.com/llvm/llvm-project/commit/6bd488dd24cc06daea0d9a9dea0e2843f4c8d38e
DIFF:
https://github.com/llvm/llvm-project/commit/6bd488dd24cc06daea0d9a9dea0e2843f4c8d38e.diff
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff fc2766c1d4776a8e56a7b931a779c57bf7ed3d8b
9081bb6aa1e461893680f0ab91048a5ca1cd680a --
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Craig Topper (topperc)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/78021.diff
6 Files Affected:
- (modified) clang/test/Preprocessor/riscv-target-features.c (+9-9)
- (modified) llvm/docs/RISCVUsage.rst (+1-1)
-
https://github.com/topperc created
https://github.com/llvm/llvm-project/pull/78021
None
>From 9081bb6aa1e461893680f0ab91048a5ca1cd680a Mon Sep 17 00:00:00 2001
From: Craig Topper
Date: Fri, 12 Jan 2024 22:01:03 -0800
Subject: [PATCH] [RISCV] Bump Zfbfmin, Zvfbfmin, and Zvfbfwma to 1.0.
---
@@ -29,6 +29,12 @@ namespace llvm {
class StringRef;
class SparcSubtarget : public SparcGenSubtargetInfo {
+ // Reserve*Register[i] - *#i is not available as a general purpose register.
+ BitVector ReserveGRegister;
s-barannikov wrote:
Can this be a single
@@ -98,9 +96,34 @@ BitVector SparcRegisterInfo::getReservedRegs(const
MachineFunction ) const {
for (unsigned n = 0; n < 31; n++)
Reserved.set(SP::ASR1 + n);
+ for (size_t i = 0; i < SP::IntRegsRegClass.getNumRegs() / 4; ++i) {
+// Mark both single register and
@@ -80,6 +86,11 @@ class SparcSubtarget : public SparcGenSubtargetInfo {
return is64Bit() ? 2047 : 0;
}
+ bool isGRegisterReserved(size_t i) const { return ReserveGRegister[i]; }
+ bool isORegisterReserved(size_t i) const { return ReserveORegister[i]; }
+ bool
@@ -98,9 +96,34 @@ BitVector SparcRegisterInfo::getReservedRegs(const
MachineFunction ) const {
for (unsigned n = 0; n < 31; n++)
Reserved.set(SP::ASR1 + n);
+ for (size_t i = 0; i < SP::IntRegsRegClass.getNumRegs() / 4; ++i) {
+// Mark both single register and
owenca wrote:
See #77977.
https://github.com/llvm/llvm-project/pull/76733
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tbaederr closed
https://github.com/llvm/llvm-project/pull/71919
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Author: Timm Baeder
Date: 2024-01-13T05:51:03+01:00
New Revision: fc2766c1d4776a8e56a7b931a779c57bf7ed3d8b
URL:
https://github.com/llvm/llvm-project/commit/fc2766c1d4776a8e56a7b931a779c57bf7ed3d8b
DIFF:
https://github.com/llvm/llvm-project/commit/fc2766c1d4776a8e56a7b931a779c57bf7ed3d8b.diff
https://github.com/MaskRay closed
https://github.com/llvm/llvm-project/pull/69823
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/MaskRay edited
https://github.com/llvm/llvm-project/pull/69823
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/MaskRay edited
https://github.com/llvm/llvm-project/pull/69823
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/MaskRay approved this pull request.
This is correct. `llvm/examples/Kaleidoscope/Chapter2/toy.cpp` doesn't use LLVM.
https://github.com/llvm/llvm-project/pull/69823
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://github.com/benshi001 updated
https://github.com/llvm/llvm-project/pull/77902
>From 97d753446ffc8eb9c701effb52dd671afc73e1dd Mon Sep 17 00:00:00 2001
From: Ben Shi
Date: Fri, 12 Jan 2024 18:17:39 +0800
Subject: [PATCH 1/2] [clang][analyzer] Improve modeling of 'fseeko' and
'ftello' in
@@ -288,9 +288,9 @@ def SPEFSCR: SPR<512, "spefscr">, DwarfRegNum<[612, 112]>;
def XER: SPR<1, "xer">, DwarfRegNum<[76]>;
-// Carry bit. In the architecture this is really bit 0 of the XER register
-// (which really is SPR register 1); this is the only bit interesting to a
@@ -782,6 +782,8 @@ ArrayRef PPCTargetInfo::getGCCRegNames()
const {
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
// While some of these aliases do map to different registers
// they still share the same register name.
+// Strictly speaking,
https://github.com/hstk30-hw updated
https://github.com/llvm/llvm-project/pull/77907
>From 8e1d61de36a3b6ffe8b28713988898fad89ab685 Mon Sep 17 00:00:00 2001
From: Longsheng Mou
Date: Fri, 12 Jan 2024 18:24:08 +0800
Subject: [PATCH] [X86_64] fix empty structure vaarg in c++
SizeInBytes of
https://github.com/hstk30-hw updated
https://github.com/llvm/llvm-project/pull/77907
>From 0cb5f9a36721e55789f7f60c557d4c23a2d747a2 Mon Sep 17 00:00:00 2001
From: Longsheng Mou
Date: Fri, 12 Jan 2024 18:24:08 +0800
Subject: [PATCH] [X86_64] fix empty structure vaarg in c++
SizeInBytes of
Author: Kazu Hirata
Date: 2024-01-12T18:39:51-08:00
New Revision: 771ab15e4881b9c4adaabb694d901c3dbeb1fa47
URL:
https://github.com/llvm/llvm-project/commit/771ab15e4881b9c4adaabb694d901c3dbeb1fa47
DIFF:
https://github.com/llvm/llvm-project/commit/771ab15e4881b9c4adaabb694d901c3dbeb1fa47.diff
Author: Kazu Hirata
Date: 2024-01-12T18:39:49-08:00
New Revision: eccd279979ac210248cdf7d583169df6a8e552bd
URL:
https://github.com/llvm/llvm-project/commit/eccd279979ac210248cdf7d583169df6a8e552bd
DIFF:
https://github.com/llvm/llvm-project/commit/eccd279979ac210248cdf7d583169df6a8e552bd.diff
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (rmarker)
Changes
Resolves #78014
---
Full diff: https://github.com/llvm/llvm-project/pull/78015.diff
7 Files Affected:
- (modified) clang/docs/ClangFormatStyleOptions.rst (+5)
- (modified) clang/docs/ReleaseNotes.rst (+1)
-
github-actions[bot] wrote:
Thank you for submitting a Pull Request (PR) to the LLVM Project!
This PR will be automatically labeled and the relevant teams will be
notified.
If you wish to, you can add reviewers by using the "Reviewers" section on this
page.
If this is not working for you, it
https://github.com/rmarker created
https://github.com/llvm/llvm-project/pull/78015
Resolves #78014
>From 7b072cbf52418e92962bb8eb8a24471e5c01f1ea Mon Sep 17 00:00:00 2001
From: rmarker
Date: Wed, 10 Jan 2024 10:55:51 +1030
Subject: [PATCH] [clang-format] Add PenaltyBreakScopeResolution
https://github.com/brad0 closed https://github.com/llvm/llvm-project/pull/77195
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Author: Koakuma
Date: 2024-01-12T21:21:32-05:00
New Revision: 5fa4b1d83c80769f6003ae8aa504a21e64ddde63
URL:
https://github.com/llvm/llvm-project/commit/5fa4b1d83c80769f6003ae8aa504a21e64ddde63
DIFF:
https://github.com/llvm/llvm-project/commit/5fa4b1d83c80769f6003ae8aa504a21e64ddde63.diff
LOG:
@@ -1304,6 +1304,18 @@ TEST_F(FormatTestCSharp, CSharpGenericTypeConstraints) {
"}",
Style);
+ // When the where line is not to be formatted, following lines should not
take
+ // on its indentation.
+ verifyFormat("class ItemFactory\n"
https://github.com/MaskRay approved this pull request.
https://github.com/llvm/llvm-project/pull/76432
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/sstwcw updated
https://github.com/llvm/llvm-project/pull/76378
>From 7a8939bcd41cdfafe0546502064a6378ba117d60 Mon Sep 17 00:00:00 2001
From: sstwcw
Date: Tue, 26 Dec 2023 03:07:58 +
Subject: [PATCH 1/2] [clang-format] Stop aligning the to continuation lines
Some
@@ -3963,6 +3963,60 @@ implicitly included in later levels.
- ``-march=x86-64-v3``: (close to Haswell) AVX, AVX2, BMI1, BMI2, F16C, FMA,
LZCNT, MOVBE, XSAVE
- ``-march=x86-64-v4``: AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
+`Intel AVX10 ISA
@@ -3963,6 +3963,60 @@ implicitly included in later levels.
- ``-march=x86-64-v3``: (close to Haswell) AVX, AVX2, BMI1, BMI2, F16C, FMA,
LZCNT, MOVBE, XSAVE
- ``-march=x86-64-v4``: AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
+`Intel AVX10 ISA
@@ -3963,6 +3963,60 @@ implicitly included in later levels.
- ``-march=x86-64-v3``: (close to Haswell) AVX, AVX2, BMI1, BMI2, F16C, FMA,
LZCNT, MOVBE, XSAVE
- ``-march=x86-64-v4``: AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
+`Intel AVX10 ISA
https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/77925
>From cc0f2b24299bdfc9216ee87ab1aba08707f95503 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Fri, 12 Jan 2024 21:29:50 +0800
Subject: [PATCH 1/3] [AVX10][Doc] Add documentation about AVX10 options and
jhuber6 wrote:
> As a somewhat naive question, what would it take to turn off requiring
> codegen to be in SCC order? We seem to be the only target doing that. The
> comments on that line say something about function calls and noinline
I believe this is also the reason parallel codegen via
llvmbot wrote:
@llvm/pr-subscribers-clang-format
@llvm/pr-subscribers-clang
Author: None (rmarker)
Changes
Resolves #78010
---
Full diff: https://github.com/llvm/llvm-project/pull/78011.diff
7 Files Affected:
- (modified) clang/docs/ClangFormatStyleOptions.rst (+8)
- (modified)
github-actions[bot] wrote:
Thank you for submitting a Pull Request (PR) to the LLVM Project!
This PR will be automatically labeled and the relevant teams will be
notified.
If you wish to, you can add reviewers by using the "Reviewers" section on this
page.
If this is not working for you, it
https://github.com/rmarker created
https://github.com/llvm/llvm-project/pull/78011
Resolves #78010
>From c4d28f82e108f9f12ccd0375e2a3502025b8c1e8 Mon Sep 17 00:00:00 2001
From: rmarker
Date: Thu, 11 Jan 2024 15:01:18 +1030
Subject: [PATCH] [clang-format] Add ShortReturnTypeLength option.
---
@@ -3655,8 +3661,7 @@ void Fortran::lower::genOpenMPDeclarativeConstruct(
Fortran::lower::pft::Evaluation ,
const Fortran::parser::OpenMPDeclarativeConstruct ) {
genOMP(converter, eval, omp);
kparzysz wrote:
I made all `genOMP` functions have the
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/77758
>From 62f31654ec66fe0e2a27200d0484d3c70d4ce2c1 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Wed, 20 Dec 2023 15:12:04 -0600
Subject: [PATCH 1/5] [Flang][OpenMP] Separate creation of work-sharing and
@@ -5336,6 +5336,7 @@ X86:
operand in a SSE register. If AVX is also enabled, can also be a 256-bit
vector operand in an AVX register. If AVX-512 is also enabled, can also be a
512-bit vector operand in an AVX512 register. Otherwise, an error.
+- ``Ws``: A symbolic
@@ -26,9 +30,23 @@ if(LLVM_BUILD_INSTRUMENTED)
message(STATUS "To enable merging PGO data LLVM_PROFDATA has to point to
llvm-profdata")
else()
add_custom_target(generate-profdata
- COMMAND "${Python3_EXECUTABLE}"
${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 3bbc912d37f03d9ad3be330b81d91c2eaf6c37f2
e65a99a00faba70960e75b4b8edb5acecb675197 --
@@ -26,9 +30,23 @@ if(LLVM_BUILD_INSTRUMENTED)
message(STATUS "To enable merging PGO data LLVM_PROFDATA has to point to
llvm-profdata")
else()
add_custom_target(generate-profdata
- COMMAND "${Python3_EXECUTABLE}"
${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Yeoul Na (rapidsna)
Changes
In `-fbounds-safety`, bounds annotations are considered type attributes rather
than declaration attributes. Constructing them as type attributes allows us to
extend the attribute to apply nested pointers,
github-actions[bot] wrote:
Thank you for submitting a Pull Request (PR) to the LLVM Project!
This PR will be automatically labeled and the relevant teams will be
notified.
If you wish to, you can add reviewers by using the "Reviewers" section on this
page.
If this is not working for you, it
https://github.com/rapidsna created
https://github.com/llvm/llvm-project/pull/78000
In `-fbounds-safety`, bounds annotations are considered type attributes rather
than declaration attributes. Constructing them as type attributes allows us to
extend the attribute to apply nested pointers,
Author: Congcong Cai
Date: 2024-01-13T08:09:36+08:00
New Revision: 5ca2d75f2046612978ba71c4b36714b2a0a01886
URL:
https://github.com/llvm/llvm-project/commit/5ca2d75f2046612978ba71c4b36714b2a0a01886
DIFF:
https://github.com/llvm/llvm-project/commit/5ca2d75f2046612978ba71c4b36714b2a0a01886.diff
Author: Congcong Cai
Date: 2024-01-13T08:08:11+08:00
New Revision: e028bee52ffc2ab9883d3d9a7dc66fe7b7c50a65
URL:
https://github.com/llvm/llvm-project/commit/e028bee52ffc2ab9883d3d9a7dc66fe7b7c50a65
DIFF:
https://github.com/llvm/llvm-project/commit/e028bee52ffc2ab9883d3d9a7dc66fe7b7c50a65.diff
@@ -405,12 +421,20 @@ void UseAutoCheck::replaceExpr(
auto Diag = diag(Range.getBegin(), Message);
+ bool ShouldReplenishVariableName = isMutliLevelPointerToTypeLocClasses(
+ FirstDecl->getTypeSourceInfo()->getTypeLoc(),
+ {TypeLoc::FunctionProto,
https://github.com/HerrCai0907 updated
https://github.com/llvm/llvm-project/pull/77943
>From 537d283288f555c2bb7cff90aee89fe9b18f08b8 Mon Sep 17 00:00:00 2001
From: Congcong Cai
Date: Sat, 13 Jan 2024 00:31:33 +0800
Subject: [PATCH 1/3] [clang-tid]fix modernize-use-auto incorrect fix hints for
felix642 wrote:
@PiotrZSL thank you for the review.
I would greatly appreciate if you could merge this PR for me since I do not
have the rights to do it.
https://github.com/llvm/llvm-project/pull/76315
___
cfe-commits mailing list
@@ -18,7 +18,7 @@ char *t0(char *base, int a, int b) {
// CHECK-NOTES-CXX: static_cast( )
// CHECK-NOTES-ALL: :[[@LINE-5]]:17: note: perform multiplication in a wider
type
// CHECK-NOTES-C:(ptrdiff_t)
- // CHECK-NOTES-CXX:
krzysz00 wrote:
As a somewhat naive question, what would it take to turn off requiring codegen
to be in SCC order? We seem to be the only target doing that. The comments on
that line say something about function calls and noinline
https://github.com/llvm/llvm-project/pull/72129
llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-driver
Author: Fangrui Song (MaskRay)
Changes
-fandroid-pad-segment is an Android-specific opt-in option that
links in crt_pad_segment.o (beside other crt*.o relocatable files).
crt_pad_segment.o contains a note
https://github.com/MaskRay ready_for_review
https://github.com/llvm/llvm-project/pull/77244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/MaskRay edited
https://github.com/llvm/llvm-project/pull/77244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/77244
>From f4758993998e221cc41924d8ec9feb70f759937a Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Sun, 7 Jan 2024 09:47:53 -0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
https://github.com/pizzud updated
https://github.com/llvm/llvm-project/pull/67467
>From 04a3e8d8cbd6943f44a81fddb0524902202a1a78 Mon Sep 17 00:00:00 2001
From: David Pizzuto
Date: Tue, 26 Sep 2023 10:45:42 -0700
Subject: [PATCH 1/4] [clang-tidy] Add bugprone-move-shared-pointer-contents
https://github.com/Michael137 closed
https://github.com/llvm/llvm-project/pull/77920
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/adrian-prantl approved this pull request.
https://github.com/llvm/llvm-project/pull/77920
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/74737
>From 4264e7e9c7f655f134623d113ba9dccc5564f4c3 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Thu, 7 Dec 2023 11:45:14 -0500
Subject: [PATCH] [AMDGPU] add function attrbute amdgpu-lib-fun
Add a
@@ -214,56 +212,56 @@ struct HasVirtBase : virtual ACompleteType {};
void is_pod()
{
- { int arr[T(__is_pod(int))]; }
- { int arr[T(__is_pod(Enum))]; }
- { int arr[T(__is_pod(POD))]; }
- { int arr[T(__is_pod(Int))]; }
- { int arr[T(__is_pod(IntAr))]; }
- { int
@@ -2875,10 +2875,10 @@ struct __attribute__((packed)) PackedNoPadding2 {
int j;
short i;
};
-static_assert(has_unique_object_representations::value,
"Packed structs have no padding");
-static_assert(has_unique_object_representations::value,
"Packed structs have no
@@ -2871,7 +2871,7 @@ C++ defect report implementation
status
https://cplusplus.github.io/CWG/issues/472.html;>472
drafting
Casting across protected inheritance
-Not resolved
+No
Endilll wrote:
Current state of things is my fault (I was
@@ -26,9 +30,23 @@ if(LLVM_BUILD_INSTRUMENTED)
message(STATUS "To enable merging PGO data LLVM_PROFDATA has to point to
llvm-profdata")
else()
add_custom_target(generate-profdata
- COMMAND "${Python3_EXECUTABLE}"
${CMAKE_CURRENT_SOURCE_DIR}/perf-helper.py
@@ -2871,7 +2871,7 @@ C++ defect report implementation
status
https://cplusplus.github.io/CWG/issues/472.html;>472
drafting
Casting across protected inheritance
-Not resolved
+No
zygoloid wrote:
For `"no drafting" status, can we say
zygoloid wrote:
> None of the implementations seem to agree with the resolution of the DR:
> https://godbolt.org/z/a7nEvW5Gr
Yeah, I think this is a case where the wording is clear and everyone implements
it, but it doesn't actually do the right thing. The example in the issue "ought
to be"
Author: erichkeane
Date: 2024-01-12T13:55:15-08:00
New Revision: 060505aa0d49f31e6f2fd4e137c76d86f571f66b
URL:
https://github.com/llvm/llvm-project/commit/060505aa0d49f31e6f2fd4e137c76d86f571f66b
DIFF:
https://github.com/llvm/llvm-project/commit/060505aa0d49f31e6f2fd4e137c76d86f571f66b.diff
https://github.com/gedare updated
https://github.com/llvm/llvm-project/pull/77522
>From 5e5bec9fba56f34c7dd28ca866eef145035a Mon Sep 17 00:00:00 2001
From: Gedare Bloom
Date: Mon, 17 Jul 2023 18:24:30 -0600
Subject: [PATCH 01/15] Add SpaceInParensOption for __attribute__ keyword
The
https://github.com/Qi-Hu updated https://github.com/llvm/llvm-project/pull/75516
>From 136471458682f393b15ed2807342a03309ed0b56 Mon Sep 17 00:00:00 2001
From: Qi Hu
Date: Thu, 14 Dec 2023 13:35:52 -0500
Subject: [PATCH] [TargetParser] Define AEK_FCMA and AEK_JSCVT for tsv110
We define
bryanpkc wrote:
@davemgreen @ilinpv @DavidSpickett @hassnaaHamdi Gentle ping.
https://github.com/llvm/llvm-project/pull/75516
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
ayermolo wrote:
> However, the patch broke the [Solaris/sparcv9
> buildbot](https://lab.llvm.org/buildbot/#/builders/72/builds/1834):
>
> ```
> llc: error: unable to get target for 'x86_64-unknown-linux-gnu', see
> --version and --triple.
> ```
>
> The bot is configured to do a Sparc-only
psteinfeld wrote:
See issue #77979.
https://github.com/llvm/llvm-project/pull/74077
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
jyknight wrote:
Ah, I see that now. SGTM, thanks for the clarification!
https://github.com/llvm/llvm-project/pull/77692
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
psteinfeld wrote:
See issue #77984
https://github.com/llvm/llvm-project/pull/74077
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
rorth wrote:
However, the patch broke the [Solaris/sparcv9
buildbot](https://lab.llvm.org/buildbot/#/builders/72/builds/1834):
```
llc: error: unable to get target for 'x86_64-unknown-linux-gnu', see --version
and --triple.
```
The bot is configured to do a Sparc-only build.
@@ -2693,6 +2693,17 @@ An error will be given if:
}];
}
+def AMDGPULibFunDocs : Documentation {
+ let Category = DocCatAMDGPUAttributes;
+ let Content = [{
+The ``amdgpu_lib_fun`` attribute can be applied to a function for AMDGPU target
+to indicate it is a library
@@ -2011,6 +2011,13 @@ def AMDGPUNumVGPR : InheritableAttr {
let Subjects = SubjectList<[Function], ErrorDiag, "kernel functions">;
}
+def AMDGPULibFun : InheritableAttr {
yxsamliu wrote:
will do
https://github.com/llvm/llvm-project/pull/74737
yxsamliu wrote:
> > > > An AMDGPU library function is not internalized and can be used to
> > > > fullfill calls generated by LLVM passes or instruction selection.
> > >
> > >
> > > I am confused by the description of "internalized". Do you refer to LTO
> > > internalization? You can
https://github.com/aaupov closed https://github.com/llvm/llvm-project/pull/76903
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/76903
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -374,10 +376,10 @@ static __inline fp_t __compiler_rt_fmax(fp_t x, fp_t y) {
#endif
}
-#elif defined(QUAD_PRECISION) && defined(CRT_HAS_TF_MODE)
+#elif defined(QUAD_PRECISION)
perry-ca wrote:
I've put up #77981 for review.
@@ -1047,122 +1019,19 @@ RValue CodeGenFunction::EmitAtomicExpr(AtomicExpr *E) {
Dest = Atomics.castToAtomicIntPointer(Dest);
}
- // Use a library call. See: http://gcc.gnu.org/wiki/Atomic/GCCMM/LIbrary .
- if (UseLibcall) {
-bool UseOptimizedLibcall = false;
-
philnik777 wrote:
> My suggestion on #69994 had been to stop implying
> `_LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_MEMBERS` from
> `_LIBCPP_ENABLE_CXX20_REMOVED_FEATURES` in LLVM 18 at the same time as
> deprecating it. Did you intend to _not_ do that, or was it just missed?
We've also
llvmbot wrote:
@llvm/pr-subscribers-clang-format
Author: Owen Pan (owenca)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/77977.diff
1 Files Affected:
- (modified) clang/test/Format/clang-format-ignore.cpp (+25-21)
``diff
diff --git
https://github.com/owenca created
https://github.com/llvm/llvm-project/pull/77977
None
>From 4f516c1ee4ab99af2c3135ca161a82e6428d3ee9 Mon Sep 17 00:00:00 2001
From: Owen Pan
Date: Fri, 12 Jan 2024 12:30:17 -0800
Subject: [PATCH] [clang-format][NFC] Use FileCheck for clang-format-ignore lit
@@ -703,8 +713,37 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
setRegScore(RegNo, T, CurrScore);
}
}
-if (Inst.mayStore() && (TII->isDS(Inst) || mayWriteLDSThroughDMA(Inst))) {
- setRegScore(SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS, T,
psteinfeld wrote:
See issue #77975.
https://github.com/llvm/llvm-project/pull/74077
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -1183,9 +1228,21 @@ bool
SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr ,
// No need to wait before load from VMEM to LDS.
if (TII->mayWriteLDSThroughDMA(MI))
continue;
-unsigned RegNo = SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS;
+
https://github.com/aeubanks closed
https://github.com/llvm/llvm-project/pull/77958
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Author: Arthur Eubanks
Date: 2024-01-12T12:23:42-08:00
New Revision: f05b0812145897ba34bc2d7fda436a54f9fbca22
URL:
https://github.com/llvm/llvm-project/commit/f05b0812145897ba34bc2d7fda436a54f9fbca22
DIFF:
@@ -130,6 +130,8 @@
; GCN-O0-NEXT:MachineDominator Tree Construction
; GCN-O0-NEXT:Machine Natural Loop Construction
; GCN-O0-NEXT:MachinePostDominator Tree Construction
+; GCN-O0-NEXT:Basic Alias Analysis (stateless AA impl)
+; GCN-O0-NEXT:
1 - 100 of 419 matches
Mail list logo
