[PATCH] D155688: [PATCH] [llvm] [InstCombine] Canonicalise ADD+GEP

craig.topper added a comment. After this patch, I'm seeing a lot of `invariant.gep` created by LICM. For example, in `LBM_performStreamCollide` in 470.lbm there are 65 of them. On RISC-V, these all get created in registers outside the loop and get spilled. Is ARM seeing anything like this or

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151730/new/ https://reviews.llvm.org/D151730

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:229 +collectNonISAExtFeature(const std::vector , int XLen) { + auto I = llvm::find(FeaturesVec, "__RISCV_TargetAttrNeedOverride"); + auto FeatureNeedOveride = std::vector(FeaturesVec.begin(),

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

craig.topper accepted this revision. craig.topper added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70401/new/ https://reviews.llvm.org/D70401 ___ cfe-commits mailing list

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158824/new/ https://reviews.llvm.org/D158824

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:2509 // Attempt to parse token as a register. - if (parseRegister(Operands, true).isSuccess()) + if (parseRegister(Operands, true).isSuccess()) { +// Parse memory base

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:370 + std::vector ) { + Features.push_back("__RISCV_TargetAttrNeedOverride"); + auto RII = llvm::RISCVISAInfo::parseArchString( Why do we need

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:229 +resolveTargetAttrOverride(const std::vector ) { + if (!llvm::is_contained(FeaturesVec, "__RISCV_TargetAttrNeedOverride")) +return FeaturesVec; Can we use something like

[PATCH] D158259: [clang][RISCV] Support operators for RVV sizeless vector types

craig.topper added a comment. Need to update the table here https://clang.llvm.org/docs/LanguageExtensions.html#vector-operations to include RVV Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158259/new/ https://reviews.llvm.org/D158259

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:16200 SDValue Hi; - if (VA.getLocReg() == RISCV::X17) { // Second half of f64 is passed on the stack. This code has been rewritten recently. Please rebase

[PATCH] D151869: [RISCV] Enable more builtin for zvfhmin without zvfh

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151869/new/ https://reviews.llvm.org/D151869

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

craig.topper added inline comments. Comment at: clang/lib/CodeGen/Targets/RISCV.cpp:479 + // 2×XLEN-bit alignment and size at most 2×XLEN bits like `long long`, + // `unsigned long long` and `double` to have 4-bytes alignment. This + // behavior may be changed when

[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.

This revision was automatically updated to reflect the committed changes. Closed by commit rGc9db799dda69: [RISCV] Dont add -unaligned-scalar-mem to target features by default. (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D158255: [RISCV][NFC] Update compile options for some vector crypto C intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158255/new/ https://reviews.llvm.org/D158255

[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.

craig.topper updated this revision to Diff 554561. craig.topper added a comment. Remove change to sifive-x280. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D159145/new/ https://reviews.llvm.org/D159145 Files:

[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVProcessors.td:185 + FeatureStdExtZbb, + FeatureUnalignedScalarMem], [TuneSiFive7,

[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.

craig.topper created this revision. craig.topper added reviewers: wangpc, kito-cheng, asb, reames, jrtc27. Herald added subscribers: jobnoorman, luke, sunshaoce, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult,

[PATCH] D152279: [Driver] Default -msmall-data-limit= to 0

craig.topper added a comment. In D152279#4612087 , @MaskRay wrote: > I am still interested in moving this forward. What should be done here? If > the decision is to keep the current odd default 8 for > `toolchains::RISCVToolChain`, I guess I'll have to

[PATCH] D157953: [CGCall][RISCV] Handle function calls with parameter of RVV tuple type

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157953/new/ https://reviews.llvm.org/D157953

[PATCH] D158402: [Clang][RISCV] Add vcreate intrinsics for RVV tuple types

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158402/new/ https://reviews.llvm.org/D158402

[PATCH] D157130: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

This revision was automatically updated to reflect the committed changes. Closed by commit rG33af2f131db7: [RISCV] Check type size for lax conversions between RVV builtin types and… (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D142144: [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=

craig.topper added inline comments. Comment at: clang/test/Driver/riscv-rvv-vector-bits.c:43 +// RUN: %clang -c %s -### --target=riscv64-linux-gnu -march=rv64gcv \ +// RUN: -mrvv-vector-bits=64 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s + wangpc

[PATCH] D157953: [CGCall][RISCV] Handle function calls with parameter of RVV tuple type

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:5278 + for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { +llvm::Value *LI = Builder.CreateExtractValue( +StoredStructValue, i, Src.getName() +

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added a comment. In D156821#4600550 , @MaskRay wrote: >> Currenly both Clang and GCC support the following set of flags that control > > code gen of signed overflow: > >> [...] >> Howerver, clang ignores these flags for __builtin_abs(int)

[PATCH] D158257: [RISCV] Add feature checks for vector crypto C intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158257/new/ https://reviews.llvm.org/D158257

[PATCH] D158255: [RISCV][NFC] Update compile options for some vector crypto C intrinsics

craig.topper requested changes to this revision. craig.topper added inline comments. This revision now requires changes to proceed. Comment at: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c:4 +// RUN: %clang_cc1 -triple riscv64

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added a comment. I just put up a patch for RISC-V failure related to this https://reviews.llvm.org/D158304 change. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156821/new/ https://reviews.llvm.org/D156821

[PATCH] D158259: [clang][RISCV] Support operators for RVV sizeless vector types

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:14906 +// specified +if (S.Context.areCompatibleRVVTypes(QualType(OriginalTarget, 0), +QualType(Source, 0)) || Why do we need this,

[PATCH] D157953: [CGCall][RISCV] Handle function calls with parameter of RVV tuple type

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:5268 + assert(STy->containsHomogeneousScalableVectorTypes() && + "ABI only supports structure with hmogeneous scalable vector " + "type");

[PATCH] D158067: [RISCV] Bump vector crypto to v1.0 RC2

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158067/new/ https://reviews.llvm.org/D158067

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152793/new/ https://reviews.llvm.org/D152793

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:37 + let Inst{12} = 0; + let Inst{11-7} = rs1; + let Inst{6-2} = 0b0; Do we need the rs1 variable or can we use rs1val here? We usually have the rs1 field

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:417 + continue; +} else if (Feature.startswith("no-")) + Ret.Features.push_back("-" + Feature.split("-").second.str()); Is this tested? I don't see any "no-" in the

[PATCH] D152423: [RISCV] Add function that check extension name with version

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152423/new/ https://reviews.llvm.org/D152423

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:32 + +class RVC_SSInst rs1, RegisterClass reg_class, string opcodestr> : + RVInst16<(outs), (ins reg_class:$rs1), opcodestr, "$rs1", [], InstFormatOther> { Can you

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:88 + +let Predicates = [HasStdExtZicfiss, HasStdExtC] in { +let Uses = [SSP], Defs = [SSP], hasSideEffects = 0, mayLoad = 0, mayStore = 1 in Is it compatible with

[PATCH] D157362: [RISCV] Add MC layer support for Zicfilp.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157362/new/ https://reviews.llvm.org/D157362

[PATCH] D157362: [RISCV] Add MC layer support for Zicfilp.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:665 +let Predicates = [HasStdExtZicfilp] in { +def : InstAlias<"lpad $imm20", (AUIPC X0, uimm20:$imm20)>; There is a designated spot in this file for InstAliases.

[PATCH] D157693: [clang][doc] Mark _Float16 is support natively when Zfh or Zhinx is available

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157693/new/ https://reviews.llvm.org/D157693

[PATCH] D157651: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGee6befe26437: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point. (authored by craig.topper). Changed prior to commit:

[PATCH] D157651: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

craig.topper updated this revision to Diff 549634. craig.topper added a comment. Revise coment, rename variable. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157651/new/ https://reviews.llvm.org/D157651 Files: clang/lib/Sema/SemaChecking.cpp

[PATCH] D157474: [RISCV] Add missing Xsfvcp extension check in clang sema

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157474/new/ https://reviews.llvm.org/D157474

[PATCH] D157693: [clang][doc] Mark _Float16 is support natively when Zfh is available

craig.topper added inline comments. Comment at: clang/docs/LanguageExtensions.rst:815 * X86 (if SSE2 is available; natively if AVX512-FP16 is also available) + * RISC-V (natively if Zfh is available) Zhinx also Repository: rG LLVM Github Monorepo

[PATCH] D157130: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

craig.topper added a comment. Ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157130/new/ https://reviews.llvm.org/D157130 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added a comment. Please update docs/RISCVUsage.rst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152793/new/ https://reviews.llvm.org/D152793 ___ cfe-commits mailing list

[PATCH] D157651: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

craig.topper created this revision. craig.topper added reviewers: 4vtomat, kito-cheng, reames, asb. Herald added subscribers: jobnoorman, VincentWu, vkmr, luismarques, sameer.abuasal, s.egerton, Jim, benna, psnobl, rogfer01, shiva0217, simoncook, arichardson. Herald added a project: All.

[PATCH] D157474: [RISCV] Add missing Xsfvcp extension check in clang sema

craig.topper added inline comments. Comment at: clang/test/Sema/rvv-required-features-invalid.c:16 +void test_sf_vc_x_se_u64m1(uint64_t rs1, size_t vl) { // expected-note {{'test_sf_vc_x_se_u64m1' declared here}} + __riscv_sf_vc_x_se_u64m1(1, 1, 1, rs1, vl); // expected-error

[PATCH] D157474: [RISCV] Add missing Xsfvcp extension check in clang sema

craig.topper added a comment. Is it possible to test? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157474/new/ https://reviews.llvm.org/D157474 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138810/new/ https://reviews.llvm.org/D138810

[PATCH] D157353: [RISCV] Remove pre-defined macro test for b extension. NFC.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157353/new/ https://reviews.llvm.org/D157353

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added a comment. This looks good to me, but I'm not sure I'm a fully qualified reviewer here. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156821/new/ https://reviews.llvm.org/D156821 ___ cfe-commits mailing list

[PATCH] D157130: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

craig.topper created this revision. craig.topper added reviewers: aaron.ballman, c-rhodes. Herald added subscribers: jobnoorman, luke, VincentWu, ctetreau, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck,

[PATCH] D156221: [RISCV] Support overloaded version ntlh intrinsic function

craig.topper accepted this revision. craig.topper added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156221/new/ https://reviews.llvm.org/D156221 ___ cfe-commits mailing list

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

craig.topper added a comment. In D155145#4556157 , @anna wrote: > In D155145#4554786 , @anna wrote: > >>> Can you capture the values of EAX, EBX, ECX, and EDX after the two calls to >>> getX86CpuIDAndInfoEx that

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4496 +static bool CheckInValidEGW(const TargetInfo , CallExpr *TheCall, Sema , +QualType Type, int EGW) { InValid -> Invalid Comment

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

craig.topper added a comment. In D155145#4553922 , @anna wrote: > In D155145#4551621 , @craig.topper > wrote: > >> In D155145#4551526 , @anna wrote: >> >>> In

[PATCH] D156851: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC

This revision was automatically updated to reflect the committed changes. Closed by commit rG36ac6ac1dbd0: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156851/new/

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1972 +// Control Flow Integerity +include "RISCVInstrInfoZicfiss.td" Put this with the other RISCVInstrInfoZi* files under "Integer" Comment at:

[PATCH] D156851: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC

craig.topper created this revision. craig.topper added reviewers: asb, wangpc, kito-cheng, reames. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck,

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper updated this revision to Diff 546315. craig.topper added a comment. Add riscv_bitmanip.h to cover all of Zbb and Zbkb Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155647/new/ https://reviews.llvm.org/D155647 Files:

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:233 +def uimm10 : Operand, ImmLeaf(Imm);}]> { + let ParserMatchClass = UImmAsmOperand<10>; Is this used? Comment at:

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added a comment. Please update llvm/docs/RISCVUsage.rst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152793/new/ https://reviews.llvm.org/D152793 ___ cfe-commits mailing list

[PATCH] D156221: [RISCV] Support overloaded version ntlh intrinsic function

craig.topper added a comment. I think another option could be to do this in SemaChecking.cpp where we implement __builtin_riscv_ntl_load and __builtin_riscv_ntl_store. We already do custom type checking there. We could detect the missing argument and give it a default. Repository: rG LLVM

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

craig.topper added a comment. In D155145#4551526 , @anna wrote: > In D155145#4544068 , @pengfei wrote: > >> In D155145#4543326 , @anna wrote: >> >>> We see a crash

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:1807 + + // Do not emit checks for disabled sanitizers to support recover + SmallVector, 2> Checks; recover -> recovery? Period at the end of the comment Repository: rG LLVM

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156686/new/ https://reviews.llvm.org/D156686

[PATCH] D156779: [RISCV] Use correct LMUL!=1 types for __attribute__((riscv_rvv_vector_bits(N)))

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156779/new/ https://reviews.llvm.org/D156779

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

craig.topper added inline comments. Comment at: clang/lib/AST/Type.cpp:2356 bool Type::isSizelessBuiltinType() const { + if (isSVESizelessBuiltinType()) +return true; Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

craig.topper added a comment. In D155668#4548454 , @jrtc27 wrote: > Uh, why are there clang/test/Sema/aarch64* tests full of RISC-V extension > names? That's not right at all. One of them is coming from > https://reviews.llvm.org/D135011, I haven't

[PATCH] D156507: [RISCV] Upgrade Zihintntl extension to version 1.0 and move out of experimental state.

craig.topper added a comment. We already have https://reviews.llvm.org/D151547 in review Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156507/new/ https://reviews.llvm.org/D156507 ___ cfe-commits

[PATCH] D156321: [Clang][RISCV] Remove RVV intrinsics `vread_csr`,`vwrite_csr`

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156321/new/ https://reviews.llvm.org/D156321

[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies

craig.topper added a comment. I have deleted the two TODOs in r02c11c5aed59624046125cf512c12f70d2fa358d Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156214/new/ https://reviews.llvm.org/D156214 ___

[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:948 - // TODO: The 'q' extension requires rv64. - // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'. craig.topper wrote: > asb wrote: > > imkiva wrote: > > >

[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:948 - // TODO: The 'q' extension requires rv64. - // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'. asb wrote: > imkiva wrote: > > wangpc wrote: > > > I think

[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:948 // Additional dependency checks. - // TODO: The 'q' extension requires rv64. - // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'. + // The 'q' extension requires rv64. +

[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies

craig.topper added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:948 // Additional dependency checks. - // TODO: The 'q' extension requires rv64. - // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'. + // The 'q' extension requires rv64. +

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: clang/test/Preprocessor/riscv-target-features.c:75 // CHECK-NOT: __riscv_zvfbfwma {{.*$}} +// CHECK-NOT: __riscv_zicfisslp {{.*$}} This needs to be renamed to remove lp Comment at:

[PATCH] D156248: [Headers][doc] Add description of _mm256_movemask_epi8

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156248/new/ https://reviews.llvm.org/D156248 ___ cfe-commits mailing list

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper updated this revision to Diff 542121. craig.topper added a comment. Rebase after using mem2reg. Fix a couple copy/paste mistakes that were much easier to spot with mem2reg. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155647/new/

[PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG3055c5815ac0: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state. (authored by craig.topper). Changed prior to commit:

[PATCH] D155674: [RISCV] Update zihintntl to 1p0

craig.topper added a comment. Looks like we have two patches for this now. D151547 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155674/new/ https://reviews.llvm.org/D155674

[PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

craig.topper created this revision. craig.topper added reviewers: asb, reames, kito-cheng. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, arphaman, the_o, brucehoult, MartinMosbeck,

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4576 + case RISCVVector::BI__builtin_rvv_vaeskf1_vi_ta: + case RISCVVector::BI__builtin_rvv_vsm4k_vi_ta: +return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31); craig.topper

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper updated this revision to Diff 541759. craig.topper added a comment. Fix name of zip/unzip builtin Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155647/new/ https://reviews.llvm.org/D155647 Files: clang/lib/Headers/CMakeLists.txt

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper updated this revision to Diff 541752. craig.topper added a comment. Fix file description Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155647/new/ https://reviews.llvm.org/D155647 Files: clang/lib/Headers/CMakeLists.txt

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper updated this revision to Diff 541751. craig.topper added a comment. git add the header Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155647/new/ https://reviews.llvm.org/D155647 Files: clang/lib/Headers/CMakeLists.txt

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, wangpc, kito-cheng. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01,

[PATCH] D155414: [Clang][RISCV] Guard RVV intrinsics types that is not available when ELEN < 64

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155414/new/ https://reviews.llvm.org/D155414

[PATCH] D155416: [Clang][RISCV] Improve diagnostic message for full multiply intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM for now, but long term I think we need a mechanism to do this builtins that require extensions like vector crypto. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D155495: [RISCV][AArch64][IRGen] Add a special case to CodeGenFunction::EmitCall for scalable vector return being coerced to fixed vector.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGd53d842d12ce: [RISCV][AArch64][IRGen] Add a special case to CodeGenFunction::EmitCall for… (authored by craig.topper). Changed prior to commit:

[PATCH] D155222: [RISCV][AArch64][IRGen] Add scalable->fixed as a special case in CreateCoercedStore.

craig.topper abandoned this revision. craig.topper added a comment. Abandoning in favor of D155495 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155222/new/ https://reviews.llvm.org/D155222

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4576 + case RISCVVector::BI__builtin_rvv_vaeskf1_vi_ta: + case RISCVVector::BI__builtin_rvv_vsm4k_vi_ta: +return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31); craig.topper

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsll.c:12 +// +vint16mf4_t test_vwsll_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { + return __riscv_vwsll_vv_i16mf4(op1, op2, vl);

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:2405 + defvar suffix = !if(IsVV, "vv", "vi"); + defvar prototype = !if(IsVV, "UvUvUvUv", "UvUvUvKz"); + defm "" : RVVBuiltinSet; Can we split this into two classes and

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4576 + case RISCVVector::BI__builtin_rvv_vaeskf1_vi_ta: + case RISCVVector::BI__builtin_rvv_vsm4k_vi_ta: +return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31); eopXD wrote: >

[PATCH] D155414: [Clang][RISCV] Guard RVV intrinsics types that is not available when ELEN < 64

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:5336 + // least zve64x + if ((Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ false) && + !TI.hasFeature("zve64x")) || Can we do ``` if ((Ty->isRVVType(/* Bitwidth */ 64, /*

[PATCH] D155495: [RISCV][AArch64][IRGen] Add a special case to CodeGenFunction::EmitCall for scalable vector return being coerced to fixed vector.

craig.topper created this revision. craig.topper added reviewers: bsmith, sdesmalen, c-rhodes, joechrisellis. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult,

[PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa64b3e92c7cb: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types. (authored by craig.topper). Repository: rG LLVM Github

[PATCH] D155456: [RISCV] Support -m[no-]strict-align options

craig.topper added a comment. Update ReleaseNotes? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155456/new/ https://reviews.llvm.org/D155456 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D155220: [IRGen] Remove 'Sve' from the name of some IR names that are shared with RISC-V now.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe8dc9dcd7df7: [IRGen] Remove Sve from the name of some IR names that are shared with RISC-V… (authored by craig.topper). Repository: rG LLVM

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