@@ -32,27 +32,29 @@ class StoreInst;
/// These are the kinds of recurrences that we support.
enum class RecurKind {
- None, ///< Not a recurrence.
- Add, ///< Sum of integers.
- Mul, ///< Product of integers.
- Or, ///< Bitwise or logical OR of
@@ -9130,6 +9142,15 @@ void SelectionDAGBuilder::visitCall(const CallInst ) {
if (visitBinaryFloatCall(I, ISD::FMAXNUM))
return;
break;
+ case LibFunc_fminimum_num:
+ case LibFunc_fminimum_numf:
+if (visitBinaryFloatCall(I,
@@ -9130,6 +9142,15 @@ void SelectionDAGBuilder::visitCall(const CallInst ) {
if (visitBinaryFloatCall(I, ISD::FMAXNUM))
return;
break;
+ case LibFunc_fminimum_num:
+ case LibFunc_fminimum_numf:
+if (visitBinaryFloatCall(I,
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@@ -631,6 +631,46 @@ TEST(APFloatTest, Maximum) {
EXPECT_TRUE(std::isnan(maximum(nan, f1).convertToDouble()));
}
+TEST(APFloatTest, MinimumNumber) {
+ APFloat f1(1.0);
+ APFloat f2(2.0);
+ APFloat zp(0.0);
+ APFloat zn(-0.0);
+ APFloat nan =
wzssyqa wrote:
> > 3. PowerPC: has some interaction with the behavior of `minnum/maxnum`: need
> > define `fcanonicalize`.
>
> AMDGPU has the same handling. This is to break the signaling nan handling
> from IEEE to the broken old glibc libm behavior. If we fix the definition to
> match
@@ -16049,6 +16094,84 @@ of the two arguments. -0.0 is considered to be less
than +0.0 for this
intrinsic. Note that these are the semantics specified in the draft of
IEEE 754-2019.
+.. _i_minimumnum:
+
+'``llvm.minimumnum.*``' Intrinsic
+^
+
wzssyqa wrote:
TODO: implement for architectures that don't have `fmin/fmax` instructions:
This is the example of MIPS pre-R6:
```
mins:
.setnoreorder
.setnomacro
mtc1$0,$f1
add.s $f0,$f12,$f1
add.s $f13,$f13,$f1
c.un.s
wzssyqa wrote:
@peterwaller-arm I noticed that in
`llvm/test/CodeGen/AArch64/combine_andor_with_cmps.ll`, `FMAXNUM_IEEE` is
claimed that it is not supported. While I noticed that `fmaxnm` follows the
rules of `maxNUM` of IEEE754-2008.
Is there any other limitation of `fmaxnm`?
wzssyqa wrote:
Since we need to reuse some logic of `minnum/maxnum` to implement
`minimumnum/maximumnum`,
let's add them before switch the behavior of `minnum/maxnum`.
Known not working ports, will be fixed in future PRs:
1. X86: the current `minnum/maxnum` cannot process +0 vs -0 as
https://github.com/wzssyqa closed
https://github.com/llvm/llvm-project/pull/93159
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wzssyqa wrote:
Let's close it.
https://github.com/llvm/llvm-project/pull/93159
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The backend may have interest on the language-standard level of source file.
Let's pass it to IR.
In a ll file, it looks like
language-standard = "gnu17"
>From 3e413bae6ba18276e4d47075d48d656e4f732b5e Mon
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>From cccd9606fd574726c2cde2e473d1e05a62147caf Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Mon, 13 May 2024 21:46:40 +0800
Subject: [PATCH] MIPS/Clang: Add more false option pairs into validateTarget
The
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/91968
>From cccd9606fd574726c2cde2e473d1e05a62147caf Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Mon, 13 May 2024 21:46:40 +0800
Subject: [PATCH] MIPS/Clang: Add more false option pairs into validateTarget
The
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wzssyqa wrote:
Depens on: https://github.com/llvm/llvm-project/pull/92728
https://github.com/llvm/llvm-project/pull/91968
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https://github.com/llvm/llvm-project/pull/92728
Commit: d59bc6b5c75384aa0b1e78cc85e17e8acaccebaf
Clang/MIPS: Add +fp64 if MSA and no explicit -mfp option (#91949)
added +fp64 for `clang`, while not for `clang -cc1`. So
clang -cc1 -triple=mips
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>From cccd9606fd574726c2cde2e473d1e05a62147caf Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Mon, 13 May 2024 21:46:40 +0800
Subject: [PATCH] MIPS/Clang: Add more false option pairs into validateTarget
The
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@@ -273,6 +273,34 @@ bool MipsTargetInfo::validateTarget(DiagnosticsEngine
) const {
Diags.Report(diag::err_mips_fp64_req) << "-mfp64";
return false;
}
+ // FPXX requires mips2+
+ if (FPMode == FPXX && CPU == "mips1") {
+
wzssyqa wrote:
Depends on: https://github.com/llvm/llvm-project/pull/92122
https://github.com/llvm/llvm-project/pull/91968
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FP32 is the only supported FPMode of mips1.
FPXX requires MIPS2+ and FP64 requires MIPS32r2+.
>From 9cb774c2c1239c752b717888f19691f3c6b7f907 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 14 May 2024
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/91949
>From effc1a239718ebc20ac835e59223c78d3fd9a01c Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Mon, 13 May 2024 19:28:25 +0800
Subject: [PATCH 1/2] Clang/MIPS: Add +fp64 if MSA and no explicit -mfp option
MSA
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/91968
The option pairs include:
-mfpxx -mips1
-msoft-float -mmsa
-mmsa -mabi=32 with 32bit pre-R2 CPUs
-mfpxx -mmsa
-mfp32 -mmsa
>From cccd9606fd574726c2cde2e473d1e05a62147caf
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/91949
MSA requires -mfp64. If FP64 is supported by CPU (mips32r2+), and no
-mfp32/-mfpxx is explicitly given, let's add +fp64. Otherwise some cmd like
clang --target=mips -mips32r5 -mmsa
will issue LLVM backend
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wzssyqa wrote:
LGTM.
https://github.com/llvm/llvm-project/pull/90734
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wzssyqa wrote:
LGTM.
https://github.com/llvm/llvm-project/pull/89638
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>From d8c9a636b3fbcdcfef6f934780e6cb042a84b23b Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/89638
>From 2315aa6db326a5b6508e3e9730007fb44c179421 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/89638
>From 3cec71e178264b69e43c4842302b61465271d735 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
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>From 3cec71e178264b69e43c4842302b61465271d735 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
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https://github.com/llvm/llvm-project/pull/89638
>From 942b1a8ad3e994aaa7eae63ee923d9946cba0087 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
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https://github.com/llvm/llvm-project/pull/89638
>From cd3107eca3575b066915c6ea9d6d1a38ad68d913 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/89638
>From a165cd689e6fa23163736ea6d76d8a60440f4b30 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When
wzssyqa wrote:
@peterwaller-arm It seems OK now. Let's wait the result of CI.
https://github.com/llvm/llvm-project/pull/89638
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>From aafa018b3d7657483738fa91812e3e8bbdd8205a Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When we
wzssyqa wrote:
@peterwaller-arm half-done. Do *NOT* merge it now. It has still some problem.
See `clang/test/Driver/baremetal-multilib.yaml`.
There is still some `none-unknown`.
https://github.com/llvm/llvm-project/pull/89638
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>From aafa018b3d7657483738fa91812e3e8bbdd8205a Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH 1/2] Triple::normalize: Use none as OS for XX-none-ABI
When we
wzssyqa wrote:
Blocked by https://github.com/llvm/llvm-project/pull/89638
https://github.com/llvm/llvm-project/pull/90313
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https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/90313
https://discourse.llvm.org/t/rfc-baremetal-target-triple-normalization/78524
See: PR#89638.
>From 28b918f8a67381cd568c85bae77af517091a32b4 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024
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>From aafa018b3d7657483738fa91812e3e8bbdd8205a Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Sat, 27 Apr 2024 10:55:38 +0800
Subject: [PATCH] Triple::normalize: Use none as OS for XX-none-ABI
When we parse
wzssyqa wrote:
>
> Sure. The motivation on our side is a distributed compile service where the
> library doesn't exist on the remote end. This patch means we'll have to add
> knowledge about path layouts at link time to the remote setup at compile
> time. That's certainly doable, but kind of
@@ -1149,6 +1149,13 @@ std::string Triple::normalize(StringRef Str) {
}
}
+ // For 3-component triples, the middle component is used to set Vendor;
+ // while if it is "none", we'd prefer to set OS.
+ // This is for some baremetal cases, such as "arm-none-elf".
+ if
wzssyqa wrote:
> I've just posted an RFC to discourse about how to handle triple
> normalization:
> https://discourse.llvm.org/t/rfc-baremetal-target-triple-normalization/78524
We don't need to revert https://github.com/llvm/llvm-project/pull/89234
It is easy to fix `Triple::normalize` once
wzssyqa wrote:
Will the contents of `empty.asm` correct if `lib//clang_rt.profile.lib`
doesn't exist?
I mean, will `empty.asm` contains `/DEFAULTLIB:clang_rt.profile-x86_64.lib`
then?
https://github.com/llvm/llvm-project/pull/87866
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wzssyqa wrote:
@llvm/pr-subscribers-backend-arm @llvm/pr-subscribers-backend-aarch64
https://github.com/llvm/llvm-project/pull/89638
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>From 11ae27aeb512b661a3423a8b92642a9ec08ca6a1 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Apr 2024 01:36:17 +0800
Subject: [PATCH] Triple::normalize: Set OS for 3-component triple with none as
https://github.com/wzssyqa converted_to_draft
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wzssyqa wrote:
@peterwaller-arm Ohh, there is so many `-none-unknown-` in current code. I
guess it may be widely used.
Do we really want to change all of them?
https://github.com/llvm/llvm-project/pull/89638
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>From a40bf92dcdaa64c2ca73d9276972c8cd47750210 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Tue, 23 Apr 2024 01:36:17 +0800
Subject: [PATCH] Triple::normalize: Set OS for 3-component triple with none as
@@ -656,19 +656,29 @@ std::string ToolChain::getCompilerRT(const ArgList ,
StringRef Component,
// Check for runtime files in the new layout without the architecture first.
std::string CRTBasename =
buildCompilerRTBasename(Args, Component, Type, /*AddArch=*/false);
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@@ -28,6 +28,19 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR)
if (NOT LLVM_RUNTIMES_BUILD)
load_llvm_config()
endif()
+ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
+set(print_target_triple ${CMAKE_CXX_COMPILER}
@@ -28,6 +28,19 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR)
if (NOT LLVM_RUNTIMES_BUILD)
load_llvm_config()
endif()
+ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
wzssyqa wrote:
With my patch, `libclang_rt.builtin` has been
@@ -181,6 +181,20 @@ message(STATUS "LLVM default target triple:
${LLVM_DEFAULT_TARGET_TRIPLE}")
set(LLVM_TARGET_TRIPLE "${LLVM_DEFAULT_TARGET_TRIPLE}")
+if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
+ set(print_target_triple ${CMAKE_CXX_COMPILER}
@@ -142,7 +142,7 @@ if(WIN32 OR LLVM_WINSYSROOT)
set(RUNTIMES_${target}_CMAKE_MODULE_LINKER_FLAGS ${WINDOWS_LINK_FLAGS} CACHE
STRING "")
endif()
-foreach(target
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wzssyqa wrote:
Does it really needed?
https://github.com/llvm/llvm-project/pull/89425
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wzssyqa wrote:
See: https://github.com/llvm/llvm-project/pull/87866
Can you have a try to add an extra option
```
-resource-dir=%S/Inputs/resource_dir
```
https://github.com/llvm/llvm-project/pull/87866
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wzssyqa wrote:
9f43a41db37253685c5ed428c215528eb92bbd43
1693009679313282afbed38778dd3fad62641e1b
Landed as the above commits.
https://github.com/llvm/llvm-project/pull/88661
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wzssyqa wrote:
New PR with my resource-dir patch:
https://github.com/llvm/llvm-project/pull/88661
https://github.com/llvm/llvm-project/pull/87866
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Follow-up to #81037.
ToolChain::LibraryPaths holds the new compiler-rt library directory (e.g.
`/tmp/Debug/lib/clang/19/lib/x86_64-unknown-linux-gnu`). However, it might be
empty when the directory does not
wzssyqa wrote:
[xx.patch](https://github.com/llvm/llvm-project/files/14948921/xx.patch)
@aeubanks can you help to test this patch?
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wzssyqa wrote:
> It's better to do some normalization in CMake.
I will try to work in CMake, then.
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wzssyqa wrote:
> > @aeubanks The problem is that in your configure, the libclang_rt is placed
> > in `/lib/clang/19/lib/linux/libclang_rt.builtins-arm-android.a`,
> > instead of
> > `/lib/clang/19/lib/arm-unknown-linux-android/libclang_rt.builtins.a`.
>
> The point is that both locations
wzssyqa wrote:
Configure cmd
```
cmake ../llvm -G Ninja -DLLVM_DEFAULT_TARGET_TRIPLE=aarch64-linux-gnu
-DLLVM_USE_LINKER=lld -DLLVM_ENABLE_RUNTIMES="compiler-rt;libunwind"
-DLLVM_ENABLE_PROJECTS="mlir;clang;clang-tools-extra;lld"
-DCMAKE_C_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++
wzssyqa wrote:
@aeubanks The problem is that in your configure, the libclang_rt is please in
`/lib/clang/19/lib/linux/libclang_rt.builtins-arm-android.a`, instead
of
`/lib/clang/19/lib/arm-unknown-linux-android/libclang_rt.builtins.a`.
https://github.com/llvm/llvm-project/pull/87866
https://github.com/wzssyqa converted_to_draft
https://github.com/llvm/llvm-project/pull/88334
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https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/88334
Currently, clang looks for compiler-rt only from the normalized triple subdir.
While if we are configured with a non-normalized triple with
-DLLVM_DEFAULT_TARGET_TRIPLE, such as triples without vendor section,
wzssyqa wrote:
For me, I think that it is a good idea to always warn/hint the full/normalized
path.
For compatible reason, we can still try to find libraries in old-style or
non-full/normalized paths, while should not hint them.
https://github.com/llvm/llvm-project/pull/87866
wzssyqa wrote:
Replaced by: https://github.com/llvm/llvm-project/issues/87150
https://github.com/llvm/llvm-project/pull/87319
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https://github.com/wzssyqa closed
https://github.com/llvm/llvm-project/pull/87319
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https://github.com/wzssyqa approved this pull request.
https://github.com/llvm/llvm-project/pull/87866
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https://github.com/wzssyqa edited
https://github.com/llvm/llvm-project/pull/87319
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https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/87319
In ToolChain::getCompilerRT:
If none is found, use a file name from the new layout, which may get
printed in an error message, aiding users in knowing what Clang is
looking for.
But in current code, the
@@ -330,6 +331,8 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public
TargetInfo {
IsMicromips = true;
else if (Feature == "+mips32r6" || Feature == "+mips64r6")
HasUnalignedAccess = true;
+ else if (Feature == "+strict-align")
+
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/87257
TargetInfo has HasUnalignedAccess support now. For MIPSr6, we should set it
according strict-align.
For pre-R6, we always set strict-align and HasUnalignedAccess to false.
>From
https://github.com/wzssyqa created
https://github.com/llvm/llvm-project/pull/87256
TargetInfo has HasUnalignedAccess support now. For MIPSr6, we should set it
according strict-align.
For pre-R6, we always set strict-align and HasUnalignedAccess to false.
>From
https://github.com/wzssyqa closed
https://github.com/llvm/llvm-project/pull/85174
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https://github.com/wzssyqa updated
https://github.com/llvm/llvm-project/pull/85174
>From 7e1cf74f4fc9271e88b62462ea9a38826fd3ee38 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Thu, 14 Mar 2024 11:48:36 +0800
Subject: [PATCH] MIPS: Support -m(no-)strict-align for r6
MIPSr6 ISA requires
https://github.com/wzssyqa edited
https://github.com/llvm/llvm-project/pull/85174
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https://github.com/llvm/llvm-project/pull/85174
>From e75523f5ab1bb58a495afdd30203a0c7c93c7ec4 Mon Sep 17 00:00:00 2001
From: YunQiang Su
Date: Thu, 14 Mar 2024 11:48:36 +0800
Subject: [PATCH] MIPS: Support -m(no-)strict-align for r6
MIPSr6 ISA requires
@@ -321,9 +321,11 @@ void aarch64::getAArch64TargetFeatures(const Driver ,
}
}
- if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
- options::OPT_munaligned_access)) {
-if
@@ -321,9 +321,11 @@ void aarch64::getAArch64TargetFeatures(const Driver ,
}
}
- if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
- options::OPT_munaligned_access)) {
-if
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