FreddyLeaf wrote:
> > > Still not understand. Shouldn't the target feature of the caller be
> > > passed to the intrinsic when checking the argument of the intrinsic?
> >
> >
> > The target features passing from option can be passed to Semachecking. It's
> > special for attribute_target,
KanRobert wrote:
> > Still not understand. Shouldn't the target feature of the caller be passed
> > to the intrinsic when checking the argument of the intrinsic?
>
> The target features passing from option can be passed to Semachecking. It's
> special for attribute_target, which is handled in
FreddyLeaf wrote:
> Still not understand. Shouldn't the target feature of the caller be passed to
> the intrinsic when checking the argument of the intrinsic?
The target features passing from option can be passed to Semachecking. It's
special for attribute_target, which is handled in
KanRobert wrote:
Still not understand. Shouldn't the target feature of the caller be passed to
the intrinsic when checking the argument of the intrinsic?
https://github.com/llvm/llvm-project/pull/84136
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@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/84136
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@@ -4745,6 +4745,127 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_castsi128_pd(__m128i __a) {
return (__m128d)__a;
}
+/// Compares each of the corresponding double-precision values of two
+///128-bit vectors of [2 x double], using the operation specified by the
@@ -2940,6 +2940,134 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS0x02
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/84136
>From 2ba698b222fa1dc963d21850d5931562aa65533d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Sep 2023 16:44:01 +0800
Subject: [PATCH 1/5] [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from
avx
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
return _mm_andnot_ps(A, B);
}
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b,
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
return _mm_andnot_ps(A, B);
}
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b,
@@ -2940,6 +2940,134 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS0x02
@@ -34,6 +34,60 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
return _mm_andnot_ps(A, B);
}
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
+ // CHECK-LABEL: test_mm_cmp_ps_eq_oq
+ // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}}
+ return _mm_cmp_ps(a, b,
@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
@@ -1719,3 +1719,57 @@ __m128i test_mm_xor_si128(__m128i A, __m128i B) {
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128d test_mm_cmp_pd_eq_oq(__m128d a, __m128d b) {
FreddyLeaf wrote:
https://github.com/FreddyLeaf deleted
https://github.com/llvm/llvm-project/pull/84136
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@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
https://github.com/FreddyLeaf deleted
https://github.com/llvm/llvm-project/pull/84136
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@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/84136
>From 2ba698b222fa1dc963d21850d5931562aa65533d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Tue, 26 Sep 2023 16:44:01 +0800
Subject: [PATCH 1/3] [X86] Change target of __builtin_ia32_cmp[p|s][s|d] from
avx
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/84136
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@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because
FreddyLeaf wrote:
> My understanding is that you change the required feature of
> __builtin_ia32_cmp[p|s][s|d] from avx to sse for some condition codes. The
> title is not accurate.
You are right. Updated.
https://github.com/llvm/llvm-project/pull/84136
@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/84136
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