@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
https://github.com/yxsamliu approved this pull request.
LGTM. Thanks
https://github.com/llvm/llvm-project/pull/89796
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@@ -54,3 +56,77 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+namespace {
+const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+} //
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
https://github.com/AlexVlx commented:
> @AlexVlx, do you think it's worth promoting
> [SPV_INTEL_inline_assembly](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_inline_assembly.asciidoc)
> and
>
https://github.com/AlexVlx edited
https://github.com/llvm/llvm-project/pull/89796
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bader wrote:
@AlexVlx, do you think it's worth promoting
[SPV_INTEL_inline_assembly](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_inline_assembly.asciidoc)
and
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/7] Add initial support for AMDGCN flavoured SPIRV.
---
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/7] Add initial support for AMDGCN flavoured SPIRV.
---
@@ -0,0 +1,111 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64 : enable
+
+kernel void test () {
+
+ int sgpr = 0, vgpr = 0, imm = 0;
+
+ // sgpr constraints
+ __asm__
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/7] Add initial support for AMDGCN flavoured SPIRV.
---
@@ -0,0 +1,111 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64 : enable
+
+kernel void test () {
+
+ int sgpr = 0, vgpr = 0, imm = 0;
+
+ // sgpr constraints
+ __asm__
@@ -0,0 +1,111 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64 : enable
+
+kernel void test () {
+
+ int sgpr = 0, vgpr = 0, imm = 0;
+
+ // sgpr constraints
+ __asm__
@@ -0,0 +1,111 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64 : enable
+
+kernel void test () {
+
+ int sgpr = 0, vgpr = 0, imm = 0;
+
+ // sgpr constraints
+ __asm__
@@ -0,0 +1,111 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64 : enable
+
+kernel void test () {
+
+ int sgpr = 0, vgpr = 0, imm = 0;
+
+ // sgpr constraints
+ __asm__
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/7] Add initial support for AMDGCN flavoured SPIRV.
---
@@ -309,7 +309,45 @@ StringRef AMDGPU::getCanonicalArchName(const Triple ,
StringRef Arch) {
void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple ,
StringMap ) {
// XXX - What does the member GPU mean if device name string passed
https://github.com/jhuber6 approved this pull request.
LG
https://github.com/llvm/llvm-project/pull/89796
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@@ -54,3 +56,76 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+static const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+ArrayRef
@@ -54,3 +56,76 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+static const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+ArrayRef
@@ -54,3 +56,76 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+static const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+ArrayRef
@@ -309,7 +309,45 @@ StringRef AMDGPU::getCanonicalArchName(const Triple ,
StringRef Arch) {
void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple ,
StringMap ) {
// XXX - What does the member GPU mean if device name string passed
@@ -309,7 +309,45 @@ StringRef AMDGPU::getCanonicalArchName(const Triple ,
StringRef Arch) {
void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple ,
StringMap ) {
// XXX - What does the member GPU mean if device name string passed
@@ -309,7 +309,45 @@ StringRef AMDGPU::getCanonicalArchName(const Triple ,
StringRef Arch) {
void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple ,
StringMap ) {
// XXX - What does the member GPU mean if device name string passed
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
@@ -6088,6 +6088,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
StringRef Prefix =
llvm::Triple::getArchTypePrefix(getTarget().getTriple().getArch());
if (!Prefix.empty()) {
+if (Prefix == "spv" &&
+
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/6] Add initial support for AMDGCN flavoured SPIRV.
---
@@ -54,3 +56,77 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+namespace {
+const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+} //
@@ -54,3 +56,77 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+namespace {
+const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+} //
@@ -54,3 +56,77 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions
,
BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
DefineStd(Builder, "SPIRV64", Opts);
}
+
+namespace {
+const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
+
+} //
@@ -673,8 +673,12 @@ std::unique_ptr AllocateTarget(const
llvm::Triple ,
}
case llvm::Triple::spirv64: {
if (os != llvm::Triple::UnknownOS ||
-Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
+Triple.getEnvironment() !=
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/5] Add initial support for AMDGCN flavoured SPIRV.
---
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/4] Add initial support for AMDGCN flavoured SPIRV.
---
@@ -0,0 +1,294 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -x hip \
+// RUN: -aux-triple x86_64-unknown-linux-gnu -fcuda-is-device -emit-llvm %s \
+// RUN: -o - | FileCheck %s
+
+// RUN:
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/4] Add initial support for AMDGCN flavoured SPIRV.
---
https://github.com/AlexVlx updated
https://github.com/llvm/llvm-project/pull/89796
>From 662f160418c704f45e57e751168903d774b74303 Mon Sep 17 00:00:00 2001
From: Alex Voicu
Date: Tue, 23 Apr 2024 17:41:25 +0100
Subject: [PATCH 1/3] Add initial support for AMDGCN flavoured SPIRV.
---
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