https://github.com/RKSimon approved this pull request.
LGTM. I'd still like to ensure we have unaligned x86 test coverage.
https://github.com/llvm/llvm-project/pull/74275
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jyknight wrote:
@RKSimon: I'm not sure if you intended your comment to be a blocker; I was
about to press the merge button when you commented (and would still wish to
now).
https://github.com/llvm/llvm-project/pull/74275
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jyknight wrote:
Underaligned atomic operations are expanded to an appropriate `__atomic_*`
libcall via mostly target-independent code in AtomicExpandPass
(https://github.com/llvm/llvm-project/blob/7ecfb66c77ad77dabbb705cbb1f3b17a3d1391a4/llvm/lib/CodeGen/AtomicExpandPass.cpp#L210)
and never
@@ -30113,32 +30120,40 @@ TargetLoweringBase::AtomicExpansionKind
X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
Type *MemType = SI->getValueOperand()->getType();
- bool NoImplicitFloatOps =
-
@@ -30115,12 +30126,16 @@
X86TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
// If this a 64 bit atomic load on a 32-bit target and SSE2 is enabled, we
// can use movq to do the load. If we have X87 we can load into an 80-bit
// X87 register and store
@@ -228,87 +228,86 @@ define void @widen_broadcast_unaligned(ptr %p0, i32 %v) {
}
define i128 @load_i128(ptr %ptr) {
-; CHECK-O0-LABEL: load_i128:
-; CHECK-O0: # %bb.0:
-; CHECK-O0-NEXT:pushq %rbx
-; CHECK-O0-NEXT:.cfi_def_cfa_offset 16
-; CHECK-O0-NEXT:
https://github.com/jyknight updated
https://github.com/llvm/llvm-project/pull/74275
>From 7baffd6d1f4254b1bd725ddc883a360d79267435 Mon Sep 17 00:00:00 2001
From: James Y Knight
Date: Sat, 2 Dec 2023 23:05:26 -0500
Subject: [PATCH 1/2] [X86] Use plain load/store instead of cmpxchg16b for
