commit 99766370e6b3255f3c3096209e779a86cf29c9db
Author: Aggelos Economopoulos agge...@dragonflybsd.org
Date: Mon May 20 20:56:07 2013 +0200
kernel -- x86_64: Do not set reserved bits in CR3.
The x86-64 platform code was setting PG_V, PG_U, and PG_RW bits in the
CR3 register.
commit 9561b8dbeeba70799df48f59ecefc49b4d5ef4f9
Author: Markus Pfeiffer markus.pfeif...@morphism.de
Date: Sat May 18 14:56:47 2013 +
fix MXCSR default value
XEN fails to initialise its vcpus to behave like actual cpus. One
instance of this is that the MXCSR is not setup to
at 92ee94d728550b5b0b2fda8a475a396127807ce9 (tag)
tagging 9561b8dbeeba70799df48f59ecefc49b4d5ef4f9 (commit)
replaces v3.4.1
tagged by Justin C. Sherrill
on Mon May 27 22:20:07 2013 -0400
DragonFly 3.4.2
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