On Wed, 23 Mar 2022 01:57:25 GMT, Fei Yang wrote:
>> src/hotspot/cpu/riscv/disassembler_riscv.hpp line 18:
>>
>>> 16: *
>>> 17: * You should have received a copy of the GNU General Public License
>>> version
>>> 18: * 2 along with this work; if not, write to the Free Software
>>>
On Tue, 22 Mar 2022 17:34:18 GMT, Vladimir Kozlov wrote:
>> Fei Yang has updated the pull request incrementally with one additional
>> commit since the last revision:
>>
>> Address review comments
>
> src/hotspot/cpu/riscv/disassembler_riscv.hpp line 18:
>
>> 16: *
>> 17: * You should
On Tue, 22 Mar 2022 14:01:28 GMT, Roger Riggs wrote:
> The test/jdk files look ok. (I didn't look at the rest)
Thank you for looking at that part.
-
PR: https://git.openjdk.java.net/jdk/pull/6294
On Tue, 22 Mar 2022 11:50:13 GMT, Fei Yang wrote:
>> This PR implements JEP 422: Linux/RISC-V Port [1].
>> The PR starts as a squashed merge of the
>> https://openjdk.java.net/projects/riscv-port branch.
>>
>> This has been tested with jtreg tier{1,2,3,4} and jcstress on HiFive
>> Unmatched
On Tue, 22 Mar 2022 11:50:13 GMT, Fei Yang wrote:
>> This PR implements JEP 422: Linux/RISC-V Port [1].
>> The PR starts as a squashed merge of the
>> https://openjdk.java.net/projects/riscv-port branch.
>>
>> This has been tested with jtreg tier{1,2,3,4} and jcstress on HiFive
>> Unmatched
On Tue, 22 Mar 2022 11:50:13 GMT, Fei Yang wrote:
>> This PR implements JEP 422: Linux/RISC-V Port [1].
>> The PR starts as a squashed merge of the
>> https://openjdk.java.net/projects/riscv-port branch.
>>
>> This has been tested with jtreg tier{1,2,3,4} and jcstress on HiFive
>> Unmatched
On Tue, 22 Mar 2022 11:50:13 GMT, Fei Yang wrote:
>> This PR implements JEP 422: Linux/RISC-V Port [1].
>> The PR starts as a squashed merge of the
>> https://openjdk.java.net/projects/riscv-port branch.
>>
>> This has been tested with jtreg tier{1,2,3,4} and jcstress on HiFive
>> Unmatched
> This PR implements JEP 422: Linux/RISC-V Port [1].
> The PR starts as a squashed merge of the
> https://openjdk.java.net/projects/riscv-port branch.
>
> This has been tested with jtreg tier{1,2,3,4} and jcstress on HiFive
> Unmatched board. Dacapo, SPECjbb2015 and SPECjvm2008 benchmark tests
