On 02/05/2015 09:13 PM, Scott Duplichan wrote:
Timothy Pearson [mailto:tpear...@raptorengineeringinc.com] wrote:
]Sent: Thursday, February 05, 2015 06:49 PM
]To: Coreboot
]Subject: Re: [coreboot] memtest86 reading 0k memory
]
]On 02/05/2015 06:42 PM, Timothy Pearson wrote:
] On 02/05/2015
On Thu, Feb 5, 2015 at 12:48 PM, Timothy Pearson
tpear...@raptorengineeringinc.com wrote:
On 02/05/2015 12:38 PM, Jonathan A. Kollasch wrote:
That's a pretty old memtest86+. Also, memtest86+ prefers
linuxbios/coreboot memory map to e820. This becomes a problem
when SeaBIOS sets up a USB
On 02/05/2015 12:59 PM, Aaron Durbin wrote:
On Thu, Feb 5, 2015 at 12:48 PM, Timothy Pearson
tpear...@raptorengineeringinc.com wrote:
On 02/05/2015 12:38 PM, Jonathan A. Kollasch wrote:
That's a pretty old memtest86+. Also, memtest86+ prefers
linuxbios/coreboot memory map to e820. This
On 02/05/2015 02:06 PM, Timothy Pearson wrote:
On 02/05/2015 01:51 PM, Aaron Durbin wrote:
Do you have the coreboot console log? Looking at memtest86 it
constructs its own e820 when using linuxbios. Additionally, it also
has some concept of a window to test as well as plim_lower and
plim_upper
On 02/05/2015 06:42 PM, Timothy Pearson wrote:
On 02/05/2015 02:06 PM, Timothy Pearson wrote:
On 02/05/2015 01:51 PM, Aaron Durbin wrote:
Do you have the coreboot console log? Looking at memtest86 it
constructs its own e820 when using linuxbios. Additionally, it also
has some concept of a
Timothy Pearson [mailto:tpear...@raptorengineeringinc.com] wrote:
]Sent: Thursday, February 05, 2015 06:49 PM
]To: Coreboot
]Subject: Re: [coreboot] memtest86 reading 0k memory
]
]On 02/05/2015 06:42 PM, Timothy Pearson wrote:
] On 02/05/2015 02:06 PM, Timothy Pearson wrote:
] On 02/05/2015 01:51
On Thu, Feb 05, 2015 at 12:23:40PM -0600, Timothy Pearson wrote:
All,
I have a board here that loads memtest86 but won't actually test memory.
This is the output:
Memtest86+ v2.11
AMD K10 CPU @ 2312 MHz
L1 Cache: 64K 35028 MB/s
L2 Cache: 512K 6963 MB/s
L3 Cache: 2048K
On 02/05/2015 12:38 PM, Jonathan A. Kollasch wrote:
That's a pretty old memtest86+. Also, memtest86+ prefers
linuxbios/coreboot memory map to e820. This becomes a problem
when SeaBIOS sets up a USB controller to DMA to e820-reserved
memory that wasn't reserved by coreboot.
Try a modern
All,
I have a board here that loads memtest86 but won't actually test memory.
This is the output:
Memtest86+ v2.11
AMD K10 CPU @ 2312 MHz
L1 Cache: 64K 35028 MB/s
L2 Cache: 512K 6963 MB/s
L3 Cache: 2048K 6052 MB/s
Memory :0K
On Thu, Feb 5, 2015 at 1:15 PM, Timothy Pearson
tpear...@raptorengineeringinc.com wrote:
On 02/05/2015 12:59 PM, Aaron Durbin wrote:
On Thu, Feb 5, 2015 at 12:48 PM, Timothy Pearson
tpear...@raptorengineeringinc.com wrote:
On 02/05/2015 12:38 PM, Jonathan A. Kollasch wrote:
That's a
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