Re: [coreboot] The ECC 2017 web page

2017-03-02 Thread Zoran Stojsavljevic
> I realize it's a pretty web page and all, but what makes it do that? Ni-na-ni-na... OSX and Chrome viruses and worms web page infested. You need good organic spray against pests... We need similar box as one on this picture:

Re: [coreboot] Reminder: The maiing list vs forum poll closes in just under 24 hours.

2017-03-02 Thread Zoran Stojsavljevic
Hello Martin, The current/up to date poll results would be also nice to have... I guess, I am asking for too much, don't I? ;-) (anyway, it is too late) Zoran ___ On 3/3/17, Martin Roth wrote: > As brought up in the previous coreboot community meeting, the coreboot >

Re: [coreboot] Kernel Panic with coreboot on Tails Linux

2017-03-02 Thread Zoran Stojsavljevic
Hello r2d2-tutanota, I (at least all/only me) need the complete kernel (NOT Coreboot one) log from the beginning of the kernel start till the shutdown crash (included). So, maybe with kernel log inspection some skeletons from the closet (I hope, hope always dies last) could be brought on the day

[coreboot] Reminder: The maiing list vs forum poll closes in just under 24 hours.

2017-03-02 Thread Martin Roth
As brought up in the previous coreboot community meeting, the coreboot project is discussing the idea of switching from the mailing list to a forum. This idea did not originate with the coreboot leadership, but from a request by members of the community. I know many people have some strong

Re: [coreboot] The ECC 2017 web page

2017-03-02 Thread ron minnich
osx and chrome. Since I closed the tab, my fan is quiet and my power consumption and cpu usage are back to much less. ron On Thu, Mar 2, 2017 at 9:15 PM Matt DeVillier wrote: > I'm seeing ~90MB RAM use and low single digit CPU usage here on > Win10/Chrome - what

Re: [coreboot] The ECC 2017 web page

2017-03-02 Thread Matt DeVillier
I'm seeing ~90MB RAM use and low single digit CPU usage here on Win10/Chrome - what browser/OS you you seeing 25% on? On Thu, Mar 2, 2017 at 11:11 PM, ron minnich wrote: > That one web page, while not even visible, eats up 25% of the cpu on one > core of my osx laptop. > >

[coreboot] The ECC 2017 web page

2017-03-02 Thread ron minnich
That one web page, while not even visible, eats up 25% of the cpu on one core of my osx laptop. Fan is at high speed. Laptop is hot. I realize it's a pretty web page and all, but what makes it do that? Is it necessary for it to cause such power consumption? We need green web pages :-) thanks

Re: [coreboot] Kernel Panic with coreboot on Tails Linux

2017-03-02 Thread Jonathan Neuschäfer
On Fri, Mar 03, 2017 at 02:28:01AM +0100, i1w5d7gf38...@tutanota.com wrote: > Hardware: Gigabyte G41M-ES2L. coreboot-4.5-1083-g6295b8a57a > > How to reproduce: > Download Tails: https://tails.boum.org/torrents/files/tails-i386-2.10.torrent > dd to a usb-drive. Start coreboot and choose inside of

[coreboot] coreboot community meeting minutes for March 2, 2017

2017-03-02 Thread Martin Roth
Here are the meeting minutes of today's coreboot community meeting. Info about the next meeting (March 16) is at the bottom. ## # Thursday, March 2nd, 2017 General coreboot news & discussions * coreboot was not accepted for GSoC

[coreboot] Kernel Panic with coreboot on Tails Linux

2017-03-02 Thread i1w5d7gf38keg
Hardware: Gigabyte G41M-ES2L. coreboot-4.5-1083-g6295b8a57a How to reproduce: Download Tails: https://tails.boum.org/torrents/files/tails-i386-2.10.torrent dd to a usb-drive. Start coreboot and choose inside of seabios the usb-drive. Let it boot, shut it down. The shutdown would at the end

Re: [coreboot] How to improve the boot time of the Asus KGPE-D16?

2017-03-02 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/02/2017 02:17 PM, Paul Menzel wrote: > Dear Arthur, dear Timothy, > > > Am Donnerstag, den 02.03.2017, 13:38 -0600 schrieb Timothy Pearson: >> On 03/02/2017 01:30 PM, Arthur Heymans wrote: >>> Paul Menzel writes: >>> I think most of the

Re: [coreboot] How to improve the boot time of the Asus KGPE-D16?

2017-03-02 Thread Paul Menzel via coreboot
Dear Arthur, dear Timothy, Am Donnerstag, den 02.03.2017, 13:38 -0600 schrieb Timothy Pearson: > On 03/02/2017 01:30 PM, Arthur Heymans wrote: > > Paul Menzel writes: > > > > > I think most of the time is spent in RAM initialization. > > > > > >1. Do board owners with similar amount of

Re: [coreboot] How to improve the boot time of the Asus KGPE-D16?

2017-03-02 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/02/2017 01:30 PM, Arthur Heymans wrote: > Paul Menzel via coreboot writes: > > >> I think most of the time is spent in RAM initialization. >> >>1. Do board owners with similar amount of memory (independent of the >>

Re: [coreboot] How to improve the boot time of the Asus KGPE-D16?

2017-03-02 Thread Arthur Heymans
Paul Menzel via coreboot writes: > I think most of the time is spent in RAM initialization. > >1. Do board owners with similar amount of memory (independent of the > board) have similar numbers? >2. What are the ways to improve that? Is it possible? For

Re: [coreboot] How to improve the boot time of the Asus KGPE-D16?

2017-03-02 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/02/2017 01:18 PM, Paul Menzel via coreboot wrote: > Dear coreboot folks, > > > With 128 GB of RAM consisting of eight 16 GB modules, coreboot takes > over a minute to get to the payload on the Asus KGPE-D16 even without > serial console

Re: [coreboot] Suggestions on shipping ARMv8 Chromebook

2017-03-02 Thread Matt DeVillier
On Thu, Mar 2, 2017 at 12:42 PM, wrote: > On 2017-02-17 10:10, Patrick Georgi wrote: > >> The just-released Chromebook Plus comes with an RK3399 SoC, which is >> ARMv8 and fully open at the AP firmware level (GPU is Mali with its >> usual issues, as well as Wifi firmware).

[coreboot] How to improve the boot time of the Asus KGPE-D16?

2017-03-02 Thread Paul Menzel via coreboot
Dear coreboot folks, With 128 GB of RAM consisting of eight 16 GB modules, coreboot takes over a minute to get to the payload on the Asus KGPE-D16 even without serial console enabled [1]. This is not much faster than the vendor firmware. Please note that the timings below are incorrect.

Re: [coreboot] Suggestions on shipping ARMv8 Chromebook

2017-03-02 Thread tturne
On 2017-02-17 10:10, Patrick Georgi wrote: The just-released Chromebook Plus comes with an RK3399 SoC, which is ARMv8 and fully open at the AP firmware level (GPU is Mali with its usual issues, as well as Wifi firmware). Thanks for this suggestion, we are in process of purchasing. Do you or

Re: [coreboot] Some errors by compiling romstage (I am a newbie)

2017-03-02 Thread Aaron Durbin via coreboot
On Thu, Mar 2, 2017 at 8:33 AM, Maxim Gusev wrote: > Hello, Aaron! > > I am compiling sourses of my arch e2k. > I have compiled bootblock with my sources. There aren't my sources in other > stages. I have create arch directory and mainboard directory where the > sources are

Re: [coreboot] Some errors by compiling romstage (I am a newbie)

2017-03-02 Thread Maxim Gusev via coreboot
Hello, Aaron! I am compiling sourses of my arch e2k. I have compiled bootblock with my sources. There aren't my sources in other stages. I have create arch directory and mainboard directory where the sources are located. Log: /home/maxim/coreboot/util/crossgcc/xgcc/bin/linux-ld: warning:

Re: [coreboot] Some errors by compiling romstage (I am a newbie)

2017-03-02 Thread Aaron Durbin via coreboot
On Thu, Mar 2, 2017 at 7:24 AM, Maxim Gusev via coreboot wrote: > Hi everbody! > > I have a question. Very hope for your help. > > When I am compiling the romstage there are 2 errors by the linker: > Undefined refference to 'bootmem_add_range' > Undefined refference to

[coreboot] Some errors by compiling romstage (I am a newbie)

2017-03-02 Thread Maxim Gusev via coreboot
Hi everbody! I have a question. Very hope for your help. When I am compiling the romstage there are 2 errors by the linker: Undefined refference to 'bootmem_add_range' Undefined refference to 'lb_new_record' in the imd_cbmem.c file (it is included in src/lib/Makefile.inc romstage). The

Re: [coreboot] SPI Flash Writeprotect

2017-03-02 Thread John Lewis
Haven't the faintest idea, Naveed - have never tried running with the cache disabled. Only thing I can tell you is that if the cache is enabled, but not working for some reason, I didn't get such a beep. I'm hoping one of the proper guys will have an idea about this. Cheers, John. On 02/03/17

[coreboot] ASUS KFSN4-DRE Automated Test Failure [master]

2017-03-02 Thread Raptor Engineering Automated Coreboot Test Stand
The ASUS KFSN4-DRE fails verification for branch master as of commit 601aa313a6b8f5a6055c20a8105118c46a81a28b The following tests failed: BOOT_FAILURE Commits since last successful test: 601aa31 intel/broadwell: Use the correct SATA port config for setting IOBP register See attached log for