[coreboot] Re: KGPE-D16 maintainership

2019-09-27 Thread Insurgo
On 9/23/19 4:42 AM, Arthur Heymans wrote: > Hi > > Thanks for wanting to maintain this platform! > > There are a issues with the amdfam10 codebase that could be improved > upon. I'll try to list a few of them, to give an idea of what > maintaining this code in 2019 could mean. > > So first and

[coreboot] Aspirant for contributing to coreboot project during google summer of code 2020

2019-09-27 Thread Ajay Paddayuru Shreepathi
Hi, I am Ajay, pursuing my Master's in Computer Science at Stonybrook university, NewYork. I am interested in OS, Firmware, Compiler development and also being part of open source community. I would like to understand coreboot project and contribute to the project during GSOC 2020. As a part

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Duncan Laurie
On Fri, Sep 27, 2019 at 3:58 PM Aaron Durbin via coreboot wrote: >> > >> > 5. PCI coalesce can alter PCI dev.fn assignments? >> >> That's a serious problem. I noticed that CFL FSP can reassign them >> without being asked to, unpredictably (e.g. if a device fails to show >> up in whatever

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Kyösti Mälkki
On Fri, Sep 27, 2019 at 8:11 PM Nico Huber wrote: > > On 26.09.19 18:45, Aaron Durbin via coreboot wrote: > > Here's some of the requirements/issues we should resolve that come to mind: > > > > 1. Easy way to directly retrieve a device's chip config object w/o > > traversing the device hierarchy.

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Aaron Durbin via coreboot
On Fri, Sep 27, 2019 at 10:42 AM Nico Huber wrote: > On 27.09.19 15:42, Kyösti Mälkki wrote: > > On Thu, Sep 26, 2019 at 7:45 PM Aaron Durbin wrote: > >> > >> On Thu, Sep 26, 2019 at 10:06 AM Kyösti Mälkki > wrote: > >>> Should be easy enough to implement > >>> platform hook telling to not

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Aaron Durbin via coreboot
On Fri, Sep 27, 2019 at 11:11 AM Nico Huber wrote: > On 26.09.19 18:45, Aaron Durbin via coreboot wrote: > > Here's some of the requirements/issues we should resolve that come to > mind: > > > > 1. Easy way to directly retrieve a device's chip config object w/o > > traversing the device

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Kyösti Mälkki
On Fri, Sep 27, 2019 at 7:42 PM Nico Huber wrote: > > IIRC, I asked this elsewhere already. Do we want to keep simple device? > If we reduce `struct device` to b/d/f and a pointer to the chip info > in early stages, couldn't we just use `struct device` for PCI config > access everywhere? I got

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Nico Huber
On 26.09.19 18:45, Aaron Durbin via coreboot wrote: > Here's some of the requirements/issues we should resolve that come to mind: > > 1. Easy way to directly retrieve a device's chip config object w/o > traversing the device hierarchy. Which leads to... > 2. Symbol alias for accessing struct

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Nico Huber
On 27.09.19 15:42, Kyösti Mälkki wrote: > On Thu, Sep 26, 2019 at 7:45 PM Aaron Durbin wrote: >> >> On Thu, Sep 26, 2019 at 10:06 AM Kyösti Mälkki >> wrote: >>> Should be easy enough to implement >>> platform hook telling to not remove PCI device node from topology >>> links (based on BDF),

[coreboot] Re: Fixing Hidden PCI devices on Intel common SoCs

2019-09-27 Thread Kyösti Mälkki
On Thu, Sep 26, 2019 at 7:45 PM Aaron Durbin wrote: > > On Thu, Sep 26, 2019 at 10:06 AM Kyösti Mälkki > wrote: >> Should be easy enough to implement >> platform hook telling to not remove PCI device node from topology >> links (based on BDF), even when it does not respond to ID queries. > > >