Dear Felix,
Am 31.03.22 um 22:55 schrieb Felix Singer:
to me it seems like the Intel Quark SoC has been unmaintained and
unused for a long time now.
Can you be more specific please?
So I'm proposing to deprecate the support
for it with coreboot release 4.17 [1], in order to drop the
Hi all Coreboot folks,
I'm a first year graduate student in CS, been hanging around on
#coreboot IRC (Libera.Chat server) and was thinking if it was possible
or not to port Coreboot to a Thinkpad T495 (AMD Ryzen 7 3700U PRO) [1]
manufactured in May 2019, I successfully dumped the BIOS using
go for it.
Long overdue.
On Thu, Mar 31, 2022 at 1:55 PM Felix Singer wrote:
>
> Hi all,
>
> to me it seems like the Intel Quark SoC has been unmaintained and
> unused for a long time now. So I'm proposing to deprecate the support
> for it with coreboot release 4.17 [1], in order to drop the
Hi all,
to me it seems like the Intel Quark SoC has been unmaintained and
unused for a long time now. So I'm proposing to deprecate the support
for it with coreboot release 4.17 [1], in order to drop the support
with release 4.19 so that the community has less maintenance overhead.
Does anyone
Can we push this documentation upstream?
Von meinem iPhone gesendet
> Am 31.03.2022 um 22:38 schrieb David Hendricks :
>
>
> 3mdeb has been working on this. Here is some documentation with resources to
> get started: https://github.com/3mdeb/openpower-coreboot-docs. They've also
> given
3mdeb has been working on this. Here is some documentation with resources
to get started: https://github.com/3mdeb/openpower-coreboot-docs. They've
also given several recent talks about this, and many of their patches have
been merged into upstream coreboot.
If you've got a Talos II or other
the openpower have created this new firmware for boot openpower platforms
is possible to coreboot use this base to write a new code for best support
in openpower socs?
https://github.com/open-power/hostboot
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Hi Ranga,
It seems currently there are issues with EHL FSP MR2 in connection with the use
of PSE.
So please try it with FSP MR1.
The issue is currently under investigation.
Best regards,
Mario
Von: Rao G
Gesendet: Donnerstag, 31. März 2022 16:20
An: Lean Sheng Tan ; coreboot
Betreff:
Hi Sheng,
In the coreboot log I see
PCI: 00:1d.0 [8086/4bb3] disabled
PCI: Static device PCI: 00:1d.1 not found, disabling it.
PCI: Static device PCI: 00:1d.2 not found, disabling it.
In the FSP debug log I see
PSE TSN Device: Device Id: 0x, Vendor Id: 0x
PSE TSN Device: Device Id:
Hi, after seeing the progress already made for `building Clang support` I
think it's wise for me to pick a separate project to deliver for coreboot
I went through the `Project Collection` page and am finding `Add x86_64
support on real hardware[1]` interesting. I am a beginner in firmware
Hi Ranga,
Are you using Intel RVP? Yes you should at least be able to see the PSE TSN
working if the PSE binary is included correctly (remember to include the
'unsigned' PSE binary from Intel), by turning on PSE TSN devices in
devicetree.cb:
device pci 1d.1 on end # Intel PSE Time-Sensitive
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