[coreboot] Open Source Firmware and Bootloader devroom CFP

e standard FOSDEM content license (CC-BY). If you have any questions, feel free to contact the devroom organizers:   Daniel Kiper (daniel.kiper at oracle.com) and   Michał Żygowski (michal.zygowski at 3mdeb.com). Daniel & Michał ___ coreboo

[coreboot] Re: Problems with CAR setup on Tiger Lake

boot board, feel free to ask me > any other questions you have. Will visit it and check it. > > Cheers, >  - Tim Regards, -- Michał Żygowski Firmware Engineer https://3mdeb.com | @3mdeb_com > > > On Tue, Jan 19, 2021 at 8:58 AM Michał Żygowski > mailto:michal.zygow...@3m

[coreboot] Problems with CAR setup on Tiger Lake

is TempRamInit Exit event according to FSP integration guide), FSP from public repo, Client variant Used microcode from original RVP firmware. Are there any patches that I have to apply to make it working? Best regards, -- Michał Żygowski Firmware Engineer https://3mdeb.com | @3mdeb_com

[coreboot] Re: Problems with CAR setup on Tiger Lake

e: 01.12.2020     CpuSignature: 000806C1h, Revision: 0072h, Date: 20.11.2020     CpuSignature: 000806C2h, Revision: 0002h, Date: 04.12.2020 It seems it have different steppings, so don't know if it really works. I will try to select INTEL_CAR_NEM with any of these. Thank you for the insights. Best

[coreboot] Re: Yangling/ FW6C board with different SUPERIO CHIP, I found the problem

you want to avoid compiling this tool from source: https://github.com/3mdeb/fwdump-docker Command to use: |docker run --rm --privileged -it -v $PWD:/home/fwdump 3mdeb/fwdump-docker:1.1.0 getlogs| Simply superiotool.log from the archive will suffice. > > best regards > lain Best re

[coreboot] Re: Yangling/ FW6C board with different SUPERIO CHIP, I found the problem

> could help me compiling it for this SUPERIO chip ? > > best regards > lain Best regards, -- Michał Żygowski Firmware Engineer https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org

[coreboot] Re: Yangling/ FW6C board with different SUPERIO CHIP, I found the problem

Hi, Glad to hear that you get that working. Interestingly it is the older FW6 variant based on Kaby Lake so it should have ITE8772. Do you have the log from supertiotool.log? Additionally superiotool.err.log may be helpful. IT8613E should be supported. Best regards, -- Michał Żygowski

[coreboot] Re: util/intelmetool: Union Point support?

To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le

[coreboot] Re: Resource allocator v3

/review. I will adapt it to agesa/family14 now. Best regards, -- Michał Żygowski Firmware Engineer https://3mdeb.com | @3mdeb_com On 4/28/21 2:47 PM, Kyösti Mälkki wrote: > On Wed, Apr 28, 2021 at 3:17 PM Michal Zygowski > wrote: >> Hi Kyösti, >> >> On 28.04.2021 12:33, Kyö

[coreboot] Re: Only Garbarge Data On Serial Port Protectli FW6C

AFAIK it shouldn't. No idea what can be wrong.. Maybe you could share your coreboot config and I may find something there? Best regards, -- Michał Żygowski Firmware Engineer https://3mdeb.com | @3mdeb_com On 5/3/21 3:38 PM, lain via coreboot wrote: > I tried two different firmware r

[coreboot] Re: Only Garbarge Data On Serial Port Protectli FW6C

.@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org

[coreboot] Re: TigerLake RVP TCSS init failure

___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org Best regards -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org

[coreboot] Re: TigerLake RVP TCSS init failure

unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org

[coreboot] Re: TigerLake RVP TCSS init failure

nki Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org

[coreboot] Re: TigerLake RVP TCSS init failure

of what I have experienced. I would consider buying a production SoC/CPU to save the time and frustration during the bringup (which should be very easy and fast with an RVP). Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com On 8/20/21 3:22

[coreboot] Re: ECC in native ram init? (sandy/ivy)

raminit. Probably it will only work with unregistered DIMMs (which I will probably try soon) because registers on the DIMMs introduce higher latency. Maybe Patrick can shed some light on this raminit matter? Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21

[coreboot] Re: 7010 Motherboard Variants

the MT/DT variants. We have already launched the SFF build target on MT in 3mdeb office. ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Eng

[coreboot] Re: Gopdriver into coreboot

. tianocore payload (and additionally provide GOP policy protocol). To use the graphics PEIM, include your VBT in CBFS and in the coreboot menuconfig select: Devices -> Graphics Initialization -> Run GOP driver VBT can be included in the Device submenu. Best regards, -- Michał Żygowski Fi

[coreboot] Re: Support to Openpower platforms

Hi Christian, On 31.03.2022 22:53, Christian Walter wrote: Can we push this documentation upstream? Feel free to do so if you want. Regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com ___ coreboot

[coreboot] Re: 4.15 issue on pcengines apu2

ll be contributed back to upstream coreboot repository. Jan ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2

[coreboot] Re: Please test and review AGESA code

n email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org

[coreboot] LPC 2022 System Boot and Security Microconference

stem, feel free to submit proposals: https://lpc.events/event/16/abstracts/ More details about the Microconference and possible topics: https://lpc.events/event/16/contributions/1157/ Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com |

[coreboot] [coreboot - Feature #433] (New) Unify TPM drivers in coreboot

Issue #433 has been reported by Michał Żygowski. Feature #433: Unify TPM drivers in coreboot https://ticket.coreboot.org/issues/433 * Author: Michał Żygowski * Status: New * Priority: Normal * Target version: none * Start date: 2022-10-24

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related links updated Arthur Heymans wrote in #note-2: > https://review.coreboot.org/c/coreboot/+/51710 Implements the TCG one. The > coreboot implementation is not a 'proprietary' format. That would imply that > there is

[coreboot] [coreboot - Documentation #426] Document existing and added TPM event log formats and PCR usage

Issue #426 has been updated by Michał Żygowski. Related to Feature #420: Use standard format of TPM event log added Documentation #426: Document existing and added TPM event log formats and PCR usage https://ticket.coreboot.org/issues/426#change

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related to Cleanup #421: Change API of functions taking hash as an argument added Feature #420: Use standard format of TPM event log https://ticket.coreboot.org/issues/420#change-1162 * Author

[coreboot] [coreboot - Feature #424] Create and implement option to choose either TCG or vboot PCR assignment

Issue #424 has been updated by Michał Żygowski. Parent task set to #420 Feature #424: Create and implement option to choose either TCG or vboot PCR assignment https://ticket.coreboot.org/issues/424#change-1178 * Author: Krystian Hebel * Status

[coreboot] [coreboot - Feature #423] Implement legacy and crypto agile TPM event log formats

Issue #423 has been updated by Michał Żygowski. Parent task set to #420 Feature #423: Implement legacy and crypto agile TPM event log formats https://ticket.coreboot.org/issues/423#change-1177 * Author: Krystian Hebel * Status: New * Priority

[coreboot] [coreboot - Cleanup #421] Change API of functions taking hash as an argument

Issue #421 has been updated by Michał Żygowski. Related to Feature #420: Use standard format of TPM event log added Cleanup #421: Change API of functions taking hash as an argument https://ticket.coreboot.org/issues/421#change-1163 * Author

[coreboot] [coreboot - Feature #422] Create Kconfig menu for TPM event log format

Issue #422 has been updated by Michał Żygowski. Related to Feature #420: Use standard format of TPM event log added Feature #422: Create Kconfig menu for TPM event log format https://ticket.coreboot.org/issues/422#change-1165 * Author: Krystian

[coreboot] [coreboot - Cleanup #421] Change API of functions taking hash as an argument

Issue #421 has been updated by Michał Żygowski. Parent task set to #420 Cleanup #421: Change API of functions taking hash as an argument https://ticket.coreboot.org/issues/421#change-1175 * Author: Krystian Hebel * Status: New * Priority

[coreboot] [coreboot - Feature #422] Create Kconfig menu for TPM event log format

Issue #422 has been updated by Michał Żygowski. Parent task set to #420 Feature #422: Create Kconfig menu for TPM event log format https://ticket.coreboot.org/issues/422#change-1176 * Author: Krystian Hebel * Status: New * Priority: Normal

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related to Feature #424: Create and implement option to choose either TCG or vboot PCR assignment added Feature #420: Use standard format of TPM event log https://ticket.coreboot.org/issues/420#change

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related to Feature #422: Create Kconfig menu for TPM event log format added Feature #420: Use standard format of TPM event log https://ticket.coreboot.org/issues/420#change-1164 * Author: Krystian

[coreboot] [coreboot - Feature #424] Create and implement option to choose either TCG or vboot PCR assignment

Issue #424 has been updated by Michał Żygowski. Related to Feature #420: Use standard format of TPM event log added Feature #424: Create and implement option to choose either TCG or vboot PCR assignment https://ticket.coreboot.org/issues/424#change

[coreboot] [coreboot - Feature #425] Add parsing of new TPM event log formats to cbmem utility

Issue #425 has been updated by Michał Żygowski. Related to Feature #420: Use standard format of TPM event log added Feature #425: Add parsing of new TPM event log formats to cbmem utility https://ticket.coreboot.org/issues/425#change-1171

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related to Feature #425: Add parsing of new TPM event log formats to cbmem utility added Feature #420: Use standard format of TPM event log https://ticket.coreboot.org/issues/420#change-1170

[coreboot] [coreboot - Feature #425] Add parsing of new TPM event log formats to cbmem utility

Issue #425 has been updated by Michał Żygowski. Parent task set to #420 Feature #425: Add parsing of new TPM event log formats to cbmem utility https://ticket.coreboot.org/issues/425#change-1179 * Author: Krystian Hebel * Status: New * Priority

[coreboot] [coreboot - Documentation #426] Document existing and added TPM event log formats and PCR usage

Issue #426 has been updated by Michał Żygowski. Parent task set to #420 Documentation #426: Document existing and added TPM event log formats and PCR usage https://ticket.coreboot.org/issues/426#change-1180 * Author: Krystian Hebel * Status

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related to Feature #423: Implement legacy and crypto agile TPM event log formats added Feature #420: Use standard format of TPM event log https://ticket.coreboot.org/issues/420#change-1166 * Author

[coreboot] [coreboot - Feature #423] Implement legacy and crypto agile TPM event log formats

Issue #423 has been updated by Michał Żygowski. Related to Feature #420: Use standard format of TPM event log added Feature #423: Implement legacy and crypto agile TPM event log formats https://ticket.coreboot.org/issues/423#change-1167 * Author

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related to Documentation #426: Document existing and added TPM event log formats and PCR usage added Feature #420: Use standard format of TPM event log https://ticket.coreboot.org/issues/420#change

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Adding subtask seems to be a new issue creation. In order to avoid duplication, I have added these issues from related links to the Related Issues section. Feature #420: Use standard format of TPM

[coreboot] [coreboot - Feature #420] Use standard format of TPM event log

Issue #420 has been updated by Michał Żygowski. Related links updated Michał Żygowski wrote in #note-10: > Adding subtask seems to be a new issue creation. In order to avoid > duplication, I have added these issues from related links to the Related > Issues section. NVM, I c

[coreboot] [coreboot - Feature #425] Add parsing of new TPM event log formats to cbmem utility

Issue #425 has been updated by Michał Żygowski. Related links updated I have already started some work for parsing TCG compliant event log from DRTM event log area reserved in cbmem. It should be relatively simple to propagate to other cbmem regions if needed. Relevant patchset linekd

[coreboot] [coreboot - Bug #446] Optiplex 9010 No Post

Issue #446 has been updated by Michał Żygowski. If there are 4 expansion slots, that means you have a DT or MT variant. To support the MT/DT you should at least add an overridetree.cb file, like how I have done it for Precision T1650: https://github.com/coreboot/coreboot/blob/master/src

[coreboot] [coreboot - Cleanup #421] Change API of functions taking hash as an argument

Issue #421 has been updated by Michał Żygowski. There may not be a strong need to have multiple hashes in the log entries yet. I have also recently spotted Intel fTPMs that can have only one PCR bank active at a time, so only discrete TPMs are capable of having multiple PCR banks active

[coreboot] [coreboot - Bug #446] Optiplex 9010 No Post

Issue #446 has been updated by Michał Żygowski. > You could try to get early log message over the serial console or the flash > console (CONSOLE_SPI_FLASH, cf the Kconfig help text). I recall CONSOLE_SPI_FLASH causing the OptiPlex to hang at postcar, so I doubt anything useful wil

[coreboot] Re: Possible modification ACPI uefi bios

to "Mainboard" submenu and ensure the "System Power State after Failure" is "S0 Full on". The feature may also need additional support from the Super I/O (desktop) or Embedded Controller (laptop) side depending on what board are you using. Best regards, -- Michał

[coreboot] Re: No Coreboot on system76 dekstops

Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com OpenPGP_0x6B5BA214D21FCEB2.asc Description: OpenPGP public key OpenPGP_signature Description: OpenPGP digital signature ___ coreboot mailing list

[coreboot] Re: disable efficient-cores or performance-cores in Intel 12th gen processors

6/firmware-open/blob/master/docs/intel-me.md > <https://github.com/system76/firmware-open/blob/master/docs/intel-me.md>). No, there aren't. Only hyperthreading and legacy 8254 timer is hooked to CMOS NVRAM currently. Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FC

[coreboot] Re: disable efficient-cores or performance-cores in Intel 12th gen processors

point without sufficient resources (either financial or developers). > > Thanks. > > ___ > coreboot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Mi

[coreboot] Re: disable efficient-cores or performance-cores in Intel 12th gen processors

h#L1706 for E cores in the FSP params functions Simple as that. Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com OpenPGP_0x6B5BA214D21FCEB2.asc Description: OpenPGP public key OpenPGP_signature Descript

[coreboot] [RFC] vboot recovery reason clearing

experts, your opinion is highly appreciated. Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com OpenPGP_0x6B5BA214D21FCEB2.asc Description: OpenPGP public key OpenPGP_signature Description: OpenPGP digital signature

[coreboot] Re: [RFC] vboot recovery reason clearing

correctly signed image. vboot will not attempt to boot from RW, because of the recovery reason being non-zero. Thus the only way I see is to clear the recovery reason. How it is solved on ChromeOS systems after updating with correct RW firmware? Is there any flag (in vboot shared data/workbuf) to tell vboot

[coreboot] Re: request for support new hardware from coreboot

Artem > > > > > ___ > coreboot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com

[coreboot] [coreboot - Bug #499] coreboot will not boot edk2 on Lenovo T440p with CONFIG_RESOURCE_ALLOCATION_TOP_DOWN enabled, cannot disable this setting during build

Issue #499 has been updated by Michał Żygowski. Throwing my 2 cents here after finding out TOP_DOWN is the culprit of my problems today: > Seems to affect more than Haswell, as I can reproduce on ADL and RDL w/ > UefiPayloadPkg or UPL. Yes, it most likely affects almost ever

[coreboot] [coreboot - Bug #499] coreboot will not boot edk2 on Lenovo T440p with CONFIG_RESOURCE_ALLOCATION_TOP_DOWN enabled, cannot disable this setting during build

Issue #499 has been updated by Michał Żygowski. Sean Rhodes wrote in #note-22: > > Not related to TOP_DOWN. > > It is - even if it's indirect, I can break/fix the splash with TOP_DOWN=n or y I meant the `Failed to add memory space :0xFEC0 0x1000` error. It is still p

[coreboot] Re: Custom Splash Screen

-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com OpenPGP_0x6B5BA214D21FCEB2.asc Description: OpenPGP public key OpenPGP_signature Description: OpenPGP digital signature ___ coreb

[coreboot] [coreboot - Feature #433] Unify TPM drivers in coreboot

Issue #433 has been updated by Michał Żygowski. Sergii Dmytruk wrote in #note-5: > https://review.coreboot.org/c/coreboot/+/69162 was merged today, so I think > this can be closed. I have added 3 more patches that ought to be merged before we can consider it closed:

[coreboot] [coreboot - Bug #536] (New) Cannot build coreboot-sdk

Issue #536 has been reported by Michał Żygowski. Bug #536: Cannot build coreboot-sdk https://ticket.coreboot.org/issues/536 * Author: Michał Żygowski * Status: New * Priority: Normal * Assignee: Martin Roth * Target version: none * Start date: 2024-04-24

[coreboot] [coreboot - Bug #536] Cannot build coreboot-sdk

Issue #536 has been updated by Michał Żygowski. Nico Huber wrote in #note-2: > Why explicitly specify `libcurl4` anyway? If it's a dependency, `apt-get` can > solve it. If we want to build anything with it, we need one of the `-dev` > variants instead. Good point. Removing libc

[coreboot] [coreboot - Bug #536] Cannot build coreboot-sdk

Issue #536 has been updated by Michał Żygowski. Patch: https://review.coreboot.org/c/coreboot/+/82066 Couldn't build coreboot-sdk completely, because gerrit is having some troubles (getting 504 when cloning or accessing it via browser) Bug #536: Cannot

[coreboot] Re: Pointers in FSP config?

ot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, -- Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com OpenPGP_0x6B5BA214D21FCEB2.asc Description: OpenPGP