On Tue, Mar 21, 2017 at 09:22:50AM -0700, Dylan Baker wrote:
> Quoting Jani Nikula (2017-03-21 07:44:55)
> > On Thu, 16 Mar 2017, Dylan Baker wrote:
> > > First it's written in python, [...]
> >
> > How does meson handle python 2 vs. 3? How do you avoid issues in the
> >
https://bugs.freedesktop.org/show_bug.cgi?id=100308
Bug ID: 100308
Summary: *ERROR* clock recovery reached max voltage
Product: DRI
Version: DRI git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=100306
Michel Dänzer changed:
What|Removed |Added
Version|unspecified |17.0
QA
https://bugs.freedesktop.org/show_bug.cgi?id=100242
--- Comment #7 from Michel Dänzer ---
I indeed misread your comment, sorry. Can you bisect Mesa?
--
You are receiving this mail because:
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For RK3399, the grf clock should be controlled by dw-mipi-dsi driver,
add the description for this clock.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
---
Changes in v4:
- remove "additional"
Changes in v3: None
Changes in v2: None
https://bugs.freedesktop.org/show_bug.cgi?id=100242
Michel Dänzer changed:
What|Removed |Added
Attachment #130279|text/x-log |text/plain
For RK3399, the phy_cfg_clk is a required clock, if phy_cfg_clk is
disabled, MIPI phy can not work. Let's return a error if there is no
phy_cfg_clk in dts property, when the pdata match RK3399.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
---
For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
not RK3399_GRF_SOC_CON19.
Signed-off-by: Chris Zhong
Reviewed-by: Brian Norris
Reviewed-by: Sean Paul
---
Changes in v4: None
Changes in v3: None
Hi all
This series set the phy_cfg_clk to be a required clock for RK3399, and
add a grf clock control in dw-mipi-dsi driver. And then correct a
register name.
Changes in v4:
- remove "additional"
- print the err after clk_prepare_enable(dsi->grf_clk)
Changes in v3:
- add a
For RK3399, the grf clk should be enabled before writing grf registers,
otherwise the register value can not be changed.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
---
Changes in v4:
- print the err after clk_prepare_enable(dsi->grf_clk)
The Innolux P079ZCA is a 7.85" panel with a 768X1024 resolution and
connected to DSI using four lanes.
Signed-off-by: Chris Zhong
Reviewed-by: Brian Norris
---
Changes in v3: None
Changes in v2: None
Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI
panel.
Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
Tested-by: Brian Norris
---
Changes in v3:
- printk err after
Hi inki,
Could you check the this patch?
For reference, patch 1/5 and 2/5 have already been applied to Krzysztof
tree.
Best regards,
Hoegeun
On 03/08/2017 01:54 PM, Hoegeun Kwon wrote:
The dsi + panel is a parental relationship, so OF grpah is not needed.
Therefore, the current
https://bugs.freedesktop.org/show_bug.cgi?id=100303
Samuel Pitoiset changed:
What|Removed |Added
Component|Drivers/Gallium/radeonsi
On Mon, Mar 20, 2017 at 04:36:14PM -0700, Eric Anholt wrote:
> +static struct amba_driver pl111_amba_driver = {
> + .drv = {
> + .name = "clcd-pl11x",
either:
.name = "clcd-pl111",
or:
.name = "drm-clcd-pl111",
otherwise the driver names will
On Fri, Mar 17, 2017 at 11:54:20AM +0800, Chris Zhong wrote:
> Hi all
>
> This series set the phy_cfg_clk to be a required clock for RK3399, and
> add a grf clock control in dw-mipi-dsi driver. And then correct a
> register name.
Series looks good to me, and works well on RK3399.
Tested-by:
Currently we are adding all components from the dts, if one of their
drivers been disabled, we would not be able to bring up others.
Refactor component match logic, follow exynos drm.
Signed-off-by: Jeffy Chen
Reviewed-by: Andrzej Hajda
Acked-by:
mtk_hdmi_setup_vendor_specific_infoframe will return before handle
mtk_hdmi_hw_send_info_frame.Because hdmi_vendor_infoframe_pack
returns the number of bytes packed into the binary buffer or
a negative error code on failure.
So correct it.
Signed-off-by: Nickey Yang
Sent from my iPhone
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On Tue, Mar 21, 2017 at 11:56 AM, Emil Velikov
wrote:
> On 21 March 2017 at 18:06, Matt Turner wrote:
> > On Tue, Mar 21, 2017 at 10:16 AM, Emil Velikov
> wrote:
> >> On 21 March 2017 at 15:57, Matt Turner
+ Thierry for real
On Tue, Mar 21, 2017 at 03:26:35PM -0400, Sean Paul wrote:
> On Wed, Mar 15, 2017 at 03:19:13PM +0800, Chris Zhong wrote:
> > Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI
> > panel.
> >
> > Signed-off-by: Chris Zhong
> > ---
> >
I have an i.MX6 platform with 2 display port interfaces, one driven by the
HDMI interface, the other by LVDS, both via bridges. We are currently
experiencing the following error when we boot with the monitor connected
to the LVDS backed interface and then connect a monitor to the HDMI backed
On Fri, Mar 17, 2017 at 11:54:24AM +0800, Chris Zhong wrote:
> For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
> not RK3399_GRF_SOC_CON19.
Matches the TRM for me, and otherwise it's a no-op:
Reviewed-by: Brian Norris
> Signed-off-by: Chris
On 03/20/2017 08:52 PM, Rob Clark wrote:
On Mon, Mar 20, 2017 at 2:25 PM, Oleksandr Andrushchenko
wrote:
On 03/20/2017 08:17 PM, Rob Clark wrote:
On Mon, Mar 20, 2017 at 2:01 PM, Oleksandr Andrushchenko
wrote:
On 03/20/2017 07:38 PM, Rob Clark wrote:
Vendor specific infoframe is mandatory for 4K2K resolution.
Without this, the HDMI protocol compliance fails.
Signed-off-by: Nickey Yang
Reviewed-by: Jose Abreu
---
drivers/gpu/drm/bridge/dw-hdmi.c | 53
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/i915_gem_shrinker.c
between commit:
3d3d18f086cd ("drm/i915: Avoid rcu_barrier() from reclaim paths (shrinker)")
from the drm-intel-fixes tree and commit:
519d52498156 ("drm/i915:
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/i915_gem_context.c
between commit:
590379aef2e3 ("drm/i915: make context status notifier head be per engine")
from the drm-intel-fixes tree and commits:
2355cf088d46 ("drm/i915: Create context
https://bugs.freedesktop.org/show_bug.cgi?id=100270
--- Comment #7 from brett.hass...@gmail.com ---
(In reply to Alex Deucher from comment #6)
> (In reply to brett.hassall from comment #5)
> > (In reply to Emil Velikov from comment #2)
> > > If your bisection has gone right, you're looking at
https://bugzilla.kernel.org/show_bug.cgi?id=193981
--- Comment #11 from winches (dry...@gmx.fr) ---
I can try. I've seen how to do on the wiki.
I will test the kernel 4.9.1 and the 4.11rc1 tomorrow.
It may be longto do all the bisect, it took nearly 40-50 min to compile.
--
You are receiving
Hey Kai,
Quoting Kai Wasserbäch (2017-03-21 11:36:31)
> I hope the rest of the Mesa project would follow such a rule. Because if
> there's
> something I absolutely hate about all those "new" build systems, then it's
> their
> tendency to just download stuff and build/include that. This seems to
On Tue, Mar 21, 2017 at 01:38:31PM -0700, Brian Norris wrote:
> + Thierry for real
>
> On Tue, Mar 21, 2017 at 03:26:35PM -0400, Sean Paul wrote:
> > On Wed, Mar 15, 2017 at 03:19:13PM +0800, Chris Zhong wrote:
> > > Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI
> > >
Sean Paul writes:
> This series pulls out the power-sequencing code from panel-simple into a
> panel-common helper library. This allows drivers that cannot leverage
> panel-simple to share some code.
>
> I've converted the 2 sharp mipi drivers, and Chris Zhong's driver on
Sean Paul writes:
> Instead of duplicating common code from panel-simple, use the panel-common
> helpers.
>
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/panel/Kconfig | 1 +
>
Yannick Fertre writes:
> This controller provides output signals to interface directly a variety
> of LCD and TFT panels. These output signals are: RGB signals
> (up to 24bpp), vertical & horizontal synchronisations, data enable and
> the pixel clock.
I've got some
Yannick Fertre writes:
> Acked-by: Rob Herring
> Signed-off-by: Yannick Fertre
> ---
> .../devicetree/bindings/display/st,stm32-ltdc.txt | 36
> ++
> 1 file changed, 36 insertions(+)
> create mode 100644
>
https://bugs.freedesktop.org/show_bug.cgi?id=100305
Chris Wilson changed:
What|Removed |Added
Status|NEW |RESOLVED
On Thu, Mar 16, 2017 at 03:14:28PM +0100, Andrzej Hajda wrote:
> On 10.03.2017 05:32, Sean Paul wrote:
> > From: zain wang
> >
> > We would meet a short black screen when exit PSR with the full link
> > training, In this case, we should use fast link train instead of full
> >
On Fri, Mar 17, 2017 at 11:54:23AM +0800, Chris Zhong wrote:
> For RK3399, the grf clk should be enabled before writing grf registers,
> otherwise the register value can not be changed.
>
> Signed-off-by: Chris Zhong
Minor nit below, with that:
Reviewed-by: Sean Paul
On Tue, Mar 21, 2017 at 04:16:23PM -0400, Sean Paul wrote:
> On Fri, Mar 17, 2017 at 11:54:21AM +0800, Chris Zhong wrote:
> > For RK3399, the phy_cfg_clk is a required clock, if phy_cfg_clk is
> > disabled, MIPI phy can not work. Let's return a error if there is no
> > phy_cfg_clk in dts property,
On Tue, Mar 21, 2017 at 04:17:00PM -0400, Sean Paul wrote:
> On Fri, Mar 17, 2017 at 11:54:22AM +0800, Chris Zhong wrote:
> > For RK3399, the grf clock should be controlled by dw-mipi-dsi driver,
> > add the description for this clock.
> >
> > Signed-off-by: Chris Zhong
> >
On 17-03-21 20:12:15, Ville Syrjälä wrote:
From: Ville Syrjälä
Allow framebuffers dimesions to be misaligned w.r.t. the subsampling
factors. No real reason the core should have to enforce this, and
it definitely starts to cause us issues with the i915 CCS
https://bugzilla.kernel.org/show_bug.cgi?id=193981
--- Comment #10 from Alex Deucher (alexdeuc...@gmail.com) ---
(In reply to winches from comment #9)
> hello, i have the same bug. On my sapphire r9 380 itx, the fan seem to work
> at 100% from the loading of the kernel (no problem in bios and in
On Fri, Mar 17, 2017 at 11:54:24AM +0800, Chris Zhong wrote:
> For the RK3399, the grf_switch_reg name should be RK3399_GRF_SOC_CON20,
> not RK3399_GRF_SOC_CON19.
>
> Signed-off-by: Chris Zhong
Reviewed-by: Sean Paul
> ---
>
> Changes in v3: None
>
On Fri, Mar 17, 2017 at 11:54:22AM +0800, Chris Zhong wrote:
> For RK3399, the grf clock should be controlled by dw-mipi-dsi driver,
> add the description for this clock.
>
> Signed-off-by: Chris Zhong
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>
On Fri, Mar 17, 2017 at 11:54:21AM +0800, Chris Zhong wrote:
> For RK3399, the phy_cfg_clk is a required clock, if phy_cfg_clk is
> disabled, MIPI phy can not work. Let's return a error if there is no
> phy_cfg_clk in dts property, when the pdata match RK3399.
>
The dt bindings say this is a
On Thu, Mar 16, 2017 at 02:40:21PM +0100, Andrzej Hajda wrote:
> On 10.03.2017 05:32, Sean Paul wrote:
> > From: zain wang
> >
> > There is a race between AUX CH bring-up and enabling bridge which will
> > cause link training to fail. To avoid hitting it, don't change psr
On Tue, Mar 21, 2017 at 02:42:11PM +0800, Jeffy Chen wrote:
> Currently we are adding all components from the dts, if one of their
> drivers been disabled, we would not be able to bring up others.
>
> Refactor component match logic, follow exynos drm.
>
> Signed-off-by: Jeffy Chen
Russell King - ARM Linux writes:
> On Mon, Mar 20, 2017 at 04:36:14PM -0700, Eric Anholt wrote:
>> +static struct amba_driver pl111_amba_driver = {
>> +.drv = {
>> +.name = "clcd-pl11x",
>
> either:
>
> .name = "clcd-pl111",
>
> or:
>
>
On Tue, Mar 21, 2017 at 04:59:55PM +0800, Shawn Guo wrote:
> From: Shawn Guo
>
> There is a leftover 'inf' field in struct zx_hdmi from commit
> '831a8d5e0bef ("drm: zte: move struct vou_inf into zx_vou driver")'.
> Remove it.
>
> Signed-off-by: Shawn Guo
On Tue, Mar 21, 2017 at 04:52:28PM +0100, Daniel Vetter wrote:
> The discussion pretty much concluded without objections, let's
> document what we agreed on.
>
> Cc'ing linux-doc for the new tag in Documentation/process/index.rst.
>
> Cc: Jonathan Corbet
> Cc:
https://bugzilla.kernel.org/show_bug.cgi?id=193981
winches (dry...@gmx.fr) changed:
What|Removed |Added
CC||dry...@gmx.fr
--- Comment #9
On Wed, Mar 15, 2017 at 03:19:13PM +0800, Chris Zhong wrote:
> Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI
> panel.
>
> Signed-off-by: Chris Zhong
> ---
>
> Changes in v2:
> - add some error check
> - always use Low power mode to send commend
> -
On Tue, Mar 21, 2017 at 11:56 AM, Emil Velikov wrote:
> On 21 March 2017 at 18:06, Matt Turner wrote:
>> (1) Non-recursive automake is necessary for parallel build performance
> Fully agree
>
>> (2) Non-recursive automake is intractably
On 21 March 2017 at 18:06, Matt Turner wrote:
> On Tue, Mar 21, 2017 at 10:16 AM, Emil Velikov
> wrote:
>> On 21 March 2017 at 15:57, Matt Turner wrote:
>>> On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov
Hey Dylan,
Dylan Baker wrote on 21.03.2017 18:34:
> Quoting Kai Wasserbäch (2017-03-21 09:50:52)
>> I've just a few points, since I'm not too enthused by the prospect of having
>> to
>> deal with yet another build system with yet another slightly different
>> syntax.
>> But ultimately this is
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes
which parts of the main surface are
From: Ville Syrjälä
Allow framebuffers dimesions to be misaligned w.r.t. the subsampling
factors. No real reason the core should have to enforce this, and
it definitely starts to cause us issues with the i915 CCS support.
So let's just lift the restriction.
Let's
From: Ville Syrjälä
Allow drivers to return a custom drm_format_info structure for special
fb layouts. We'll use this for the compression control surface in i915.
v2: Fix drm_get_format_info() kernel doc (Laurent)
Don't pass 'dev' to the new hook (Laurent)
v3:
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes which
parts of the main surface are
From: Ville Syrjälä
framebuffer_check() has some hand rolled code to compute the color plane
dimensions based on the subsampled information. Let's share the code
between framebuffer_check() and drm_framebuffer_plane_{width,height}().
Cc: Ben Widawsky
From: Ville Syrjälä
Another iteration of the i915 CCS support. Main change is lifting the
fb dimensions hsub/vsub alignment restrictions from the core. Without that
userspace would have to align the fb size be a multiple of 8x16 pixels
which isn't something they
On Tue, Mar 21, 2017 at 10:16 AM, Emil Velikov wrote:
> On 21 March 2017 at 15:57, Matt Turner wrote:
>> On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov
>> wrote:
>>> On 20 March 2017 at 18:30, Matt Turner
https://bugs.freedesktop.org/show_bug.cgi?id=100304
--- Comment #4 from Mike Lothian ---
Yes setting amdgpu.runpm=0 fixes the issue - also reverting the commit allows
me to boot
--
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https://bugs.freedesktop.org/show_bug.cgi?id=100305
Tomi Sarvela changed:
What|Removed |Added
OS|All |Linux (All)
https://bugs.freedesktop.org/show_bug.cgi?id=100305
Bug ID: 100305
Summary: [BAT][IGT]basic tests in gem_ctx_basic, gem_ctx_exec,
gem_ctx_params fail
Product: DRI
Version: DRI git
Hardware: Other
OS: All
Hi Kai,
Quoting Kai Wasserbäch (2017-03-21 09:50:52)
> Hey Dylan,
> I've just a few points, since I'm not too enthused by the prospect of having
> to
> deal with yet another build system with yet another slightly different syntax.
> But ultimately this is only a "my 2 cents" e-mail, since others
https://bugs.freedesktop.org/show_bug.cgi?id=100304
Mike Lothian changed:
What|Removed |Added
CC||m...@fireburn.co.uk
Hi Martyn,
On Tue, 2017-03-21 at 09:50 +, Martyn Welch wrote:
> I have an i.MX6 platform with 2 display port interfaces, one driven by the
> HDMI interface, the other by LVDS, both via bridges. We are currently
> experiencing the following error when we boot with the monitor connected
> to
https://bugs.freedesktop.org/show_bug.cgi?id=100304
--- Comment #2 from Alex Deucher ---
does disabling runpm work around it?
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On 21 March 2017 at 15:57, Matt Turner wrote:
> On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov
> wrote:
>> On 20 March 2017 at 18:30, Matt Turner wrote:
>>> On Mon, Mar 20, 2017 at 6:55 AM, Emil Velikov
https://bugs.freedesktop.org/show_bug.cgi?id=100304
--- Comment #1 from Alex Deucher ---
What chip is this?
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https://bugs.freedesktop.org/show_bug.cgi?id=100304
Bug ID: 100304
Summary: [bisected] Kernel oops on startup
Product: DRI
Version: DRI git
Hardware: Other
OS: All
Status: NEW
Severity: normal
https://bugs.freedesktop.org/show_bug.cgi?id=100270
--- Comment #6 from Alex Deucher ---
(In reply to brett.hassall from comment #5)
> (In reply to Emil Velikov from comment #2)
> > If your bisection has gone right, you're looking at either
> >
Hey Dylan,
I've just a few points, since I'm not too enthused by the prospect of having to
deal with yet another build system with yet another slightly different syntax.
But ultimately this is only a "my 2 cents" e-mail, since others are way deeper
involved with Mesa and their opinion is what
The trouble here is that it does multiple atomic commits under one
drm_modeset_lock_all, which breaks the behind-the-scenes acquire
context magic that function pulls off. It's much better to have one
overall atomic commit. That we still have multiple atomic commits
prevents us from adding some
Quoting Jani Nikula (2017-03-21 07:44:55)
> On Thu, 16 Mar 2017, Dylan Baker wrote:
> > First it's written in python, [...]
>
> How does meson handle python 2 vs. 3? How do you avoid issues in the
> build files wrt this? On Debian meson seems to depend on python 3, so
> are
I would personally rather have scons and autotools than cmake. I've had the
misfortune of using all three, and cmake is not an improvement in my opinion.
Quoting Grazvydas Ignotas (2017-03-21 08:13:31)
> It might make sense to give more attention to cmake just because many
> mesa-related projects
On Mon, Mar 20, 2017 at 10:10 PM, Jonathan Gray wrote:
> On Mon, Mar 20, 2017 at 11:30:25AM -0700, Matt Turner wrote:
>> On Mon, Mar 20, 2017 at 6:55 AM, Emil Velikov
>> wrote:
>> > Seems like we ended up all over the place, so let me try afresh.
>> >
On Mon, Mar 20, 2017 at 10:00 PM, Jonathan Gray wrote:
> On Tue, Mar 21, 2017 at 08:28:22AM +1100, Timothy Arceri wrote:
>>
>>
>> On 21/03/17 06:39, Emil Velikov wrote:
>> > On 20 March 2017 at 18:30, Matt Turner wrote:
>> > > On Mon, Mar 20, 2017 at 6:55 AM,
On Mon, Mar 20, 2017 at 12:39 PM, Emil Velikov wrote:
> On 20 March 2017 at 18:30, Matt Turner wrote:
>> On Mon, Mar 20, 2017 at 6:55 AM, Emil Velikov
>> wrote:
>>> Seems like we ended up all over the place, so let me try
The discussion pretty much concluded without objections, let's
document what we agreed on.
Cc'ing linux-doc for the new tag in Documentation/process/index.rst.
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Cc: Dave Airlie
Cc: Sean Paul
On 2017-03-20 05:42 AM, Shirish S wrote:
On Mon, Mar 20, 2017 at 1:51 PM, Daniel Vetter wrote:
On Mon, Mar 20, 2017 at 09:58:01AM +0530, Shirish S wrote:
First of all, thanks for your comments/insights.
On Sat, Mar 18, 2017 at 12:59 AM, Eric Anholt wrote:
Op 21-03-17 om 16:26 schreef Daniel Vetter:
> The trouble here is that it does multiple atomic commits under one
> drm_modeset_lock_all, which breaks the behind-the-scenes acquire
> context magic that function pulls off. It's much better to have one
> overall atomic commit. That we still have
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_canvas.c | 4 +++-
drivers/gpu/drm/meson/meson_drv.c | 5 +++--
drivers/gpu/drm/meson/meson_dw_hdmi.c | 25 +
drivers/gpu/drm/meson/meson_vclk.c| 22 +++---
This patch adds the dw-hdmi bindings and RST kerneldoc to maintained files.
Signed-off-by: Neil Armstrong
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e88154f..3df68c73 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Add missing VPU HDMI register.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_registers.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/meson/meson_registers.h
b/drivers/gpu/drm/meson/meson_registers.h
index 6adf9c1..2847381 100644
The HDMI modes needs more CMA memory to be reserved at boot-time.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
This binding describes the Amlogic Meson specific extension to the
Synopsys Designware HDMI Controller.
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
.../bindings/display/amlogic,meson-dw-hdmi.txt | 111 +
1 file
This patchs adds support for the supported HDMI modes clocks frequencies.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_vclk.c | 624 +++-
drivers/gpu/drm/meson/meson_vclk.h | 6 +-
Signed-off-by: Neil Armstrong
---
Documentation/gpu/index.rst | 1 +
Documentation/gpu/meson.rst | 61 +
2 files changed, 62 insertions(+)
create mode 100644 Documentation/gpu/meson.rst
diff --git
The Amlogic Meson GXBB/GXL/GXM SoCs embeds a Synopsys DesignWare HDMI TX
Controller with a custom Bridge + PHY around the Controller.
This driver makes uses of all the custom PHY plat data callbacks and enables
the compatible HDMI modes to be configured as a drm_encoder instance.
Signed-off-by:
Clean the crtc_enable by using the proper crtc_state instead of the state
of the primary plane state data.
Also fix the dependency to commit the plane changes even if enable is called
after the flush.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_crtc.c
This patch adds support for the supported HDMI Venc modes and add the VPP mux
value to switch to ENCP encoder.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_venc.c | 1245 +++-
drivers/gpu/drm/meson/meson_venc.h |7 +
This patch adds support for optional components connected through the
Device Tree endpoints scheme.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_drv.c | 113 +-
1 file changed, 99 insertions(+), 14 deletions(-)
diff
Since this is managed now by the components code, if CVBS is not available
and HDMI neither, the drm driver won't bind anyway.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_venc_cvbs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The Amlogic GX SoCs implements a Synopsys DesignWare HDMI TX Controller
in combination with a very custom PHY.
This patchset depends on Laurent Pinchart patchset merged in drm-misc-next
and my v4 patchset at [1] to permit PHY control from outside the dw-hdmi driver.
The Synopsys DesignWare HDMI
On Tue, Mar 21, 2017 at 11:13 AM, Grazvydas Ignotas wrote:
> everyone building graphics stacks or contributing to
> mesa should already be comfortable with cmake thanks to piglit and
> llvm, which might not be the case for meson.
Or they could be contributing to mesa because
Some display pipelines can only provide non-RBG input pixels to the HDMI TX
Controller, this patch takes the pixel format from the plat_data if provided.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 326 +-
From: Laurent Pinchart
In preparation for adding PHY operations to handle RX SENSE and HPD,
group all the PHY interrupt setup code in a single location and extract
it to a separate function.
Signed-off-by: Laurent Pinchart
The Amlogic GX SoCs implements a Synopsys DesignWare HDMI TX Controller
in combination with a very custom PHY.
Thanks to Laurent Pinchart's changes, the HW report the following :
Detected HDMI TX controller v2.01a with HDCP (meson_dw_hdmi_phy)
The following differs from common PHY integration
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