From: John Harrison
A workaround was added to the driver to allow OpenCL workloads to run
'forever' by disabling pre-emption on the RCS engine for Gen12.
It is not totally unbound as the heartbeat will kick in eventually
and cause a reset of the hung engine.
However, this does not work well in
From: John Harrison
If GuC encounters an error during engine reset, the i915 driver
promotes to full GT reset. This includes an info message about why the
reset is happening. However, that is not treated as a failure by any
of the CI systems because resets are an expected occurrance during
From: John Harrison
Allow engine resets on RCS, report problems with engine resets,
improve GuC log usability.
Signed-off-by: John Harrison
John Harrison (4):
drm/i915/guc: Speed up GuC log dumps
drm/i915/guc: Increase GuC log size for CONFIG_DEBUG_GEM
drm/i915/guc: Flag an error if an
From: John Harrison
Lots of testing is done with the DEBUG_GEM config option enabled but
not the DEBUG_GUC option. That means we only get teeny-tiny GuC logs
which are not hugely useful. Enabling full DEBUG_GUC also spews lots
of other detailed output that is not generally desired. However,
From: John Harrison
Add support for telling the debugfs interface the size of the GuC log
dump in advance. Without that, the underlying framework keeps calling
the 'show' function with larger and larger buffer allocations until it
fits. That means reading the log from graphics memory many times
Hi Linus,
On Sat, Dec 11, 2021 at 5:37 AM Linus Walleij wrote:
>
> On Fri, Dec 10, 2021 at 6:49 PM Jagan Teki wrote:
> >
> > devm_drm_of_get_bridge is capable of looking up the downstream
> > bridge and panel and trying to add a panel bridge if the panel
> > is found.
> >
> > Replace explicit
On Fri, Dec 10, 2021 at 05:33:02PM -0800, John Harrison wrote:
> On 12/10/2021 16:56, Matthew Brost wrote:
> > Testing the stealing of guc ids is hard from user spaec as we have 64k
> spaec -> space
>
> > guc_ids. Add a selftest, which artificially reduces the number of guc
> > ids, and forces a
On Fri, Dec 10, 2021 at 05:33:02PM -0800, John Harrison wrote:
> On 12/10/2021 16:56, Matthew Brost wrote:
> > Testing the stealing of guc ids is hard from user spaec as we have 64k
> spaec -> space
>
> > guc_ids. Add a selftest, which artificially reduces the number of guc
> > ids, and forces a
On Fri, Dec 10, 2021 at 05:45:05PM -0800, John Harrison wrote:
> On 12/10/2021 17:43, John Harrison wrote:
> > On 12/10/2021 16:56, Matthew Brost wrote:
> > > Print CT state (H2G + G2H head / tail pointers, credits) on CT
> > > deadlock.
> > >
> > > Signed-off-by: Matthew Brost
> > Reviewed-by:
On 12/10/2021 17:43, John Harrison wrote:
On 12/10/2021 16:56, Matthew Brost wrote:
Print CT state (H2G + G2H head / tail pointers, credits) on CT
deadlock.
Signed-off-by: Matthew Brost
Reviewed-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 +
1 file
On 12/10/2021 16:56, Matthew Brost wrote:
Print CT state (H2G + G2H head / tail pointers, credits) on CT
deadlock.
Signed-off-by: Matthew Brost
Reviewed-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 +
1 file changed, 9 insertions(+)
diff --git
On 12/10/2021 16:56, Matthew Brost wrote:
Testing the stealing of guc ids is hard from user spaec as we have 64k
spaec -> space
guc_ids. Add a selftest, which artificially reduces the number of guc
ids, and forces a steal. Details of test has comment in code so will not
has -> are
But would
On Fri, Dec 10, 2021 at 05:07:12PM -0800, John Harrison wrote:
> On 12/10/2021 16:56, Matthew Brost wrote:
> > From: John Harrison
> >
> > While attempting to debug a CT deadlock issue in various CI failures
> > (most easily reproduced with gem_ctx_create/basic-files), I was seeing
> > CPU
On 12/10/2021 16:56, Matthew Brost wrote:
Previously assigned whole guc_id structure (list, spin lock) which is
incorrect, only assign the guc_id.id.
Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking")
Signed-off-by: Matthew Brost
Reviewed-by: John Harrison
---
On 12/10/2021 16:56, Matthew Brost wrote:
From: John Harrison
While attempting to debug a CT deadlock issue in various CI failures
(most easily reproduced with gem_ctx_create/basic-files), I was seeing
CPU deadlock errors being reported. This were because the context
destroy loop was blocking
Let's be paranoid and kick the G2H tasklet, which dequeues messages, if
G2H credit are exhausted.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
Print CT state (H2G + G2H head / tail pointers, credits) on CT
deadlock.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
From: John Harrison
While attempting to debug a CT deadlock issue in various CI failures
(most easily reproduced with gem_ctx_create/basic-files), I was seeing
CPU deadlock errors being reported. This were because the context
destroy loop was blocking waiting on H2G space from inside an IRQ
Previously assigned whole guc_id structure (list, spin lock) which is
incorrect, only assign the guc_id.id.
Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking")
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
1 file changed, 1
A full GT reset can race with the last context put resulting in the
context ref count being zero but the destroyed bit not yet being set.
Remove GEM_BUG_ON in scrub_guc_desc_for_outstanding_g2h that asserts the
destroyed bit must be set in ref count is zero.
Reviewed-by: Daniele Ceraolo Spurio
Patches 1 & 2 address bugs in stealing of guc_ids and patch 7 tests this
path.
Patches 4-6 address some issues with the CTs exposed by the selftest in
patch 7. Basically if a lot of contexts were all deregistered all at
once, the CT channel could deadlock.
Patch 3 is a small fix that is already
s/ce/cn/ when grabbing guc_state.lock before calling
clr_context_registered.
Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking")
Signed-off-by: Matthew Brost
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4 ++--
1 file changed, 2
Testing the stealing of guc ids is hard from user spaec as we have 64k
guc_ids. Add a selftest, which artificially reduces the number of guc
ids, and forces a steal. Details of test has comment in code so will not
repeat here.
Signed-off-by: Matthew Brost
---
On 2021-12-10 4:48 p.m., Rajneesh Bhardwaj wrote:
When an application having open file access to a node forks, its shared
mappings also get reflected in the address space of child process even
though it cannot access them with the object permissions applied. With the
existing permission checks
On 2021-12-10 10:13 a.m., Christian König wrote:
Am 10.12.21 um 15:25 schrieb Guilherme G. Piccoli:
On 10/12/2021 11:16, Alex Deucher wrote:> [...]
Why not just reload the driver after kexec?
Alex
Because the original issue is the kdump case, and we want a very very
tiny kernel - also, the
On Sat, Dec 11, 2021 at 1:07 AM Linus Walleij wrote:
> On Fri, Dec 10, 2021 at 6:49 PM Jagan Teki wrote:
> > - dev_info(dev, "connected to panel\n");
> > - d->panel = panel;
>
> How does this assignment happen after your patch?
> I'm using that...
>
>
On 12/9/2021 8:40 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Add support for telling the debugfs interface the size of the GuC log
dump in advance. Without that, the underlying framework keeps calling
the 'show' function with larger and larger buffer allocations until it
fits.
Prevent a build format warning by using the correct format specifier
to print size_t data.
Fixes this build warning:
../drivers/gpu/drm/vmwgfx/vmwgfx_gem.c:230:33: warning: format ‘%ld’ expects
argument of type ‘long int’, but argument 4 has type ‘size_t {aka unsigned
int}’ [-Wformat=]
Fixes:
From: Michal Wajdeczko
Future GuC/HuC firmwares might be signed with different key sizes.
Don't assume that it must be always 2048 bits long.
Signed-off-by: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7
Some of the newer HW will use bigger RSA keys to authenticate the GuC
binary. On those platforms the HW will read the key from memory instead
of the RSA registers, so we need to copy it in a dedicated vma, like we
do for the HuC. The address of the key is provided to the HW via the
first RSA
The FAILURE state of uc_fw currently implies that the fw is loadable
(i.e init completed), so we can't use it for init failures and instead
need a dedicated error code.
Note that this currently does not cause any issues because if we fail to
init any of the firmwares we abort the load, but better
Some of the newer platforms use a bigger RSA key to authenticate the GuC,
which is provided to the HW via a ggtt-pinned object instead of mmio.
While doing the changes for this I've also spotted an inconsistency in
the error status of the fw on init failure, so I've added a path to fix
that as
On Fri, Dec 10, 2021 at 6:49 PM Jagan Teki wrote:
>
> devm_drm_of_get_bridge is capable of looking up the downstream
> bridge and panel and trying to add a panel bridge if the panel
> is found.
>
> Replace explicit finding calls with devm_drm_of_get_bridge.
>
> Cc: Philipp Zabel
> Cc: Chun-Kuang
Hi Vinod,
On 2021-11-16 11:52:55, Vinod Koul wrote:
> When DSC is enabled, we need to configure DSI registers accordingly and
> configure the respective stream compression registers.
>
> Add support to calculate the register setting based on DSC params and
> timing information and configure
From: Ira Weiny
The default case leaves the buffer object mapped in error.
Add amdgpu_bo_kunmap() to that case to ensure the mapping is cleaned up.
Signed-off-by: Ira Weiny
---
NOTE: It seems like this function could use a fair bit of refactoring
but this is the easiest way to fix the actual
From: Ira Weiny
kmap() is being deprecated. So this comment could be misleading in the
future.
Change this comment to point to using kmap_local_page(). While here
remove 'we' from the comment.
Signed-off-by: Ira Weiny
---
drivers/gpu/drm/msm/msm_gem_submit.c | 4 ++--
1 file changed, 2
From: Ira Weiny
kmap() is being deprecated and these instances are easy to convert to
kmap_local_page().
Furthermore, in gma_crtc_cursor_set() use the memcpy_from_page() helper
instead of an open coded use of kmap_local_page().
Signed-off-by: Ira Weiny
---
From: Ira Weiny
kmap() is being deprecated and this usage is local to the thread. Use
kmap_local_page() instead.
Signed-off-by: Ira Weiny
---
drivers/gpu/drm/radeon/radeon_ttm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c
From: Ira Weiny
The default case leaves the buffer object mapped in error.
Add radeon_bo_kunmap() to that case to ensure the mapping is cleaned up.
Signed-off-by: Ira Weiny
---
NOTE: It seems like this function could use a fair bit of refactoring
but this is the easiest way to fix the actual
From: Ira Weiny
This series starts by converting the last easy kmap() uses to
kmap_local_page().
There is one more call to kmap() wrapped in ttm_bo_kmap_ttm(). Unfortunately,
ttm_bo_kmap_ttm() is called in a number of different ways including some which
are not thread local. I have a patch to
From: Ira Weiny
kmap() is being deprecated. These maps are thread local and can be
replaced with kmap_local_page().
Replace kmap() with kmap_local_page()
Signed-off-by: Ira Weiny
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
From: Ira Weiny
kmap() is being deprecated and these usages are all local to the thread
so there is no reason kmap_local_page() can't be used.
Replace kmap() calls with kmap_local_page().
Signed-off-by: Ira Weiny
---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 4 ++--
Hi Dave, Daniel,
More stuff for 5.17.
The following changes since commit 70897848730470cc477d5d89e6222c0f6a9ac173:
drm/amdgpu/display: Only set vblank_disable_immediate when PSR is not enabled
(2021-12-01 16:00:58 -0500)
are available in the Git repository at:
On Fri, Dec 10, 2021 at 11:29 AM Tim Harvey wrote:
>
> On Fri, Dec 10, 2021 at 10:41 AM Dave Stevenson
> wrote:
> >
> > On Fri, 10 Dec 2021 at 18:20, Tim Harvey wrote:
> > >
> > > On Thu, Nov 18, 2021 at 12:52 PM Tim Harvey wrote:
> > > >
> > > > On Thu, Nov 18, 2021 at 10:30 AM Dave Stevenson
On 2021-12-09 4:04 p.m., Yann Dirson wrote:
Thanks for this. It's really good to see this.
Reviewed-by: Harry Wentland
Hearfully seconded, let's get this rolling :)
Reviewed-by: Yann Dirson
Series applied to amd-staging-drm-next
Thanks a lot!
Harry
On 2021-12-09 09:20, Rodrigo
When an application having open file access to a node forks, its shared
mappings also get reflected in the address space of child process even
though it cannot access them with the object permissions applied. With the
existing permission checks on the gem objects, it might be reasonable to
also
On Wed, 08 Dec 2021 09:33:37 +0800, Tommy Haung wrote:
> Add new CRT reset define for ast2600.
>
> Reported-by: kernel test robot
> Signed-off-by: Tommy Haung
> ---
> include/dt-bindings/clock/ast2600-clock.h | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring
This is a revert of commits
d67739268cf0e ("drm/i915/gt: Mark up the nested engine-pm timeline lock as
irqsafe")
6c69a45445af9 ("drm/i915/gt: Mark context->active_count as protected by
timeline->mutex")
6dcb85a0ad990 ("drm/i915: Hold irq-off for the entire fake lock period")
The
Hi Nikolaus,
Le ven., déc. 10 2021 at 10:53:18 -0600, Rob Herring
a écrit :
On Thu, Dec 02, 2021 at 07:39:48PM +0100, H. Nikolaus Schaller wrote:
From: Sam Ravnborg
Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
Based on .txt binding from Zubair Lutfullah Kakakhel
We
This adds the ACPI driver for the ChromeOS privacy screen that is
present on some chromeos devices.
Note that I found that ACPI drivers are bound to their devices AFTER
the drm probe. So on chromebooks with privacy-screen, this causes a
probe deferral for i915 driver, which results in a delay of
Add a static entry in the x86 table, to detect and wait for
privacy-screen on some ChromeOS platforms.
Please note that this means that if CONFIG_CHROMEOS_PRIVACY_SCREEN is
enabled, and if "GOOG0010" device is found in ACPI, then the i915 probe
shall return EPROBE_DEFER until a platform driver
The pull request you sent on Fri, 10 Dec 2021 14:28:53 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-12-10
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9b302ffe4e8d7e62f3170aa0097ff979880ba61d
Thank you!
--
Deet-doot-dot, I am a bot.
ttm->num_pages is uint32_t which was causing very large buffers to
only populate a truncated size.
This fixes gem_create@create-clear igt test on large memory systems.
Fixes: 7ae034590cea ("drm/i915/ttm: add tt shmem backend")
Signed-off-by: Robert Beckett
---
On Fri, Dec 10, 2021 at 10:41 AM Dave Stevenson
wrote:
>
> On Fri, 10 Dec 2021 at 18:20, Tim Harvey wrote:
> >
> > On Thu, Nov 18, 2021 at 12:52 PM Tim Harvey wrote:
> > >
> > > On Thu, Nov 18, 2021 at 10:30 AM Dave Stevenson
> > > wrote:
> > > >
> > > > On Thu, 18 Nov 2021 at 17:36, Tim
The new support drm bridges are moving towards atomic functions.
Replace atomic version of functions to continue the transition
to the atomic API.
Signed-off-by: Jagan Teki
---
Changes for v2:
- new patch
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 23 ++-
1 file changed,
Convert the encoders to bridge drivers in order to standardize on
a single API with built-in dumb encoder support for compatibility
with existing component drivers.
Driver bridge conversion will help to reuse the same bridge on
different platforms as exynos dsi driver can be used as a Samsung
Replace the manual panel handling code by a drm panel_bridge via
devm_drm_of_get_bridge().
Adding panel_bridge handling,
- Drops drm_connector and related operations as drm_bridge_attach
creates connector during attachment.
- Drops panel pointer and iterate the bridge, so-that it can operate
Trigger the panel operation helpers only if host found the panel.
Add check.
Signed-off-by: Jagan Teki
---
Changes for v2:
- new patch
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
Updated series about drm bridge conversion of exynos dsi.
Patch 1: panel checker
Patch 2: panel_bridge API
Patch 3: Bridge conversion
Patch 4: Atomic functions
[1]
https://patchwork.kernel.org/project/dri-devel/cover/20211122070633.89219-1-ja...@amarulasolutions.com/
Any inputs?
Jagan.
On Fri, Dec 10, 2021 at 10:24 AM Guilherme G. Piccoli
wrote:
>
> On 10/12/2021 12:13, Christian König wrote:
> > [...]
> > How about issuing a PCIe reset and re-initializing the ASIC with just
> > the VBIOS?
> >
> > That should be pretty straightforward I think.
> >
> > Christian.
>
>
> Thanks
On Fri, Dec 10, 2021 at 9:25 AM Guilherme G. Piccoli
wrote:
>
> On 10/12/2021 11:16, Alex Deucher wrote:> [...]
> > Why not just reload the driver after kexec?
> >
> > Alex
>
> Because the original issue is the kdump case, and we want a very very
> tiny kernel - also, the crash originally could
On Fri, 10 Dec 2021 at 18:20, Tim Harvey wrote:
>
> On Thu, Nov 18, 2021 at 12:52 PM Tim Harvey wrote:
> >
> > On Thu, Nov 18, 2021 at 10:30 AM Dave Stevenson
> > wrote:
> > >
> > > On Thu, 18 Nov 2021 at 17:36, Tim Harvey wrote:
> > > >
> > > > On Thu, Nov 18, 2021 at 6:28 AM Dave Stevenson
>
Hi,
On Fri, Dec 10, 2021 at 11:18:17PM +0530, Jagan Teki wrote:
> panel_bridge pointer never used anywhere except the one it
> looked up at nwl_dsi_bridge_attach.
>
> Drop it from the nwl_dsi structure.
>
> Cc: Guido Günther
> Signed-off-by: Jagan Teki
Reviewed-by: Guido Günther
> ---
>
On Thu, Nov 18, 2021 at 12:52 PM Tim Harvey wrote:
>
> On Thu, Nov 18, 2021 at 10:30 AM Dave Stevenson
> wrote:
> >
> > On Thu, 18 Nov 2021 at 17:36, Tim Harvey wrote:
> > >
> > > On Thu, Nov 18, 2021 at 6:28 AM Dave Stevenson
> > > wrote:
> > > >
> > > > Hi Tim
> > > >
> > > > On Thu, 18 Nov
On Fri, Dec 10, 2021 at 08:41:22AM +, Tvrtko Ursulin wrote:
>
> On 09/12/2021 19:14, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 12/9/2021 10:48 AM, Matthew Brost wrote:
> > > s/ce/cn/ when grabbing guc_state.lock before calling
> > > clr_context_registered.
> > >
> > > Fixes:
Upon failure, dma_alloc_coherent() returns NULL. If that does happen,
passing some uninitialised stack contents to dma_mapping_error() - which
belongs to a different API in the first place - has precious little
chance of detecting it.
Also include the correct header, because the fragile
Host1x seems to be relying on picking up dma-mapping.h transitively from
iova.h, which has no reason to include it in the first place. Fix the
former issue before we totally break things by fixing the latter one.
CC: Thierry Reding
CC: Mikko Perttunen
CC: dri-devel@lists.freedesktop.org
This reverts commit c206c7faeb3263a7cc7b4de443a3877cd7a5e74b.
In order to avoid any probe ordering issues, the I2C based downstream
bridge drivers now register and attach the DSI devices at the probe
instead of doing it on drm_bridge_function.attach().
Examples of those commits are:
commit
devm_drm_of_get_bridge is capable of looking up the downstream
bridge and panel and trying to add a panel bridge if the panel
is found.
Replace explicit finding calls with devm_drm_of_get_bridge.
Cc: Philipp Zabel
Cc: Chun-Kuang Hu
Cc: Linus Walleij
Signed-off-by: Jagan Teki
---
Note: for
panel_bridge pointer never used anywhere except the one it
looked up at nwl_dsi_bridge_attach.
Drop it from the nwl_dsi structure.
Cc: Guido Günther
Signed-off-by: Jagan Teki
---
drivers/gpu/drm/bridge/nwl-dsi.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git
Add node for APU tinysys.
Signed-off-by: Flora Fu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 35
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 62acaba7b033..de73fbf0cb90
APU integrated subsystem having MD32RV33 (MD32) that runs tinysys
The tinysys is runs on a microprocessor in APU. Its firmware
is loaded and booted from Kernel side. Kernel and tinysys use IPI
to send and receive messages.
Signed-off-by: Pi-Cheng Chen
Signed-off-by: Flora Fu
---
The APU software logger is for debug for remote processor.
The remote microprocessor's logs will be output to the mapped
memory and application processor can read logs from the
dedicated reserved registers
Signed-off-by: Flora Fu
---
drivers/soc/mediatek/apusys/Makefile| 2 +
Set up APU regulators for mdla and vvpu.
Signed-off-by: Flora Fu
---
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8192-evb.dts
index 5d9e108e41f5..431008466d77
Add mtk-apu-mailbox for mt8192 SOC.
Signed-off-by: Flora Fu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index cb2b171e0080..5c97dc7985b4 100644
---
Add apu-sw-logger node to enable debug into tinysys.
Signed-off-by: Flora Fu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index
Add APU power node for MT8192.
Signed-off-by: Flora Fu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 61
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index
Add APU-IOMMI nodes
Signed-off-by: Yong Wu
Signed-off-by: Flora Fu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 5c97dc7985b4..62acaba7b033
Add APU power driver to support for subsys clock
and regulator controller.
Add MT8192 platform APU power driver's platform data.
Signed-off-by: Flora Fu
---
drivers/soc/mediatek/apusys/Kconfig | 23 +
drivers/soc/mediatek/apusys/Makefile | 5 +
The APU middleware is responsible to receive all user's requests
and control command and device related flow.
In Kernel side, the middleware use the IPI to send command
to remote tinysys to dispatch commands to AI engines in APU.
Signed-off-by: JB Tsai
Signed-off-by: Flora Fu
---
APU IOMMU is a new iommu HW. it uses a new pagetable.
Add support for mt8192 apu iommu.
Signed-off-by: Yong Wu
Signed-off-by: Flora Fu
---
drivers/iommu/mtk_iommu.c | 45 ++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git
Add mtk-apu-mailbox driver to support communication with
APU remote microprocessor.
Signed-off-by: Pi-Cheng Chen
Signed-off-by: Flora Fu
---
drivers/mailbox/Kconfig | 9 ++
drivers/mailbox/Makefile | 2 +
drivers/mailbox/mtk-apu-mailbox.c | 162
Add new document for apu logger compatible.
Signed-off-by: Flora Fu
---
.../soc/mediatek/mediatek,apu-logger.yaml | 42 +++
1 file changed, 42 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-logger.yaml
diff --git
Add new binding document for the APU remote processor.
The initial version is used for MT8192 SOC.
Signed-off-by: Pi-Cheng Chen
Signed-off-by: Flora Fu
---
.../bindings/remoteproc/mediatek,apu-rv.yaml | 106 ++
1 file changed, 106 insertions(+)
create mode 100644
Add new document for APU power compatible.
Signed-off-by: Flora Fu
---
.../soc/mediatek/mediatek,apu-pwr.yaml| 80 +++
1 file changed, 80 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pwr.yaml
diff --git
MT8192 has one APU iommu hardware and add apu iommu bindings.
Signed-off-by: Flora Fu
---
.../devicetree/bindings/iommu/mediatek,iommu.yaml | 7 +--
include/dt-bindings/memory/mt8192-larb-port.h | 4
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git
Add the mailbox compatible for the MediaTek APU.
The MT8192 and MT8195 SOC will use it.
Signed-off-by: Pi-Cheng Chen
Signed-off-by: Flora Fu
---
.../mailbox/mediatek,apu-mailbox.yaml | 47 +++
1 file changed, 47 insertions(+)
create mode 100644
The MediaTek AI Processing Unit (APU) is a proprietary hardware
in the SoC to support AI functions.
The patches support the MT8192 APU runs on internal microprocessor.
Software packages contins mailbox, iommu, APU remote processor,
power control, middleware and debug looger.
This series is based
On Thu, Dec 09, 2021 at 08:41:24PM -0800, Harshit Mogalapalli wrote:
smatch warning:
drivers/gpu/drm/i915/display/intel_dmc.c:601 parse_dmc_fw() warn:
unsigned 'fw->size - offset' is never less than zero
Firmware size is size_t and offset is u32. So the subtraction is
unsigned which can never
On Fri, Dec 10, 2021 at 12:06:20PM +0200, Jani Nikula wrote:
> On Thu, 09 Dec 2021, Kees Cook wrote:
> > On Thu, Dec 09, 2021 at 05:20:45PM -0500, Harry Wentland wrote:
> >>
> >>
> >> On 2021-12-09 01:23, Kees Cook wrote:
> >> > On Wed, Dec 08, 2021 at 01:19:28PM +0200, Jani Nikula wrote:
> >>
On Thu, Dec 02, 2021 at 07:39:48PM +0100, H. Nikolaus Schaller wrote:
> From: Sam Ravnborg
>
> Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
> Based on .txt binding from Zubair Lutfullah Kakakhel
>
> We also add generic ddc-i2c-bus to synopsys,dw-hdmi.yaml
>
> Signed-off-by:
On Thu, Dec 02, 2021 at 11:45:40AM +0800, Yunfei Dong wrote:
> Adds decoder dt-bindings for mt8192.
>
> Signed-off-by: Yunfei Dong
> ---
> .../media/mediatek,vcodec-subdev-decoder.yaml | 266 ++
> 1 file changed, 266 insertions(+)
> create mode 100644
>
Add bus_format and connector_type to cdtech_s070wv95_ct16 panel.
Signed-off-by: Giulio Benetti
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index
Add bus_format and connector_type to cdtech_s043wq26h_ct7 panel.
Signed-off-by: Giulio Benetti
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index
On 2021-12-09 8:31 p.m., Alistair Popple wrote:
On Friday, 10 December 2021 3:54:31 AM AEDT Sierra Guiza, Alejandro (Alex)
wrote:
On 12/9/2021 10:29 AM, Felix Kuehling wrote:
Am 2021-12-09 um 5:53 a.m. schrieb Alistair Popple:
On Thursday, 9 December 2021 5:55:26 AM AEDT Sierra Guiza,
Hi, Dave & Daniel:
This patch looks good to me, how do you think about it?
Regards,
Chun-Kuang.
Jitao Shi 於 2021年11月4日 週四 上午11:36寫道：
>
> Hi sirs
>
> Pls help to review this change.
>
> Best Regards
> Jitao.
>
> On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote:
> > Hi, Jitao:
> >
> >
Hi Michael
On Fri, 10 Dec 2021 at 09:05, Michael Nazzareno Trimarchi
wrote:
>
> Hi Dave
>
> some questions below
>
> On Thu, Dec 9, 2021 at 7:10 PM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Dave
> >
> > On Thu, Dec 9, 2021 at 6:58 PM Dave Stevenson
> > wrote:
> > >
> > > Hi Michael
> > >
On 10/12/2021 14:46, Thomas Hellström wrote:
On Fri, 2021-12-10 at 11:05 +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This effectively removes writeback which was added in 2d6692e642e7
("drm/i915: Start writeback from the shrinker").
Digging through the history it seems we went back
Am 10.12.21 um 16:24 schrieb Guilherme G. Piccoli:
On 10/12/2021 12:13, Christian König wrote:
[...]
How about issuing a PCIe reset and re-initializing the ASIC with just
the VBIOS?
That should be pretty straightforward I think.
Christian.
Thanks Christian, that'd be perfect! Is it
On Fri, Dec 10, 2021 at 03:07:56AM +0200, Andi Shyti wrote:
> Use to_gt() helper consistently throughout the codebase.
> Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
>
> Signed-off-by: Andi Shyti
Reviewed-by: Matt Roper
> ---
> Hi,
>
> the inline of i915_dev_to_pxp() was
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